mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
synced 2024-12-29 09:12:07 +00:00
Merge branch 'x86/urgent' into x86/fpu, to resolve a conflict
Resolve the conflict between these commits: x86/fpu:1193f408cd("x86/fpu/signal: Change return type of __fpu_restore_sig() to boolean") x86/urgent:d298b03506("x86/fpu: Restore the masking out of reserved MXCSR bits")b2381acd3f("x86/fpu: Mask out the invalid MXCSR bits properly") Conflicts: arch/x86/kernel/fpu/signal.c Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar
commit
082f20b21d
1
CREDITS
1
CREDITS
@ -971,6 +971,7 @@ D: PowerPC
|
||||
N: Daniel Drake
|
||||
E: dsd@gentoo.org
|
||||
D: USBAT02 CompactFlash support in usb-storage
|
||||
D: ZD1211RW wireless driver
|
||||
S: UK
|
||||
|
||||
N: Oleg Drokin
|
||||
|
||||
@ -259,7 +259,7 @@ Configuring the kernel
|
||||
Compiling the kernel
|
||||
--------------------
|
||||
|
||||
- Make sure you have at least gcc 4.9 available.
|
||||
- Make sure you have at least gcc 5.1 available.
|
||||
For more information, refer to :ref:`Documentation/process/changes.rst <changes>`.
|
||||
|
||||
Please note that you can still run a.out user programs with this kernel.
|
||||
|
||||
@ -1266,7 +1266,7 @@
|
||||
The VGA and EFI output is eventually overwritten by
|
||||
the real console.
|
||||
|
||||
The xen output can only be used by Xen PV guests.
|
||||
The xen option can only be used in Xen domains.
|
||||
|
||||
The sclp output can only be used on s390.
|
||||
|
||||
|
||||
@ -175,9 +175,10 @@ for IRQ numbers that are passed to struct device registrations. In that
|
||||
case the Linux IRQ numbers cannot be dynamically assigned and the legacy
|
||||
mapping should be used.
|
||||
|
||||
As the name implies, the *_legacy() functions are deprecated and only
|
||||
As the name implies, the \*_legacy() functions are deprecated and only
|
||||
exist to ease the support of ancient platforms. No new users should be
|
||||
added.
|
||||
added. Same goes for the \*_simple() functions when their use results
|
||||
in the legacy behaviour.
|
||||
|
||||
The legacy map assumes a contiguous range of IRQ numbers has already
|
||||
been allocated for the controller and that the IRQ number can be
|
||||
|
||||
@ -54,7 +54,7 @@ properties:
|
||||
- const: toradex,apalis_t30
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- const: toradex,apalis_t30-eval-v1.1
|
||||
- const: toradex,apalis_t30-v1.1-eval
|
||||
- const: toradex,apalis_t30-eval
|
||||
- const: toradex,apalis_t30-v1.1
|
||||
- const: toradex,apalis_t30
|
||||
|
||||
@ -50,7 +50,6 @@ properties:
|
||||
data-lanes:
|
||||
description: array of physical DSI data lane indexes.
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
items:
|
||||
- const: 1
|
||||
- const: 2
|
||||
@ -71,7 +70,6 @@ properties:
|
||||
data-lanes:
|
||||
description: array of physical DSI data lane indexes.
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
items:
|
||||
- const: 1
|
||||
- const: 2
|
||||
|
||||
@ -18,7 +18,7 @@ properties:
|
||||
const: ti,sn65dsi86
|
||||
|
||||
reg:
|
||||
const: 0x2d
|
||||
enum: [ 0x2c, 0x2d ]
|
||||
|
||||
enable-gpios:
|
||||
maxItems: 1
|
||||
|
||||
@ -9,7 +9,7 @@ function block.
|
||||
|
||||
All DISP device tree nodes must be siblings to the central MMSYS_CONFIG node.
|
||||
For a description of the MMSYS_CONFIG binding, see
|
||||
Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt.
|
||||
Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml.
|
||||
|
||||
DISP function blocks
|
||||
====================
|
||||
|
||||
@ -22,7 +22,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
# ili9341 240*320 Color on stm32f429-disco board
|
||||
- st,sf-tc240t-9370-t
|
||||
- st,sf-tc240t-9370-t
|
||||
- const: ilitek,ili9341
|
||||
|
||||
reg: true
|
||||
|
||||
@ -31,11 +31,11 @@ properties:
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
maxItems: 7
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
maxItems: 7
|
||||
|
||||
required:
|
||||
- compatible
|
||||
@ -72,6 +72,32 @@ allOf:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-a2noc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock.
|
||||
- description: Bus A Clock.
|
||||
- description: IPA Clock.
|
||||
- description: UFS AXI Clock.
|
||||
- description: Aggregate2 UFS AXI Clock.
|
||||
- description: Aggregate2 USB3 AXI Clock.
|
||||
- description: Config NoC USB2 AXI Clock.
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
- const: ipa
|
||||
- const: ufs_axi
|
||||
- const: aggre2_ufs_axi
|
||||
- const: aggre2_usb3_axi
|
||||
- const: cfg_noc_usb2_axi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-bimc
|
||||
- qcom,sdm660-cnoc
|
||||
- qcom,sdm660-gnoc
|
||||
@ -91,6 +117,7 @@ examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-sdm660.h>
|
||||
|
||||
bimc: interconnect@1008000 {
|
||||
compatible = "qcom,sdm660-bimc";
|
||||
@ -123,9 +150,20 @@ examples:
|
||||
compatible = "qcom,sdm660-a2noc";
|
||||
reg = <0x01704000 0xc100>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clock-names = "bus",
|
||||
"bus_a",
|
||||
"ipa",
|
||||
"ufs_axi",
|
||||
"aggre2_ufs_axi",
|
||||
"aggre2_usb3_axi",
|
||||
"cfg_noc_usb2_axi";
|
||||
clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
|
||||
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>;
|
||||
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>,
|
||||
<&rpmcc RPM_SMD_IPA_CLK>,
|
||||
<&gcc GCC_UFS_AXI_CLK>,
|
||||
<&gcc GCC_AGGRE2_UFS_AXI_CLK>,
|
||||
<&gcc GCC_AGGRE2_USB3_AXI_CLK>,
|
||||
<&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
|
||||
};
|
||||
|
||||
mnoc: interconnect@1745000 {
|
||||
|
||||
@ -31,7 +31,7 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
|
||||
@ -38,7 +38,7 @@ properties:
|
||||
|
||||
port:
|
||||
additionalProperties: false
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
|
||||
@ -38,7 +38,7 @@ properties:
|
||||
|
||||
port:
|
||||
additionalProperties: false
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
|
||||
@ -38,7 +38,7 @@ properties:
|
||||
|
||||
port:
|
||||
additionalProperties: false
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
|
||||
@ -20,9 +20,7 @@ properties:
|
||||
- snps,dwcmshc-sdhci
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Offset and length of the register set for the device
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
@ -19,7 +19,9 @@ properties:
|
||||
- const: allwinner,sun8i-v3s-emac
|
||||
- const: allwinner,sun50i-a64-emac
|
||||
- items:
|
||||
- const: allwinner,sun50i-h6-emac
|
||||
- enum:
|
||||
- allwinner,sun20i-d1-emac
|
||||
- allwinner,sun50i-h6-emac
|
||||
- const: allwinner,sun50i-a64-emac
|
||||
|
||||
reg:
|
||||
|
||||
@ -83,7 +83,7 @@ Example:
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
switch0: switch@0 {
|
||||
compatible = "marvell,mv88e6390";
|
||||
compatible = "marvell,mv88e6190";
|
||||
reg = <0>;
|
||||
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
||||
|
||||
|
||||
@ -34,7 +34,6 @@ properties:
|
||||
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 5
|
||||
items:
|
||||
- description: MAC host clock
|
||||
- description: MAC apb clock
|
||||
|
||||
@ -41,7 +41,6 @@ properties:
|
||||
- description: builtin MSI controller.
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: msi
|
||||
|
||||
|
||||
@ -0,0 +1,89 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung SoC series UFS host controller Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Alim Akhtar <alim.akhtar@samsung.com>
|
||||
|
||||
description: |
|
||||
Each Samsung UFS host controller instance should have its own node.
|
||||
This binding define Samsung specific binding other then what is used
|
||||
in the common ufshcd bindings
|
||||
[1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
|
||||
|
||||
properties:
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- samsung,exynos7-ufs
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: HCI register
|
||||
- description: vendor specific register
|
||||
- description: unipro register
|
||||
- description: UFS protector register
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: hci
|
||||
- const: vs_hci
|
||||
- const: unipro
|
||||
- const: ufsp
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: ufs link core clock
|
||||
- description: unipro main clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: core_clk
|
||||
- const: sclk_unipro_main
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
phys:
|
||||
maxItems: 1
|
||||
|
||||
phy-names:
|
||||
const: ufs-phy
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- phys
|
||||
- phy-names
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/exynos7-clk.h>
|
||||
|
||||
ufs: ufs@15570000 {
|
||||
compatible = "samsung,exynos7-ufs";
|
||||
reg = <0x15570000 0x100>,
|
||||
<0x15570100 0x100>,
|
||||
<0x15571000 0x200>,
|
||||
<0x15572000 0x300>;
|
||||
reg-names = "hci", "vs_hci", "unipro", "ufsp";
|
||||
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock_fsys1 ACLK_UFS20_LINK>,
|
||||
<&clock_fsys1 SCLK_UFSUNIPRO20_USER>;
|
||||
clock-names = "core_clk", "sclk_unipro_main";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
|
||||
phys = <&ufs_phy>;
|
||||
phy-names = "ufs-phy";
|
||||
};
|
||||
...
|
||||
@ -300,8 +300,8 @@ pcie_replay_count
|
||||
.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
|
||||
:doc: pcie_replay_count
|
||||
|
||||
+GPU SmartShift Information
|
||||
============================
|
||||
GPU SmartShift Information
|
||||
==========================
|
||||
|
||||
GPU SmartShift information via sysfs
|
||||
|
||||
|
||||
@ -111,15 +111,6 @@ Component Helper Usage
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_drv.c
|
||||
:doc: component helper usage recommendations
|
||||
|
||||
IRQ Helper Library
|
||||
~~~~~~~~~~~~~~~~~~
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_irq.c
|
||||
:doc: irq helpers
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_irq.c
|
||||
:export:
|
||||
|
||||
Memory Manager Initialization
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
|
||||
@ -132,20 +132,3 @@ On Family 17h and Family 18h CPUs, additional temperature sensors may report
|
||||
Core Complex Die (CCD) temperatures. Up to 8 such temperatures are reported
|
||||
as temp{3..10}_input, labeled Tccd{1..8}. Actual support depends on the CPU
|
||||
variant.
|
||||
|
||||
Various Family 17h and 18h CPUs report voltage and current telemetry
|
||||
information. The following attributes may be reported.
|
||||
|
||||
Attribute Label Description
|
||||
=============== ======= ================
|
||||
in0_input Vcore Core voltage
|
||||
in1_input Vsoc SoC voltage
|
||||
curr1_input Icore Core current
|
||||
curr2_input Isoc SoC current
|
||||
=============== ======= ================
|
||||
|
||||
Current values are raw (unscaled) as reported by the CPU. Core current is
|
||||
reported as multiples of 1A / LSB. SoC is reported as multiples of 0.25A
|
||||
/ LSB. The real current is board specific. Reported currents should be seen
|
||||
as rough guidance, and should be scaled using sensors3.conf as appropriate
|
||||
for a given board.
|
||||
|
||||
@ -851,7 +851,7 @@ NOTES:
|
||||
- 0x88A8 traffic will not be received unless VLAN stripping is disabled with
|
||||
the following command::
|
||||
|
||||
# ethool -K <ethX> rxvlan off
|
||||
# ethtool -K <ethX> rxvlan off
|
||||
|
||||
- 0x88A8/0x8100 double VLANs cannot be used with 0x8100 or 0x8100/0x8100 VLANS
|
||||
configured on the same port. 0x88a8/0x8100 traffic will not be received if
|
||||
|
||||
@ -296,7 +296,7 @@ not available.
|
||||
Device Tree bindings and board design
|
||||
=====================================
|
||||
|
||||
This section references ``Documentation/devicetree/bindings/net/dsa/sja1105.txt``
|
||||
This section references ``Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml``
|
||||
and aims to showcase some potential switch caveats.
|
||||
|
||||
RMII PHY role and out-of-band signaling
|
||||
|
||||
@ -29,7 +29,7 @@ you probably needn't concern yourself with pcmciautils.
|
||||
====================== =============== ========================================
|
||||
Program Minimal version Command to check the version
|
||||
====================== =============== ========================================
|
||||
GNU C 4.9 gcc --version
|
||||
GNU C 5.1 gcc --version
|
||||
Clang/LLVM (optional) 10.0.1 clang --version
|
||||
GNU make 3.81 make --version
|
||||
binutils 2.23 ld -v
|
||||
|
||||
@ -223,7 +223,7 @@ Linux内核5.x版本 <http://kernel.org/>
|
||||
编译内核
|
||||
---------
|
||||
|
||||
- 确保您至少有gcc 4.9可用。
|
||||
- 确保您至少有gcc 5.1可用。
|
||||
有关更多信息，请参阅 :ref:`Documentation/process/changes.rst <changes>` 。
|
||||
|
||||
请注意，您仍然可以使用此内核运行a.out用户程序。
|
||||
|
||||
@ -226,7 +226,7 @@ Linux內核5.x版本 <http://kernel.org/>
|
||||
編譯內核
|
||||
---------
|
||||
|
||||
- 確保您至少有gcc 4.9可用。
|
||||
- 確保您至少有gcc 5.1可用。
|
||||
有關更多信息，請參閱 :ref:`Documentation/process/changes.rst <changes>` 。
|
||||
|
||||
請注意，您仍然可以使用此內核運行a.out用戶程序。
|
||||
|
||||
76
MAINTAINERS
76
MAINTAINERS
@ -414,7 +414,8 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
|
||||
F: drivers/acpi/pmic/
|
||||
|
||||
ACPI THERMAL DRIVER
|
||||
M: Zhang Rui <rui.zhang@intel.com>
|
||||
M: Rafael J. Wysocki <rafael@kernel.org>
|
||||
R: Zhang Rui <rui.zhang@intel.com>
|
||||
L: linux-acpi@vger.kernel.org
|
||||
S: Supported
|
||||
W: https://01.org/linux-acpi
|
||||
@ -810,7 +811,7 @@ F: Documentation/devicetree/bindings/dma/altr,msgdma.yaml
|
||||
F: drivers/dma/altera-msgdma.c
|
||||
|
||||
ALTERA PIO DRIVER
|
||||
M: Joyce Ooi <joyce.ooi@intel.com>
|
||||
M: Mun Yew Tham <mun.yew.tham@intel.com>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/gpio/gpio-altera.c
|
||||
@ -977,12 +978,12 @@ L: platform-driver-x86@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/platform/x86/amd-pmc.*
|
||||
|
||||
AMD POWERPLAY
|
||||
AMD POWERPLAY AND SWSMU
|
||||
M: Evan Quan <evan.quan@amd.com>
|
||||
L: amd-gfx@lists.freedesktop.org
|
||||
S: Supported
|
||||
T: git https://gitlab.freedesktop.org/agd5f/linux.git
|
||||
F: drivers/gpu/drm/amd/pm/powerplay/
|
||||
F: drivers/gpu/drm/amd/pm/
|
||||
|
||||
AMD PTDMA DRIVER
|
||||
M: Sanjay R Mehta <sanju.mehta@amd.com>
|
||||
@ -1275,6 +1276,7 @@ F: drivers/input/mouse/bcm5974.c
|
||||
|
||||
APPLE DART IOMMU DRIVER
|
||||
M: Sven Peter <sven@svenpeter.dev>
|
||||
R: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
||||
L: iommu@lists.linux-foundation.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iommu/apple,dart.yaml
|
||||
@ -1711,6 +1713,8 @@ F: drivers/*/*alpine*
|
||||
|
||||
ARM/APPLE MACHINE SUPPORT
|
||||
M: Hector Martin <marcan@marcan.st>
|
||||
M: Sven Peter <sven@svenpeter.dev>
|
||||
R: Alyssa Rosenzweig <alyssa@rosenzweig.io>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
W: https://asahilinux.org
|
||||
@ -2236,6 +2240,7 @@ F: arch/arm/mach-pxa/mioa701.c
|
||||
|
||||
ARM/MStar/Sigmastar Armv7 SoC support
|
||||
M: Daniel Palmer <daniel@thingy.jp>
|
||||
M: Romain Perier <romain.perier@gmail.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
W: http://linux-chenxing.org/
|
||||
@ -2712,6 +2717,7 @@ F: drivers/power/reset/keystone-reset.c
|
||||
|
||||
ARM/TEXAS INSTRUMENTS K3 ARCHITECTURE
|
||||
M: Nishanth Menon <nm@ti.com>
|
||||
M: Vignesh Raghavendra <vigneshr@ti.com>
|
||||
M: Tero Kristo <kristo@kernel.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
@ -2804,9 +2810,8 @@ F: arch/arm/mach-pxa/include/mach/vpac270.h
|
||||
F: arch/arm/mach-pxa/vpac270.c
|
||||
|
||||
ARM/VT8500 ARM ARCHITECTURE
|
||||
M: Tony Prisk <linux@prisktech.co.nz>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: Documentation/devicetree/bindings/i2c/i2c-wmt.txt
|
||||
F: arch/arm/mach-vt8500/
|
||||
F: drivers/clocksource/timer-vt8500.c
|
||||
@ -2962,7 +2967,7 @@ F: crypto/async_tx/
|
||||
F: include/linux/async_tx.h
|
||||
|
||||
AT24 EEPROM DRIVER
|
||||
M: Bartosz Golaszewski <bgolaszewski@baylibre.com>
|
||||
M: Bartosz Golaszewski <brgl@bgdev.pl>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git
|
||||
@ -3385,9 +3390,11 @@ F: Documentation/networking/filter.rst
|
||||
F: Documentation/userspace-api/ebpf/
|
||||
F: arch/*/net/*
|
||||
F: include/linux/bpf*
|
||||
F: include/linux/btf*
|
||||
F: include/linux/filter.h
|
||||
F: include/trace/events/xdp.h
|
||||
F: include/uapi/linux/bpf*
|
||||
F: include/uapi/linux/btf*
|
||||
F: include/uapi/linux/filter.h
|
||||
F: kernel/bpf/
|
||||
F: kernel/trace/bpf_trace.c
|
||||
@ -3821,7 +3828,6 @@ F: drivers/scsi/mpi3mr/
|
||||
|
||||
BROADCOM NETXTREME-E ROCE DRIVER
|
||||
M: Selvin Xavier <selvin.xavier@broadcom.com>
|
||||
M: Naresh Kumar PBS <nareshkumar.pbs@broadcom.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.broadcom.com
|
||||
@ -4656,7 +4662,7 @@ W: http://linux-cifs.samba.org/
|
||||
T: git git://git.samba.org/sfrench/cifs-2.6.git
|
||||
F: Documentation/admin-guide/cifs/
|
||||
F: fs/cifs/
|
||||
F: fs/cifs_common/
|
||||
F: fs/smbfs_common/
|
||||
|
||||
COMPACTPCI HOTPLUG CORE
|
||||
M: Scott Murray <scott@spiteful.org>
|
||||
@ -7986,7 +7992,7 @@ F: include/linux/gpio/regmap.h
|
||||
|
||||
GPIO SUBSYSTEM
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
M: Bartosz Golaszewski <bgolaszewski@baylibre.com>
|
||||
M: Bartosz Golaszewski <brgl@bgdev.pl>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git
|
||||
@ -8608,9 +8614,8 @@ F: Documentation/devicetree/bindings/iio/humidity/st,hts221.yaml
|
||||
F: drivers/iio/humidity/hts221*
|
||||
|
||||
HUAWEI ETHERNET DRIVER
|
||||
M: Bin Luo <luobin9@huawei.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
S: Orphan
|
||||
F: Documentation/networking/device_drivers/ethernet/huawei/hinic.rst
|
||||
F: drivers/net/ethernet/huawei/hinic/
|
||||
|
||||
@ -10194,8 +10199,8 @@ M: Hyunchul Lee <hyc.lee@gmail.com>
|
||||
L: linux-cifs@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.samba.org/ksmbd.git
|
||||
F: fs/cifs_common/
|
||||
F: fs/ksmbd/
|
||||
F: fs/smbfs_common/
|
||||
|
||||
KERNEL UNIT TESTING FRAMEWORK (KUnit)
|
||||
M: Brendan Higgins <brendanhiggins@google.com>
|
||||
@ -11367,7 +11372,7 @@ F: Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.yaml
|
||||
F: drivers/iio/proximity/mb1232.c
|
||||
|
||||
MAXIM MAX77650 PMIC MFD DRIVER
|
||||
M: Bartosz Golaszewski <bgolaszewski@baylibre.com>
|
||||
M: Bartosz Golaszewski <brgl@bgdev.pl>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/*/*max77650.yaml
|
||||
@ -13255,9 +13260,9 @@ F: Documentation/scsi/NinjaSCSI.rst
|
||||
F: drivers/scsi/nsp32*
|
||||
|
||||
NIOS2 ARCHITECTURE
|
||||
M: Ley Foon Tan <ley.foon.tan@intel.com>
|
||||
M: Dinh Nguyen <dinguyen@kernel.org>
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git
|
||||
F: arch/nios2/
|
||||
|
||||
NITRO ENCLAVES (NE)
|
||||
@ -14342,7 +14347,8 @@ F: Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml
|
||||
F: drivers/pci/controller/pci-ixp4xx.c
|
||||
|
||||
PCI DRIVER FOR INTEL VOLUME MANAGEMENT DEVICE (VMD)
|
||||
M: Jonathan Derrick <jonathan.derrick@intel.com>
|
||||
M: Nirmal Patel <nirmal.patel@linux.intel.com>
|
||||
R: Jonathan Derrick <jonathan.derrick@linux.dev>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/pci/controller/vmd.c
|
||||
@ -16650,13 +16656,6 @@ M: Lubomir Rintel <lkundrak@v3.sk>
|
||||
S: Supported
|
||||
F: drivers/char/pcmcia/scr24x_cs.c
|
||||
|
||||
SCSI CDROM DRIVER
|
||||
M: Jens Axboe <axboe@kernel.dk>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
S: Maintained
|
||||
W: http://www.kernel.dk
|
||||
F: drivers/scsi/sr*
|
||||
|
||||
SCSI RDMA PROTOCOL (SRP) INITIATOR
|
||||
M: Bart Van Assche <bvanassche@acm.org>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
@ -16955,7 +16954,6 @@ F: drivers/misc/sgi-xp/
|
||||
|
||||
SHARED MEMORY COMMUNICATIONS (SMC) SOCKETS
|
||||
M: Karsten Graul <kgraul@linux.ibm.com>
|
||||
M: Guvenc Gulce <guvenc@linux.ibm.com>
|
||||
L: linux-s390@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.ibm.com/developerworks/linux/linux390/
|
||||
@ -17800,7 +17798,6 @@ F: drivers/staging/nvec/
|
||||
|
||||
STAGING - OLPC SECONDARY DISPLAY CONTROLLER (DCON)
|
||||
M: Jens Frederich <jfrederich@gmail.com>
|
||||
M: Daniel Drake <dsd@laptop.org>
|
||||
M: Jon Nettleton <jon.nettleton@gmail.com>
|
||||
S: Maintained
|
||||
W: http://wiki.laptop.org/go/DCON
|
||||
@ -17891,7 +17888,8 @@ M: Olivier Moysan <olivier.moysan@foss.st.com>
|
||||
M: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iio/adc/st,stm32-*.yaml
|
||||
F: Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml
|
||||
F: Documentation/devicetree/bindings/sound/st,stm32-*.yaml
|
||||
F: sound/soc/stm/
|
||||
|
||||
STM32 TIMER/LPTIMER DRIVERS
|
||||
@ -17968,10 +17966,11 @@ F: Documentation/admin-guide/svga.rst
|
||||
F: arch/x86/boot/video*
|
||||
|
||||
SWIOTLB SUBSYSTEM
|
||||
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||
M: Christoph Hellwig <hch@infradead.org>
|
||||
L: iommu@lists.linux-foundation.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/konrad/swiotlb.git
|
||||
W: http://git.infradead.org/users/hch/dma-mapping.git
|
||||
T: git git://git.infradead.org/users/hch/dma-mapping.git
|
||||
F: arch/*/kernel/pci-swiotlb.c
|
||||
F: include/linux/swiotlb.h
|
||||
F: kernel/dma/swiotlb.c
|
||||
@ -18554,13 +18553,14 @@ T: git git://linuxtv.org/media_tree.git
|
||||
F: drivers/media/radio/radio-raremono.c
|
||||
|
||||
THERMAL
|
||||
M: Zhang Rui <rui.zhang@intel.com>
|
||||
M: Rafael J. Wysocki <rafael@kernel.org>
|
||||
M: Daniel Lezcano <daniel.lezcano@linaro.org>
|
||||
R: Amit Kucheria <amitk@kernel.org>
|
||||
R: Zhang Rui <rui.zhang@intel.com>
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Supported
|
||||
Q: https://patchwork.kernel.org/project/linux-pm/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git thermal
|
||||
F: Documentation/devicetree/bindings/thermal/
|
||||
F: drivers/thermal/
|
||||
F: include/linux/cpu_cooling.h
|
||||
@ -18689,7 +18689,7 @@ F: include/linux/clk/ti.h
|
||||
|
||||
TI DAVINCI MACHINE SUPPORT
|
||||
M: Sekhar Nori <nsekhar@ti.com>
|
||||
R: Bartosz Golaszewski <bgolaszewski@baylibre.com>
|
||||
R: Bartosz Golaszewski <brgl@bgdev.pl>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci.git
|
||||
@ -19288,13 +19288,12 @@ S: Maintained
|
||||
F: drivers/usb/misc/chaoskey.c
|
||||
|
||||
USB CYPRESS C67X00 DRIVER
|
||||
M: Peter Korsgaard <jacmet@sunsite.dk>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/usb/c67x00/
|
||||
|
||||
USB DAVICOM DM9601 DRIVER
|
||||
M: Peter Korsgaard <jacmet@sunsite.dk>
|
||||
M: Peter Korsgaard <peter@korsgaard.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
W: http://www.linux-usb.org/usbnet
|
||||
@ -20474,7 +20473,6 @@ F: samples/bpf/xdpsock*
|
||||
F: tools/lib/bpf/xsk*
|
||||
|
||||
XEN BLOCK SUBSYSTEM
|
||||
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||
M: Roger Pau Monné <roger.pau@citrix.com>
|
||||
L: xen-devel@lists.xenproject.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
@ -20522,7 +20520,7 @@ S: Supported
|
||||
F: drivers/net/xen-netback/*
|
||||
|
||||
XEN PCI SUBSYSTEM
|
||||
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||
M: Juergen Gross <jgross@suse.com>
|
||||
L: xen-devel@lists.xenproject.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: arch/x86/pci/*xen*
|
||||
@ -20545,7 +20543,8 @@ S: Supported
|
||||
F: sound/xen/*
|
||||
|
||||
XEN SWIOTLB SUBSYSTEM
|
||||
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||
M: Juergen Gross <jgross@suse.com>
|
||||
M: Stefano Stabellini <sstabellini@kernel.org>
|
||||
L: xen-devel@lists.xenproject.org (moderated for non-subscribers)
|
||||
L: iommu@lists.linux-foundation.org
|
||||
S: Supported
|
||||
@ -20704,7 +20703,6 @@ S: Maintained
|
||||
F: mm/zbud.c
|
||||
|
||||
ZD1211RW WIRELESS DRIVER
|
||||
M: Daniel Drake <dsd@gentoo.org>
|
||||
M: Ulrich Kunitz <kune@deine-taler.de>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
L: zd1211-devs@lists.sourceforge.net (subscribers-only)
|
||||
|
||||
8
Makefile
8
Makefile
@ -2,7 +2,7 @@
|
||||
VERSION = 5
|
||||
PATCHLEVEL = 15
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Opossums on Parade
|
||||
|
||||
# *DOCUMENTATION*
|
||||
@ -849,12 +849,6 @@ endif
|
||||
|
||||
DEBUG_CFLAGS :=
|
||||
|
||||
# Workaround for GCC versions < 5.0
|
||||
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61801
|
||||
ifdef CONFIG_CC_IS_GCC
|
||||
DEBUG_CFLAGS += $(call cc-ifversion, -lt, 0500, $(call cc-option, -fno-var-tracking-assignments))
|
||||
endif
|
||||
|
||||
ifdef CONFIG_DEBUG_INFO
|
||||
|
||||
ifdef CONFIG_DEBUG_INFO_SPLIT
|
||||
|
||||
@ -20,7 +20,7 @@ config ALPHA
|
||||
select NEED_SG_DMA_LENGTH
|
||||
select VIRT_TO_BUS
|
||||
select GENERIC_IRQ_PROBE
|
||||
select GENERIC_PCI_IOMAP if PCI
|
||||
select GENERIC_PCI_IOMAP
|
||||
select AUTO_IRQ_AFFINITY if SMP
|
||||
select GENERIC_IRQ_SHOW
|
||||
select ARCH_WANT_IPC_PARSE_VERSION
|
||||
@ -199,7 +199,6 @@ config ALPHA_EIGER
|
||||
|
||||
config ALPHA_JENSEN
|
||||
bool "Jensen"
|
||||
depends on BROKEN
|
||||
select HAVE_EISA
|
||||
help
|
||||
DEC PC 150 AXP (aka Jensen): This is a very old Digital system - one
|
||||
|
||||
@ -16,3 +16,4 @@ extern void __divlu(void);
|
||||
extern void __remlu(void);
|
||||
extern void __divqu(void);
|
||||
extern void __remqu(void);
|
||||
extern unsigned long __udiv_qrnnd(unsigned long *, unsigned long, unsigned long , unsigned long);
|
||||
|
||||
@ -60,7 +60,7 @@ extern inline void set_hae(unsigned long new_hae)
|
||||
* Change virtual addresses to physical addresses and vv.
|
||||
*/
|
||||
#ifdef USE_48_BIT_KSEG
|
||||
static inline unsigned long virt_to_phys(void *address)
|
||||
static inline unsigned long virt_to_phys(volatile void *address)
|
||||
{
|
||||
return (unsigned long)address - IDENT_ADDR;
|
||||
}
|
||||
@ -70,7 +70,7 @@ static inline void * phys_to_virt(unsigned long address)
|
||||
return (void *) (address + IDENT_ADDR);
|
||||
}
|
||||
#else
|
||||
static inline unsigned long virt_to_phys(void *address)
|
||||
static inline unsigned long virt_to_phys(volatile void *address)
|
||||
{
|
||||
unsigned long phys = (unsigned long)address;
|
||||
|
||||
@ -106,7 +106,7 @@ static inline void * phys_to_virt(unsigned long address)
|
||||
extern unsigned long __direct_map_base;
|
||||
extern unsigned long __direct_map_size;
|
||||
|
||||
static inline unsigned long __deprecated virt_to_bus(void *address)
|
||||
static inline unsigned long __deprecated virt_to_bus(volatile void *address)
|
||||
{
|
||||
unsigned long phys = virt_to_phys(address);
|
||||
unsigned long bus = phys + __direct_map_base;
|
||||
|
||||
@ -111,18 +111,18 @@ __EXTERN_INLINE void jensen_set_hae(unsigned long addr)
|
||||
* convinced that I need one of the newer machines.
|
||||
*/
|
||||
|
||||
static inline unsigned int jensen_local_inb(unsigned long addr)
|
||||
__EXTERN_INLINE unsigned int jensen_local_inb(unsigned long addr)
|
||||
{
|
||||
return 0xff & *(vuip)((addr << 9) + EISA_VL82C106);
|
||||
}
|
||||
|
||||
static inline void jensen_local_outb(u8 b, unsigned long addr)
|
||||
__EXTERN_INLINE void jensen_local_outb(u8 b, unsigned long addr)
|
||||
{
|
||||
*(vuip)((addr << 9) + EISA_VL82C106) = b;
|
||||
mb();
|
||||
}
|
||||
|
||||
static inline unsigned int jensen_bus_inb(unsigned long addr)
|
||||
__EXTERN_INLINE unsigned int jensen_bus_inb(unsigned long addr)
|
||||
{
|
||||
long result;
|
||||
|
||||
@ -131,7 +131,7 @@ static inline unsigned int jensen_bus_inb(unsigned long addr)
|
||||
return __kernel_extbl(result, addr & 3);
|
||||
}
|
||||
|
||||
static inline void jensen_bus_outb(u8 b, unsigned long addr)
|
||||
__EXTERN_INLINE void jensen_bus_outb(u8 b, unsigned long addr)
|
||||
{
|
||||
jensen_set_hae(0);
|
||||
*(vuip)((addr << 7) + EISA_IO + 0x00) = b * 0x01010101;
|
||||
|
||||
43
arch/alpha/include/asm/setup.h
Normal file
43
arch/alpha/include/asm/setup.h
Normal file
@ -0,0 +1,43 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
#ifndef __ALPHA_SETUP_H
|
||||
#define __ALPHA_SETUP_H
|
||||
|
||||
#include <uapi/asm/setup.h>
|
||||
|
||||
/*
|
||||
* We leave one page for the initial stack page, and one page for
|
||||
* the initial process structure. Also, the console eats 3 MB for
|
||||
* the initial bootloader (one of which we can reclaim later).
|
||||
*/
|
||||
#define BOOT_PCB 0x20000000
|
||||
#define BOOT_ADDR 0x20000000
|
||||
/* Remove when official MILO sources have ELF support: */
|
||||
#define BOOT_SIZE (16*1024)
|
||||
|
||||
#ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS
|
||||
#define KERNEL_START_PHYS 0x300000 /* Old bootloaders hardcoded this. */
|
||||
#else
|
||||
#define KERNEL_START_PHYS 0x1000000 /* required: Wildfire/Titan/Marvel */
|
||||
#endif
|
||||
|
||||
#define KERNEL_START (PAGE_OFFSET+KERNEL_START_PHYS)
|
||||
#define SWAPPER_PGD KERNEL_START
|
||||
#define INIT_STACK (PAGE_OFFSET+KERNEL_START_PHYS+0x02000)
|
||||
#define EMPTY_PGT (PAGE_OFFSET+KERNEL_START_PHYS+0x04000)
|
||||
#define EMPTY_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x08000)
|
||||
#define ZERO_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x0A000)
|
||||
|
||||
#define START_ADDR (PAGE_OFFSET+KERNEL_START_PHYS+0x10000)
|
||||
|
||||
/*
|
||||
* This is setup by the secondary bootstrap loader. Because
|
||||
* the zero page is zeroed out as soon as the vm system is
|
||||
* initialized, we need to copy things out into a more permanent
|
||||
* place.
|
||||
*/
|
||||
#define PARAM ZERO_PGE
|
||||
#define COMMAND_LINE ((char *)(absolute_pointer(PARAM + 0x0000)))
|
||||
#define INITRD_START (*(unsigned long *) (PARAM+0x100))
|
||||
#define INITRD_SIZE (*(unsigned long *) (PARAM+0x108))
|
||||
|
||||
#endif
|
||||
@ -1,43 +1,7 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
|
||||
#ifndef __ALPHA_SETUP_H
|
||||
#define __ALPHA_SETUP_H
|
||||
#ifndef _UAPI__ALPHA_SETUP_H
|
||||
#define _UAPI__ALPHA_SETUP_H
|
||||
|
||||
#define COMMAND_LINE_SIZE 256
|
||||
|
||||
/*
|
||||
* We leave one page for the initial stack page, and one page for
|
||||
* the initial process structure. Also, the console eats 3 MB for
|
||||
* the initial bootloader (one of which we can reclaim later).
|
||||
*/
|
||||
#define BOOT_PCB 0x20000000
|
||||
#define BOOT_ADDR 0x20000000
|
||||
/* Remove when official MILO sources have ELF support: */
|
||||
#define BOOT_SIZE (16*1024)
|
||||
|
||||
#ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS
|
||||
#define KERNEL_START_PHYS 0x300000 /* Old bootloaders hardcoded this. */
|
||||
#else
|
||||
#define KERNEL_START_PHYS 0x1000000 /* required: Wildfire/Titan/Marvel */
|
||||
#endif
|
||||
|
||||
#define KERNEL_START (PAGE_OFFSET+KERNEL_START_PHYS)
|
||||
#define SWAPPER_PGD KERNEL_START
|
||||
#define INIT_STACK (PAGE_OFFSET+KERNEL_START_PHYS+0x02000)
|
||||
#define EMPTY_PGT (PAGE_OFFSET+KERNEL_START_PHYS+0x04000)
|
||||
#define EMPTY_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x08000)
|
||||
#define ZERO_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x0A000)
|
||||
|
||||
#define START_ADDR (PAGE_OFFSET+KERNEL_START_PHYS+0x10000)
|
||||
|
||||
/*
|
||||
* This is setup by the secondary bootstrap loader. Because
|
||||
* the zero page is zeroed out as soon as the vm system is
|
||||
* initialized, we need to copy things out into a more permanent
|
||||
* place.
|
||||
*/
|
||||
#define PARAM ZERO_PGE
|
||||
#define COMMAND_LINE ((char*)(PARAM + 0x0000))
|
||||
#define INITRD_START (*(unsigned long *) (PARAM+0x100))
|
||||
#define INITRD_SIZE (*(unsigned long *) (PARAM+0x108))
|
||||
|
||||
#endif
|
||||
#endif /* _UAPI__ALPHA_SETUP_H */
|
||||
|
||||
@ -7,6 +7,11 @@
|
||||
*
|
||||
* Code supporting the Jensen.
|
||||
*/
|
||||
#define __EXTERN_INLINE
|
||||
#include <asm/io.h>
|
||||
#include <asm/jensen.h>
|
||||
#undef __EXTERN_INLINE
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
@ -17,11 +22,6 @@
|
||||
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
#define __EXTERN_INLINE inline
|
||||
#include <asm/io.h>
|
||||
#include <asm/jensen.h>
|
||||
#undef __EXTERN_INLINE
|
||||
|
||||
#include <asm/dma.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mmu_context.h>
|
||||
|
||||
@ -14,6 +14,7 @@ ev6-$(CONFIG_ALPHA_EV6) := ev6-
|
||||
ev67-$(CONFIG_ALPHA_EV67) := ev67-
|
||||
|
||||
lib-y = __divqu.o __remqu.o __divlu.o __remlu.o \
|
||||
udiv-qrnnd.o \
|
||||
udelay.o \
|
||||
$(ev6-y)memset.o \
|
||||
$(ev6-y)memcpy.o \
|
||||
|
||||
@ -25,6 +25,7 @@
|
||||
# along with GCC; see the file COPYING. If not, write to the
|
||||
# Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
|
||||
# MA 02111-1307, USA.
|
||||
#include <asm/export.h>
|
||||
|
||||
.set noreorder
|
||||
.set noat
|
||||
@ -161,3 +162,4 @@ $Odd:
|
||||
ret $31,($26),1
|
||||
|
||||
.end __udiv_qrnnd
|
||||
EXPORT_SYMBOL(__udiv_qrnnd)
|
||||
@ -7,4 +7,4 @@ ccflags-y := -w
|
||||
|
||||
obj-$(CONFIG_MATHEMU) += math-emu.o
|
||||
|
||||
math-emu-objs := math.o qrnnd.o
|
||||
math-emu-objs := math.o
|
||||
|
||||
@ -403,5 +403,3 @@ alpha_fp_emul_imprecise (struct pt_regs *regs, unsigned long write_mask)
|
||||
egress:
|
||||
return si_code;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(__udiv_qrnnd);
|
||||
|
||||
@ -1989,8 +1989,6 @@ config ARCH_HIBERNATION_POSSIBLE
|
||||
|
||||
endmenu
|
||||
|
||||
source "drivers/firmware/Kconfig"
|
||||
|
||||
if CRYPTO
|
||||
source "arch/arm/crypto/Kconfig"
|
||||
endif
|
||||
|
||||
@ -71,7 +71,6 @@ apb {
|
||||
isc: isc@f0008000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_isc_base &pinctrl_isc_data_8bit &pinctrl_isc_data_9_10 &pinctrl_isc_data_11_12>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
qspi1: spi@f0024000 {
|
||||
|
||||
@ -196,11 +196,13 @@ vddioddr: VDD_DDR {
|
||||
|
||||
regulator-state-standby {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1350000>;
|
||||
regulator-mode = <4>;
|
||||
};
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1350000>;
|
||||
regulator-mode = <4>;
|
||||
};
|
||||
};
|
||||
@ -353,7 +355,10 @@ &gmac0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gmac0_default &pinctrl_gmac0_txck_default &pinctrl_gmac0_phy_irq>;
|
||||
pinctrl-0 = <&pinctrl_gmac0_default
|
||||
&pinctrl_gmac0_mdio_default
|
||||
&pinctrl_gmac0_txck_default
|
||||
&pinctrl_gmac0_phy_irq>;
|
||||
phy-mode = "rgmii-id";
|
||||
status = "okay";
|
||||
|
||||
@ -368,7 +373,9 @@ &gmac1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gmac1_default &pinctrl_gmac1_phy_irq>;
|
||||
pinctrl-0 = <&pinctrl_gmac1_default
|
||||
&pinctrl_gmac1_mdio_default
|
||||
&pinctrl_gmac1_phy_irq>;
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
|
||||
@ -423,14 +430,20 @@ pinctrl_gmac0_default: gmac0_default {
|
||||
<PIN_PA15__G0_TXEN>,
|
||||
<PIN_PA30__G0_RXCK>,
|
||||
<PIN_PA18__G0_RXDV>,
|
||||
<PIN_PA22__G0_MDC>,
|
||||
<PIN_PA23__G0_MDIO>,
|
||||
<PIN_PA25__G0_125CK>;
|
||||
slew-rate = <0>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_gmac0_mdio_default: gmac0_mdio_default {
|
||||
pinmux = <PIN_PA22__G0_MDC>,
|
||||
<PIN_PA23__G0_MDIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_gmac0_txck_default: gmac0_txck_default {
|
||||
pinmux = <PIN_PA24__G0_TXCK>;
|
||||
slew-rate = <0>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
@ -447,8 +460,13 @@ pinctrl_gmac1_default: gmac1_default {
|
||||
<PIN_PD25__G1_RX0>,
|
||||
<PIN_PD26__G1_RX1>,
|
||||
<PIN_PD27__G1_RXER>,
|
||||
<PIN_PD24__G1_RXDV>,
|
||||
<PIN_PD28__G1_MDC>,
|
||||
<PIN_PD24__G1_RXDV>;
|
||||
slew-rate = <0>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_gmac1_mdio_default: gmac1_mdio_default {
|
||||
pinmux = <PIN_PD28__G1_MDC>,
|
||||
<PIN_PD29__G1_MDIO>;
|
||||
bias-disable;
|
||||
};
|
||||
@ -540,6 +558,7 @@ cmd_data {
|
||||
<PIN_PA8__SDMMC0_DAT5>,
|
||||
<PIN_PA9__SDMMC0_DAT6>,
|
||||
<PIN_PA10__SDMMC0_DAT7>;
|
||||
slew-rate = <0>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
@ -547,6 +566,7 @@ ck_cd_rstn_vddsel {
|
||||
pinmux = <PIN_PA0__SDMMC0_CK>,
|
||||
<PIN_PA2__SDMMC0_RSTN>,
|
||||
<PIN_PA11__SDMMC0_DS>;
|
||||
slew-rate = <0>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
@ -558,6 +578,7 @@ cmd_data {
|
||||
<PIN_PC0__SDMMC1_DAT1>,
|
||||
<PIN_PC1__SDMMC1_DAT2>,
|
||||
<PIN_PC2__SDMMC1_DAT3>;
|
||||
slew-rate = <0>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
@ -566,6 +587,7 @@ ck_cd_rstn_vddsel {
|
||||
<PIN_PB28__SDMMC1_RSTN>,
|
||||
<PIN_PC5__SDMMC1_1V8SEL>,
|
||||
<PIN_PC4__SDMMC1_CD>;
|
||||
slew-rate = <0>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
@ -577,11 +599,13 @@ cmd_data {
|
||||
<PIN_PD6__SDMMC2_DAT1>,
|
||||
<PIN_PD7__SDMMC2_DAT2>,
|
||||
<PIN_PD8__SDMMC2_DAT3>;
|
||||
slew-rate = <0>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
ck {
|
||||
pinmux = <PIN_PD4__SDMMC2_CK>;
|
||||
slew-rate = <0>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
@ -634,6 +658,15 @@ &sdmmc2 {
|
||||
pinctrl-0 = <&pinctrl_sdmmc2_default>;
|
||||
};
|
||||
|
||||
&shdwc {
|
||||
atmel,shdwc-debouncer = <976>;
|
||||
status = "okay";
|
||||
|
||||
input@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&spdifrx {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spdifrx_default>;
|
||||
|
||||
@ -56,6 +56,7 @@ eth {
|
||||
panel {
|
||||
compatible = "edt,etm0700g0dh6";
|
||||
pinctrl-0 = <&pinctrl_display_gpio>;
|
||||
pinctrl-names = "default";
|
||||
enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
port {
|
||||
@ -76,8 +77,7 @@ reg_usbh1_vbus: regulator-usbh1-vbus {
|
||||
regulator-name = "vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio1 2 0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -5,6 +5,7 @@
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
/ {
|
||||
@ -277,6 +278,7 @@ chan@0 {
|
||||
led-cur = /bits/ 8 <0x20>;
|
||||
max-cur = /bits/ 8 <0x60>;
|
||||
reg = <0>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
};
|
||||
|
||||
chan@1 {
|
||||
@ -284,6 +286,7 @@ chan@1 {
|
||||
led-cur = /bits/ 8 <0x20>;
|
||||
max-cur = /bits/ 8 <0x60>;
|
||||
reg = <1>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
};
|
||||
|
||||
chan@2 {
|
||||
@ -291,6 +294,7 @@ chan@2 {
|
||||
led-cur = /bits/ 8 <0x20>;
|
||||
max-cur = /bits/ 8 <0x60>;
|
||||
reg = <2>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
};
|
||||
|
||||
chan@3 {
|
||||
@ -298,6 +302,7 @@ chan@3 {
|
||||
led-cur = /bits/ 8 <0x0>;
|
||||
max-cur = /bits/ 8 <0x0>;
|
||||
reg = <3>;
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -176,7 +176,18 @@ &fec {
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
|
||||
phy-handle = <&phy>;
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phy: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
qca,clk-out-frequency = <125000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
|
||||
@ -114,7 +114,7 @@ flash0: n25q256a@0 {
|
||||
compatible = "micron,n25q256a", "jedec,spi-nor";
|
||||
spi-max-frequency = <29000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
@ -124,7 +124,7 @@ flash1: n25q256a@2 {
|
||||
compatible = "micron,n25q256a", "jedec,spi-nor";
|
||||
spi-max-frequency = <29000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
reg = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -292,7 +292,7 @@ flash0: n25q256a@0 {
|
||||
compatible = "micron,n25q256a", "jedec,spi-nor";
|
||||
spi-max-frequency = <29000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -101,7 +101,7 @@ partition@280000 {
|
||||
|
||||
nand@1,0 {
|
||||
compatible = "ti,omap2-nand";
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
|
||||
interrupt-parent = <&gpmc>;
|
||||
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
|
||||
<1 IRQ_TYPE_NONE>; /* termcount */
|
||||
|
||||
@ -198,7 +198,7 @@ cxo_board: cxo_board {
|
||||
clock-frequency = <19200000>;
|
||||
};
|
||||
|
||||
pxo_board {
|
||||
pxo_board: pxo_board {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <27000000>;
|
||||
@ -1148,22 +1148,21 @@ tcsr: syscon@1a400000 {
|
||||
};
|
||||
|
||||
gpu: adreno-3xx@4300000 {
|
||||
compatible = "qcom,adreno-3xx";
|
||||
compatible = "qcom,adreno-320.2", "qcom,adreno";
|
||||
reg = <0x04300000 0x20000>;
|
||||
reg-names = "kgsl_3d0_reg_memory";
|
||||
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "kgsl_3d0_irq";
|
||||
clock-names =
|
||||
"core_clk",
|
||||
"iface_clk",
|
||||
"mem_clk",
|
||||
"mem_iface_clk";
|
||||
"core",
|
||||
"iface",
|
||||
"mem",
|
||||
"mem_iface";
|
||||
clocks =
|
||||
<&mmcc GFX3D_CLK>,
|
||||
<&mmcc GFX3D_AHB_CLK>,
|
||||
<&mmcc GFX3D_AXI_CLK>,
|
||||
<&mmcc MMSS_IMEM_AHB_CLK>;
|
||||
qcom,chipid = <0x03020002>;
|
||||
|
||||
iommus = <&gfx3d 0
|
||||
&gfx3d 1
|
||||
@ -1306,7 +1305,7 @@ dsi0_phy: dsi-phy@4700200 {
|
||||
reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
|
||||
clock-names = "iface_clk", "ref";
|
||||
clocks = <&mmcc DSI_M_AHB_CLK>,
|
||||
<&cxo_board>;
|
||||
<&pxo_board>;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -75,6 +75,17 @@ soc {
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
securam: securam@e0000000 {
|
||||
compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram";
|
||||
reg = <0xe0000000 0x4000>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0xe0000000 0x4000>;
|
||||
no-memory-wc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
secumod: secumod@e0004000 {
|
||||
compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon";
|
||||
reg = <0xe0004000 0x4000>;
|
||||
@ -111,6 +122,17 @@ pmc: pmc@e0018000 {
|
||||
clock-names = "td_slck", "md_slck", "main_xtal";
|
||||
};
|
||||
|
||||
shdwc: shdwc@e001d010 {
|
||||
compatible = "microchip,sama7g5-shdwc", "syscon";
|
||||
reg = <0xe001d010 0x10>;
|
||||
clocks = <&clk32k 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
atmel,wakeup-rtc-timer;
|
||||
atmel,wakeup-rtt-timer;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
rtt: rtt@e001d020 {
|
||||
compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
|
||||
reg = <0xe001d020 0x30>;
|
||||
@ -137,6 +159,11 @@ ps_wdt: watchdog@e001d180 {
|
||||
clocks = <&clk32k 0>;
|
||||
};
|
||||
|
||||
chipid@e0020000 {
|
||||
compatible = "microchip,sama7g5-chipid";
|
||||
reg = <0xe0020000 0x8>;
|
||||
};
|
||||
|
||||
sdmmc0: mmc@e1204000 {
|
||||
compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
|
||||
reg = <0xe1204000 0x4000>;
|
||||
@ -515,6 +542,18 @@ spi11: spi@400 {
|
||||
};
|
||||
};
|
||||
|
||||
uddrc: uddrc@e3800000 {
|
||||
compatible = "microchip,sama7g5-uddrc";
|
||||
reg = <0xe3800000 0x4000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ddr3phy: ddr3phy@e3804000 {
|
||||
compatible = "microchip,sama7g5-ddr3phy";
|
||||
reg = <0xe3804000 0x1000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
gic: interrupt-controller@e8c11000 {
|
||||
compatible = "arm,cortex-a7-gic";
|
||||
#interrupt-cells = <3>;
|
||||
|
||||
@ -17,6 +17,7 @@
|
||||
* TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
|
||||
* CHANGES TO vexpress-v2m.dtsi!
|
||||
*/
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
/ {
|
||||
v2m_fixed_3v3: fixed-regulator-0 {
|
||||
@ -101,16 +102,68 @@ led-8 {
|
||||
};
|
||||
|
||||
bus@8000000 {
|
||||
motherboard-bus {
|
||||
model = "V2M-P1";
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 63>;
|
||||
interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
motherboard-bus@8000000 {
|
||||
arm,hbi = <0x190>;
|
||||
arm,vexpress,site = <0>;
|
||||
arm,v2m-memory-map = "rs1";
|
||||
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
ranges = <0 0 0x08000000 0x04000000>,
|
||||
<1 0 0x14000000 0x04000000>,
|
||||
<2 0 0x18000000 0x04000000>,
|
||||
<3 0 0x1c000000 0x04000000>,
|
||||
<4 0 0x0c000000 0x04000000>,
|
||||
<5 0 0x10000000 0x04000000>;
|
||||
|
||||
nor_flash: flash@0 {
|
||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||
@ -215,7 +268,7 @@ aaci@40000 {
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
mmci@50000 {
|
||||
mmc@50000 {
|
||||
compatible = "arm,pl180", "arm,primecell";
|
||||
reg = <0x050000 0x1000>;
|
||||
interrupts = <9>, <10>;
|
||||
@ -275,7 +328,7 @@ v2m_serial3: serial@c0000 {
|
||||
clock-names = "uartclk", "apb_pclk";
|
||||
};
|
||||
|
||||
wdt@f0000 {
|
||||
watchdog@f0000 {
|
||||
compatible = "arm,sp805", "arm,primecell";
|
||||
reg = <0x0f0000 0x1000>;
|
||||
interrupts = <0>;
|
||||
|
||||
@ -17,18 +17,73 @@
|
||||
* TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
|
||||
* CHANGES TO vexpress-v2m-rs1.dtsi!
|
||||
*/
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
/ {
|
||||
bus@4000000 {
|
||||
motherboard {
|
||||
model = "V2M-P1";
|
||||
bus@40000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x40000000 0x40000000 0x10000000>,
|
||||
<0x10000000 0x10000000 0x00020000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 63>;
|
||||
interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
motherboard-bus@40000000 {
|
||||
arm,hbi = <0x190>;
|
||||
arm,vexpress,site = <0>;
|
||||
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
ranges = <0 0 0x40000000 0x04000000>,
|
||||
<1 0 0x44000000 0x04000000>,
|
||||
<2 0 0x48000000 0x04000000>,
|
||||
<3 0 0x4c000000 0x04000000>,
|
||||
<7 0 0x10000000 0x00020000>;
|
||||
|
||||
flash@0,00000000 {
|
||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||
|
||||
@ -237,62 +237,7 @@ energy {
|
||||
};
|
||||
|
||||
bus@8000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||
<1 0 0 0x14000000 0x04000000>,
|
||||
<2 0 0 0x18000000 0x04000000>,
|
||||
<3 0 0 0x1c000000 0x04000000>,
|
||||
<4 0 0 0x0c000000 0x04000000>,
|
||||
<5 0 0 0x10000000 0x04000000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 63>;
|
||||
interrupt-map = <0 0 0 &gic 0 0 4>,
|
||||
<0 0 1 &gic 0 1 4>,
|
||||
<0 0 2 &gic 0 2 4>,
|
||||
<0 0 3 &gic 0 3 4>,
|
||||
<0 0 4 &gic 0 4 4>,
|
||||
<0 0 5 &gic 0 5 4>,
|
||||
<0 0 6 &gic 0 6 4>,
|
||||
<0 0 7 &gic 0 7 4>,
|
||||
<0 0 8 &gic 0 8 4>,
|
||||
<0 0 9 &gic 0 9 4>,
|
||||
<0 0 10 &gic 0 10 4>,
|
||||
<0 0 11 &gic 0 11 4>,
|
||||
<0 0 12 &gic 0 12 4>,
|
||||
<0 0 13 &gic 0 13 4>,
|
||||
<0 0 14 &gic 0 14 4>,
|
||||
<0 0 15 &gic 0 15 4>,
|
||||
<0 0 16 &gic 0 16 4>,
|
||||
<0 0 17 &gic 0 17 4>,
|
||||
<0 0 18 &gic 0 18 4>,
|
||||
<0 0 19 &gic 0 19 4>,
|
||||
<0 0 20 &gic 0 20 4>,
|
||||
<0 0 21 &gic 0 21 4>,
|
||||
<0 0 22 &gic 0 22 4>,
|
||||
<0 0 23 &gic 0 23 4>,
|
||||
<0 0 24 &gic 0 24 4>,
|
||||
<0 0 25 &gic 0 25 4>,
|
||||
<0 0 26 &gic 0 26 4>,
|
||||
<0 0 27 &gic 0 27 4>,
|
||||
<0 0 28 &gic 0 28 4>,
|
||||
<0 0 29 &gic 0 29 4>,
|
||||
<0 0 30 &gic 0 30 4>,
|
||||
<0 0 31 &gic 0 31 4>,
|
||||
<0 0 32 &gic 0 32 4>,
|
||||
<0 0 33 &gic 0 33 4>,
|
||||
<0 0 34 &gic 0 34 4>,
|
||||
<0 0 35 &gic 0 35 4>,
|
||||
<0 0 36 &gic 0 36 4>,
|
||||
<0 0 37 &gic 0 37 4>,
|
||||
<0 0 38 &gic 0 38 4>,
|
||||
<0 0 39 &gic 0 39 4>,
|
||||
<0 0 40 &gic 0 40 4>,
|
||||
<0 0 41 &gic 0 41 4>,
|
||||
<0 0 42 &gic 0 42 4>;
|
||||
ranges = <0x8000000 0 0x8000000 0x18000000>;
|
||||
};
|
||||
|
||||
site2: hsb@40000000 {
|
||||
|
||||
@ -609,62 +609,7 @@ etm2_out_port: endpoint {
|
||||
};
|
||||
|
||||
smb: bus@8000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||
<1 0 0 0x14000000 0x04000000>,
|
||||
<2 0 0 0x18000000 0x04000000>,
|
||||
<3 0 0 0x1c000000 0x04000000>,
|
||||
<4 0 0 0x0c000000 0x04000000>,
|
||||
<5 0 0 0x10000000 0x04000000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 63>;
|
||||
interrupt-map = <0 0 0 &gic 0 0 4>,
|
||||
<0 0 1 &gic 0 1 4>,
|
||||
<0 0 2 &gic 0 2 4>,
|
||||
<0 0 3 &gic 0 3 4>,
|
||||
<0 0 4 &gic 0 4 4>,
|
||||
<0 0 5 &gic 0 5 4>,
|
||||
<0 0 6 &gic 0 6 4>,
|
||||
<0 0 7 &gic 0 7 4>,
|
||||
<0 0 8 &gic 0 8 4>,
|
||||
<0 0 9 &gic 0 9 4>,
|
||||
<0 0 10 &gic 0 10 4>,
|
||||
<0 0 11 &gic 0 11 4>,
|
||||
<0 0 12 &gic 0 12 4>,
|
||||
<0 0 13 &gic 0 13 4>,
|
||||
<0 0 14 &gic 0 14 4>,
|
||||
<0 0 15 &gic 0 15 4>,
|
||||
<0 0 16 &gic 0 16 4>,
|
||||
<0 0 17 &gic 0 17 4>,
|
||||
<0 0 18 &gic 0 18 4>,
|
||||
<0 0 19 &gic 0 19 4>,
|
||||
<0 0 20 &gic 0 20 4>,
|
||||
<0 0 21 &gic 0 21 4>,
|
||||
<0 0 22 &gic 0 22 4>,
|
||||
<0 0 23 &gic 0 23 4>,
|
||||
<0 0 24 &gic 0 24 4>,
|
||||
<0 0 25 &gic 0 25 4>,
|
||||
<0 0 26 &gic 0 26 4>,
|
||||
<0 0 27 &gic 0 27 4>,
|
||||
<0 0 28 &gic 0 28 4>,
|
||||
<0 0 29 &gic 0 29 4>,
|
||||
<0 0 30 &gic 0 30 4>,
|
||||
<0 0 31 &gic 0 31 4>,
|
||||
<0 0 32 &gic 0 32 4>,
|
||||
<0 0 33 &gic 0 33 4>,
|
||||
<0 0 34 &gic 0 34 4>,
|
||||
<0 0 35 &gic 0 35 4>,
|
||||
<0 0 36 &gic 0 36 4>,
|
||||
<0 0 37 &gic 0 37 4>,
|
||||
<0 0 38 &gic 0 38 4>,
|
||||
<0 0 39 &gic 0 39 4>,
|
||||
<0 0 40 &gic 0 40 4>,
|
||||
<0 0 41 &gic 0 41 4>,
|
||||
<0 0 42 &gic 0 42 4>;
|
||||
ranges = <0x8000000 0 0x8000000 0x18000000>;
|
||||
};
|
||||
|
||||
site2: hsb@40000000 {
|
||||
|
||||
@ -207,62 +207,7 @@ temp-dcc {
|
||||
};
|
||||
|
||||
smb: bus@8000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x08000000 0x04000000>,
|
||||
<1 0 0x14000000 0x04000000>,
|
||||
<2 0 0x18000000 0x04000000>,
|
||||
<3 0 0x1c000000 0x04000000>,
|
||||
<4 0 0x0c000000 0x04000000>,
|
||||
<5 0 0x10000000 0x04000000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 63>;
|
||||
interrupt-map = <0 0 0 &gic 0 0 4>,
|
||||
<0 0 1 &gic 0 1 4>,
|
||||
<0 0 2 &gic 0 2 4>,
|
||||
<0 0 3 &gic 0 3 4>,
|
||||
<0 0 4 &gic 0 4 4>,
|
||||
<0 0 5 &gic 0 5 4>,
|
||||
<0 0 6 &gic 0 6 4>,
|
||||
<0 0 7 &gic 0 7 4>,
|
||||
<0 0 8 &gic 0 8 4>,
|
||||
<0 0 9 &gic 0 9 4>,
|
||||
<0 0 10 &gic 0 10 4>,
|
||||
<0 0 11 &gic 0 11 4>,
|
||||
<0 0 12 &gic 0 12 4>,
|
||||
<0 0 13 &gic 0 13 4>,
|
||||
<0 0 14 &gic 0 14 4>,
|
||||
<0 0 15 &gic 0 15 4>,
|
||||
<0 0 16 &gic 0 16 4>,
|
||||
<0 0 17 &gic 0 17 4>,
|
||||
<0 0 18 &gic 0 18 4>,
|
||||
<0 0 19 &gic 0 19 4>,
|
||||
<0 0 20 &gic 0 20 4>,
|
||||
<0 0 21 &gic 0 21 4>,
|
||||
<0 0 22 &gic 0 22 4>,
|
||||
<0 0 23 &gic 0 23 4>,
|
||||
<0 0 24 &gic 0 24 4>,
|
||||
<0 0 25 &gic 0 25 4>,
|
||||
<0 0 26 &gic 0 26 4>,
|
||||
<0 0 27 &gic 0 27 4>,
|
||||
<0 0 28 &gic 0 28 4>,
|
||||
<0 0 29 &gic 0 29 4>,
|
||||
<0 0 30 &gic 0 30 4>,
|
||||
<0 0 31 &gic 0 31 4>,
|
||||
<0 0 32 &gic 0 32 4>,
|
||||
<0 0 33 &gic 0 33 4>,
|
||||
<0 0 34 &gic 0 34 4>,
|
||||
<0 0 35 &gic 0 35 4>,
|
||||
<0 0 36 &gic 0 36 4>,
|
||||
<0 0 37 &gic 0 37 4>,
|
||||
<0 0 38 &gic 0 38 4>,
|
||||
<0 0 39 &gic 0 39 4>,
|
||||
<0 0 40 &gic 0 40 4>,
|
||||
<0 0 41 &gic 0 41 4>,
|
||||
<0 0 42 &gic 0 42 4>;
|
||||
ranges = <0 0x8000000 0x18000000>;
|
||||
};
|
||||
|
||||
site2: hsb@40000000 {
|
||||
|
||||
@ -295,64 +295,6 @@ power-vd10-s3 {
|
||||
};
|
||||
};
|
||||
|
||||
smb: bus@4000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x40000000 0x04000000>,
|
||||
<1 0 0x44000000 0x04000000>,
|
||||
<2 0 0x48000000 0x04000000>,
|
||||
<3 0 0x4c000000 0x04000000>,
|
||||
<7 0 0x10000000 0x00020000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 63>;
|
||||
interrupt-map = <0 0 0 &gic 0 0 4>,
|
||||
<0 0 1 &gic 0 1 4>,
|
||||
<0 0 2 &gic 0 2 4>,
|
||||
<0 0 3 &gic 0 3 4>,
|
||||
<0 0 4 &gic 0 4 4>,
|
||||
<0 0 5 &gic 0 5 4>,
|
||||
<0 0 6 &gic 0 6 4>,
|
||||
<0 0 7 &gic 0 7 4>,
|
||||
<0 0 8 &gic 0 8 4>,
|
||||
<0 0 9 &gic 0 9 4>,
|
||||
<0 0 10 &gic 0 10 4>,
|
||||
<0 0 11 &gic 0 11 4>,
|
||||
<0 0 12 &gic 0 12 4>,
|
||||
<0 0 13 &gic 0 13 4>,
|
||||
<0 0 14 &gic 0 14 4>,
|
||||
<0 0 15 &gic 0 15 4>,
|
||||
<0 0 16 &gic 0 16 4>,
|
||||
<0 0 17 &gic 0 17 4>,
|
||||
<0 0 18 &gic 0 18 4>,
|
||||
<0 0 19 &gic 0 19 4>,
|
||||
<0 0 20 &gic 0 20 4>,
|
||||
<0 0 21 &gic 0 21 4>,
|
||||
<0 0 22 &gic 0 22 4>,
|
||||
<0 0 23 &gic 0 23 4>,
|
||||
<0 0 24 &gic 0 24 4>,
|
||||
<0 0 25 &gic 0 25 4>,
|
||||
<0 0 26 &gic 0 26 4>,
|
||||
<0 0 27 &gic 0 27 4>,
|
||||
<0 0 28 &gic 0 28 4>,
|
||||
<0 0 29 &gic 0 29 4>,
|
||||
<0 0 30 &gic 0 30 4>,
|
||||
<0 0 31 &gic 0 31 4>,
|
||||
<0 0 32 &gic 0 32 4>,
|
||||
<0 0 33 &gic 0 33 4>,
|
||||
<0 0 34 &gic 0 34 4>,
|
||||
<0 0 35 &gic 0 35 4>,
|
||||
<0 0 36 &gic 0 36 4>,
|
||||
<0 0 37 &gic 0 37 4>,
|
||||
<0 0 38 &gic 0 38 4>,
|
||||
<0 0 39 &gic 0 39 4>,
|
||||
<0 0 40 &gic 0 40 4>,
|
||||
<0 0 41 &gic 0 41 4>,
|
||||
<0 0 42 &gic 0 42 4>;
|
||||
};
|
||||
|
||||
site2: hsb@e0000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
|
||||
@ -40,7 +40,9 @@ EXPORT_SYMBOL(sharpsl_param);
|
||||
|
||||
void sharpsl_save_param(void)
|
||||
{
|
||||
memcpy(&sharpsl_param, param_start(PARAM_BASE), sizeof(struct sharpsl_param_info));
|
||||
struct sharpsl_param_info *params = param_start(PARAM_BASE);
|
||||
|
||||
memcpy(&sharpsl_param, params, sizeof(*params));
|
||||
|
||||
if (sharpsl_param.comadj_keyword != COMADJ_MAGIC)
|
||||
sharpsl_param.comadj=-1;
|
||||
|
||||
@ -76,6 +76,7 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_PANEL_ILITEK_IL9322=y
|
||||
CONFIG_DRM_TVE200=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_MON=y
|
||||
|
||||
@ -292,6 +292,7 @@ CONFIG_DRM_IMX_LDB=y
|
||||
CONFIG_DRM_IMX_HDMI=y
|
||||
CONFIG_DRM_ETNAVIV=y
|
||||
CONFIG_DRM_MXSFB=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_MODE_HELPERS=y
|
||||
CONFIG_LCD_CLASS_DEVICE=y
|
||||
CONFIG_LCD_L4F00242T03=y
|
||||
|
||||
@ -456,6 +456,7 @@ CONFIG_PINCTRL_STMFX=y
|
||||
CONFIG_PINCTRL_PALMAS=y
|
||||
CONFIG_PINCTRL_OWL=y
|
||||
CONFIG_PINCTRL_S500=y
|
||||
CONFIG_PINCTRL_MSM=y
|
||||
CONFIG_PINCTRL_APQ8064=y
|
||||
CONFIG_PINCTRL_APQ8084=y
|
||||
CONFIG_PINCTRL_IPQ8064=y
|
||||
@ -725,6 +726,7 @@ CONFIG_DRM_PL111=m
|
||||
CONFIG_DRM_LIMA=m
|
||||
CONFIG_DRM_PANFROST=m
|
||||
CONFIG_DRM_ASPEED_GFX=m
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_EFI=y
|
||||
CONFIG_FB_WM8505=y
|
||||
CONFIG_FB_SH_MOBILE_LCDC=y
|
||||
@ -1122,6 +1124,7 @@ CONFIG_PHY_DM816X_USB=m
|
||||
CONFIG_OMAP_USB2=y
|
||||
CONFIG_TI_PIPE3=y
|
||||
CONFIG_TWL4030_USB=m
|
||||
CONFIG_RAS=y
|
||||
CONFIG_NVMEM_IMX_OCOTP=y
|
||||
CONFIG_ROCKCHIP_EFUSE=m
|
||||
CONFIG_NVMEM_SUNXI_SID=y
|
||||
|
||||
@ -628,7 +628,6 @@ do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall)
|
||||
uprobe_notify_resume(regs);
|
||||
} else {
|
||||
tracehook_notify_resume(regs);
|
||||
rseq_handle_notify_resume(NULL, regs);
|
||||
}
|
||||
}
|
||||
local_irq_disable();
|
||||
|
||||
@ -47,12 +47,26 @@ struct at91_pm_bu {
|
||||
unsigned long ddr_phy_calibration[BACKUP_DDR_PHY_CALIBRATION];
|
||||
};
|
||||
|
||||
/*
|
||||
* struct at91_pm_sfrbu_offsets: registers mapping for SFRBU
|
||||
* @pswbu: power switch BU control registers
|
||||
*/
|
||||
struct at91_pm_sfrbu_regs {
|
||||
struct {
|
||||
u32 key;
|
||||
u32 ctrl;
|
||||
u32 state;
|
||||
u32 softsw;
|
||||
} pswbu;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct at91_soc_pm - AT91 SoC power management data structure
|
||||
* @config_shdwc_ws: wakeup sources configuration function for SHDWC
|
||||
* @config_pmc_ws: wakeup srouces configuration function for PMC
|
||||
* @ws_ids: wakup sources of_device_id array
|
||||
* @data: PM data to be used on last phase of suspend
|
||||
* @sfrbu_regs: SFRBU registers mapping
|
||||
* @bu: backup unit mapped data (for backup mode)
|
||||
* @memcs: memory chip select
|
||||
*/
|
||||
@ -62,6 +76,7 @@ struct at91_soc_pm {
|
||||
const struct of_device_id *ws_ids;
|
||||
struct at91_pm_bu *bu;
|
||||
struct at91_pm_data data;
|
||||
struct at91_pm_sfrbu_regs sfrbu_regs;
|
||||
void *memcs;
|
||||
};
|
||||
|
||||
@ -356,9 +371,36 @@ static int at91_suspend_finish(unsigned long val)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void at91_pm_switch_ba_to_vbat(void)
|
||||
{
|
||||
unsigned int offset = offsetof(struct at91_pm_sfrbu_regs, pswbu);
|
||||
unsigned int val;
|
||||
|
||||
/* Just for safety. */
|
||||
if (!soc_pm.data.sfrbu)
|
||||
return;
|
||||
|
||||
val = readl(soc_pm.data.sfrbu + offset);
|
||||
|
||||
/* Already on VBAT. */
|
||||
if (!(val & soc_pm.sfrbu_regs.pswbu.state))
|
||||
return;
|
||||
|
||||
val &= ~soc_pm.sfrbu_regs.pswbu.softsw;
|
||||
val |= soc_pm.sfrbu_regs.pswbu.key | soc_pm.sfrbu_regs.pswbu.ctrl;
|
||||
writel(val, soc_pm.data.sfrbu + offset);
|
||||
|
||||
/* Wait for update. */
|
||||
val = readl(soc_pm.data.sfrbu + offset);
|
||||
while (val & soc_pm.sfrbu_regs.pswbu.state)
|
||||
val = readl(soc_pm.data.sfrbu + offset);
|
||||
}
|
||||
|
||||
static void at91_pm_suspend(suspend_state_t state)
|
||||
{
|
||||
if (soc_pm.data.mode == AT91_PM_BACKUP) {
|
||||
at91_pm_switch_ba_to_vbat();
|
||||
|
||||
cpu_suspend(0, at91_suspend_finish);
|
||||
|
||||
/* The SRAM is lost between suspend cycles */
|
||||
@ -589,18 +631,22 @@ static const struct of_device_id ramc_phy_ids[] __initconst = {
|
||||
{ /* Sentinel. */ },
|
||||
};
|
||||
|
||||
static __init void at91_dt_ramc(bool phy_mandatory)
|
||||
static __init int at91_dt_ramc(bool phy_mandatory)
|
||||
{
|
||||
struct device_node *np;
|
||||
const struct of_device_id *of_id;
|
||||
int idx = 0;
|
||||
void *standby = NULL;
|
||||
const struct ramc_info *ramc;
|
||||
int ret;
|
||||
|
||||
for_each_matching_node_and_match(np, ramc_ids, &of_id) {
|
||||
soc_pm.data.ramc[idx] = of_iomap(np, 0);
|
||||
if (!soc_pm.data.ramc[idx])
|
||||
panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
|
||||
if (!soc_pm.data.ramc[idx]) {
|
||||
pr_err("unable to map ramc[%d] cpu registers\n", idx);
|
||||
ret = -ENOMEM;
|
||||
goto unmap_ramc;
|
||||
}
|
||||
|
||||
ramc = of_id->data;
|
||||
if (ramc) {
|
||||
@ -612,25 +658,42 @@ static __init void at91_dt_ramc(bool phy_mandatory)
|
||||
idx++;
|
||||
}
|
||||
|
||||
if (!idx)
|
||||
panic(pr_fmt("unable to find compatible ram controller node in dtb\n"));
|
||||
if (!idx) {
|
||||
pr_err("unable to find compatible ram controller node in dtb\n");
|
||||
ret = -ENODEV;
|
||||
goto unmap_ramc;
|
||||
}
|
||||
|
||||
/* Lookup for DDR PHY node, if any. */
|
||||
for_each_matching_node_and_match(np, ramc_phy_ids, &of_id) {
|
||||
soc_pm.data.ramc_phy = of_iomap(np, 0);
|
||||
if (!soc_pm.data.ramc_phy)
|
||||
panic(pr_fmt("unable to map ramc phy cpu registers\n"));
|
||||
if (!soc_pm.data.ramc_phy) {
|
||||
pr_err("unable to map ramc phy cpu registers\n");
|
||||
ret = -ENOMEM;
|
||||
goto unmap_ramc;
|
||||
}
|
||||
}
|
||||
|
||||
if (phy_mandatory && !soc_pm.data.ramc_phy)
|
||||
panic(pr_fmt("DDR PHY is mandatory!\n"));
|
||||
if (phy_mandatory && !soc_pm.data.ramc_phy) {
|
||||
pr_err("DDR PHY is mandatory!\n");
|
||||
ret = -ENODEV;
|
||||
goto unmap_ramc;
|
||||
}
|
||||
|
||||
if (!standby) {
|
||||
pr_warn("ramc no standby function available\n");
|
||||
return;
|
||||
return 0;
|
||||
}
|
||||
|
||||
at91_cpuidle_device.dev.platform_data = standby;
|
||||
|
||||
return 0;
|
||||
|
||||
unmap_ramc:
|
||||
while (idx)
|
||||
iounmap(soc_pm.data.ramc[--idx]);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void at91rm9200_idle(void)
|
||||
@ -1017,6 +1080,8 @@ static void __init at91_pm_init(void (*pm_idle)(void))
|
||||
|
||||
void __init at91rm9200_pm_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_SOC_AT91RM9200))
|
||||
return;
|
||||
|
||||
@ -1028,7 +1093,9 @@ void __init at91rm9200_pm_init(void)
|
||||
soc_pm.data.standby_mode = AT91_PM_STANDBY;
|
||||
soc_pm.data.suspend_mode = AT91_PM_ULP0;
|
||||
|
||||
at91_dt_ramc(false);
|
||||
ret = at91_dt_ramc(false);
|
||||
if (ret)
|
||||
return;
|
||||
|
||||
/*
|
||||
* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.
|
||||
@ -1046,13 +1113,17 @@ void __init sam9x60_pm_init(void)
|
||||
static const int iomaps[] __initconst = {
|
||||
[AT91_PM_ULP1] = AT91_PM_IOMAP(SHDWC),
|
||||
};
|
||||
int ret;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_SOC_SAM9X60))
|
||||
return;
|
||||
|
||||
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
||||
at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
|
||||
at91_dt_ramc(false);
|
||||
ret = at91_dt_ramc(false);
|
||||
if (ret)
|
||||
return;
|
||||
|
||||
at91_pm_init(NULL);
|
||||
|
||||
soc_pm.ws_ids = sam9x60_ws_ids;
|
||||
@ -1061,6 +1132,8 @@ void __init sam9x60_pm_init(void)
|
||||
|
||||
void __init at91sam9_pm_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_SOC_AT91SAM9))
|
||||
return;
|
||||
|
||||
@ -1072,7 +1145,10 @@ void __init at91sam9_pm_init(void)
|
||||
soc_pm.data.standby_mode = AT91_PM_STANDBY;
|
||||
soc_pm.data.suspend_mode = AT91_PM_ULP0;
|
||||
|
||||
at91_dt_ramc(false);
|
||||
ret = at91_dt_ramc(false);
|
||||
if (ret)
|
||||
return;
|
||||
|
||||
at91_pm_init(at91sam9_idle);
|
||||
}
|
||||
|
||||
@ -1081,12 +1157,16 @@ void __init sama5_pm_init(void)
|
||||
static const int modes[] __initconst = {
|
||||
AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST,
|
||||
};
|
||||
int ret;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_SOC_SAMA5))
|
||||
return;
|
||||
|
||||
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
||||
at91_dt_ramc(false);
|
||||
ret = at91_dt_ramc(false);
|
||||
if (ret)
|
||||
return;
|
||||
|
||||
at91_pm_init(NULL);
|
||||
}
|
||||
|
||||
@ -1101,18 +1181,27 @@ void __init sama5d2_pm_init(void)
|
||||
[AT91_PM_BACKUP] = AT91_PM_IOMAP(SHDWC) |
|
||||
AT91_PM_IOMAP(SFRBU),
|
||||
};
|
||||
int ret;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_SOC_SAMA5D2))
|
||||
return;
|
||||
|
||||
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
||||
at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
|
||||
at91_dt_ramc(false);
|
||||
ret = at91_dt_ramc(false);
|
||||
if (ret)
|
||||
return;
|
||||
|
||||
at91_pm_init(NULL);
|
||||
|
||||
soc_pm.ws_ids = sama5d2_ws_ids;
|
||||
soc_pm.config_shdwc_ws = at91_sama5d2_config_shdwc_ws;
|
||||
soc_pm.config_pmc_ws = at91_sama5d2_config_pmc_ws;
|
||||
|
||||
soc_pm.sfrbu_regs.pswbu.key = (0x4BD20C << 8);
|
||||
soc_pm.sfrbu_regs.pswbu.ctrl = BIT(0);
|
||||
soc_pm.sfrbu_regs.pswbu.softsw = BIT(1);
|
||||
soc_pm.sfrbu_regs.pswbu.state = BIT(3);
|
||||
}
|
||||
|
||||
void __init sama7_pm_init(void)
|
||||
@ -1127,18 +1216,27 @@ void __init sama7_pm_init(void)
|
||||
[AT91_PM_BACKUP] = AT91_PM_IOMAP(SFRBU) |
|
||||
AT91_PM_IOMAP(SHDWC),
|
||||
};
|
||||
int ret;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_SOC_SAMA7))
|
||||
return;
|
||||
|
||||
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
|
||||
|
||||
at91_dt_ramc(true);
|
||||
ret = at91_dt_ramc(true);
|
||||
if (ret)
|
||||
return;
|
||||
|
||||
at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
|
||||
at91_pm_init(NULL);
|
||||
|
||||
soc_pm.ws_ids = sama7g5_ws_ids;
|
||||
soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws;
|
||||
|
||||
soc_pm.sfrbu_regs.pswbu.key = (0x4BD20C << 8);
|
||||
soc_pm.sfrbu_regs.pswbu.ctrl = BIT(0);
|
||||
soc_pm.sfrbu_regs.pswbu.softsw = BIT(1);
|
||||
soc_pm.sfrbu_regs.pswbu.state = BIT(2);
|
||||
}
|
||||
|
||||
static int __init at91_pm_modes_select(char *str)
|
||||
|
||||
@ -1014,31 +1014,55 @@ ENTRY(at91_pm_suspend_in_sram)
|
||||
mov tmp1, #0
|
||||
mcr p15, 0, tmp1, c7, c10, 4
|
||||
|
||||
ldr tmp1, [r0, #PM_DATA_PMC]
|
||||
str tmp1, .pmc_base
|
||||
ldr tmp1, [r0, #PM_DATA_RAMC0]
|
||||
str tmp1, .sramc_base
|
||||
ldr tmp1, [r0, #PM_DATA_RAMC1]
|
||||
str tmp1, .sramc1_base
|
||||
ldr tmp1, [r0, #PM_DATA_RAMC_PHY]
|
||||
str tmp1, .sramc_phy_base
|
||||
ldr tmp1, [r0, #PM_DATA_MEMCTRL]
|
||||
str tmp1, .memtype
|
||||
ldr tmp1, [r0, #PM_DATA_MODE]
|
||||
str tmp1, .pm_mode
|
||||
/* Flush tlb. */
|
||||
mov r4, #0
|
||||
mcr p15, 0, r4, c8, c7, 0
|
||||
|
||||
ldr tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
|
||||
str tmp1, .mckr_offset
|
||||
ldr tmp1, [r0, #PM_DATA_PMC_VERSION]
|
||||
str tmp1, .pmc_version
|
||||
/* Both ldrne below are here to preload their address in the TLB */
|
||||
ldr tmp1, [r0, #PM_DATA_MEMCTRL]
|
||||
str tmp1, .memtype
|
||||
ldr tmp1, [r0, #PM_DATA_MODE]
|
||||
str tmp1, .pm_mode
|
||||
|
||||
/*
|
||||
* ldrne below are here to preload their address in the TLB as access
|
||||
* to RAM may be limited while in self-refresh.
|
||||
*/
|
||||
ldr tmp1, [r0, #PM_DATA_PMC]
|
||||
str tmp1, .pmc_base
|
||||
cmp tmp1, #0
|
||||
ldrne tmp2, [tmp1, #0]
|
||||
|
||||
ldr tmp1, [r0, #PM_DATA_RAMC0]
|
||||
str tmp1, .sramc_base
|
||||
cmp tmp1, #0
|
||||
ldrne tmp2, [tmp1, #0]
|
||||
|
||||
ldr tmp1, [r0, #PM_DATA_RAMC1]
|
||||
str tmp1, .sramc1_base
|
||||
cmp tmp1, #0
|
||||
ldrne tmp2, [tmp1, #0]
|
||||
|
||||
#ifndef CONFIG_SOC_SAM_V4_V5
|
||||
/* ldrne below are here to preload their address in the TLB */
|
||||
ldr tmp1, [r0, #PM_DATA_RAMC_PHY]
|
||||
str tmp1, .sramc_phy_base
|
||||
cmp tmp1, #0
|
||||
ldrne tmp2, [tmp1, #0]
|
||||
|
||||
ldr tmp1, [r0, #PM_DATA_SHDWC]
|
||||
str tmp1, .shdwc
|
||||
cmp tmp1, #0
|
||||
ldrne tmp2, [tmp1, #0]
|
||||
|
||||
ldr tmp1, [r0, #PM_DATA_SFRBU]
|
||||
str tmp1, .sfrbu
|
||||
cmp tmp1, #0
|
||||
ldrne tmp2, [tmp1, #0x10]
|
||||
#endif
|
||||
|
||||
/* Active the self-refresh mode */
|
||||
at91_sramc_self_refresh_ena
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
|
||||
#define LSR_THRE 0x20
|
||||
|
||||
static void putc(const char c)
|
||||
static inline void putc(const char c)
|
||||
{
|
||||
int i;
|
||||
|
||||
@ -24,7 +24,7 @@ static void putc(const char c)
|
||||
*UART_THR = c;
|
||||
}
|
||||
|
||||
static void flush(void)
|
||||
static inline void flush(void)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
@ -172,6 +172,9 @@ static void __init imx6q_init_machine(void)
|
||||
imx_get_soc_revision());
|
||||
|
||||
imx6q_enet_phy_init();
|
||||
|
||||
of_platform_default_populate(NULL, NULL, NULL);
|
||||
|
||||
imx_anatop_init();
|
||||
cpu_is_imx6q() ? imx6q_pm_init() : imx6dl_pm_init();
|
||||
imx6q_1588_init();
|
||||
|
||||
@ -10,6 +10,7 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/genalloc.h>
|
||||
#include <linux/irqchip/arm-gic.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
|
||||
#include <linux/of.h>
|
||||
@ -619,6 +620,7 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata
|
||||
|
||||
static void imx6_pm_stby_poweroff(void)
|
||||
{
|
||||
gic_cpu_if_down(0);
|
||||
imx6_set_lpm(STOP_POWER_OFF);
|
||||
imx6q_suspend_finish(0);
|
||||
|
||||
|
||||
@ -9,16 +9,4 @@
|
||||
/* REVISIT: omap1 legacy drivers still rely on this */
|
||||
#include <mach/soc.h>
|
||||
|
||||
/*
|
||||
* Bus address is physical address, except for OMAP-1510 Local Bus.
|
||||
* OMAP-1510 bus address is translated into a Local Bus address if the
|
||||
* OMAP bus type is lbus. We do the address translation based on the
|
||||
* device overriding the defaults used in the dma-mapping API.
|
||||
*/
|
||||
|
||||
/*
|
||||
* OMAP-1510 Local Bus address offset
|
||||
*/
|
||||
#define OMAP1510_LB_OFFSET UL(0x30000000)
|
||||
|
||||
#endif
|
||||
|
||||
@ -11,6 +11,7 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/dma-map-ops.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
|
||||
@ -206,8 +207,6 @@ static inline void udc_device_init(struct omap_usb_config *pdata)
|
||||
|
||||
#endif
|
||||
|
||||
#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
|
||||
|
||||
/* The dmamask must be set for OHCI to work */
|
||||
static u64 ohci_dmamask = ~(u32)0;
|
||||
|
||||
@ -236,20 +235,15 @@ static struct platform_device ohci_device = {
|
||||
|
||||
static inline void ohci_device_init(struct omap_usb_config *pdata)
|
||||
{
|
||||
if (!IS_ENABLED(CONFIG_USB_OHCI_HCD))
|
||||
return;
|
||||
|
||||
if (cpu_is_omap7xx())
|
||||
ohci_resources[1].start = INT_7XX_USB_HHC_1;
|
||||
pdata->ohci_device = &ohci_device;
|
||||
pdata->ocpi_enable = &ocpi_enable;
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
static inline void ohci_device_init(struct omap_usb_config *pdata)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
|
||||
|
||||
static struct resource otg_resources[] = {
|
||||
@ -534,6 +528,79 @@ static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP15XX
|
||||
/* OMAP-1510 OHCI has its own MMU for DMA */
|
||||
#define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */
|
||||
#define OMAP1510_LB_CLOCK_DIV 0xfffec10c
|
||||
#define OMAP1510_LB_MMU_CTL 0xfffec208
|
||||
#define OMAP1510_LB_MMU_LCK 0xfffec224
|
||||
#define OMAP1510_LB_MMU_LD_TLB 0xfffec228
|
||||
#define OMAP1510_LB_MMU_CAM_H 0xfffec22c
|
||||
#define OMAP1510_LB_MMU_CAM_L 0xfffec230
|
||||
#define OMAP1510_LB_MMU_RAM_H 0xfffec234
|
||||
#define OMAP1510_LB_MMU_RAM_L 0xfffec238
|
||||
|
||||
/*
|
||||
* Bus address is physical address, except for OMAP-1510 Local Bus.
|
||||
* OMAP-1510 bus address is translated into a Local Bus address if the
|
||||
* OMAP bus type is lbus.
|
||||
*/
|
||||
#define OMAP1510_LB_OFFSET UL(0x30000000)
|
||||
|
||||
/*
|
||||
* OMAP-1510 specific Local Bus clock on/off
|
||||
*/
|
||||
static int omap_1510_local_bus_power(int on)
|
||||
{
|
||||
if (on) {
|
||||
omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
|
||||
udelay(200);
|
||||
} else {
|
||||
omap_writel(0, OMAP1510_LB_MMU_CTL);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* OMAP-1510 specific Local Bus initialization
|
||||
* NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
|
||||
* See also arch/mach-omap/memory.h for __virt_to_dma() and
|
||||
* __dma_to_virt() which need to match with the physical
|
||||
* Local Bus address below.
|
||||
*/
|
||||
static int omap_1510_local_bus_init(void)
|
||||
{
|
||||
unsigned int tlb;
|
||||
unsigned long lbaddr, physaddr;
|
||||
|
||||
omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
|
||||
OMAP1510_LB_CLOCK_DIV);
|
||||
|
||||
/* Configure the Local Bus MMU table */
|
||||
for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
|
||||
lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
|
||||
physaddr = tlb * 0x00100000 + PHYS_OFFSET;
|
||||
omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
|
||||
omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
|
||||
OMAP1510_LB_MMU_CAM_L);
|
||||
omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
|
||||
omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
|
||||
omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
|
||||
omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
|
||||
}
|
||||
|
||||
/* Enable the walking table */
|
||||
omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
|
||||
udelay(200);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void omap_1510_local_bus_reset(void)
|
||||
{
|
||||
omap_1510_local_bus_power(1);
|
||||
omap_1510_local_bus_init();
|
||||
}
|
||||
|
||||
/* ULPD_DPLL_CTRL */
|
||||
#define DPLL_IOB (1 << 13)
|
||||
@ -543,25 +610,6 @@ static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
|
||||
/* ULPD_APLL_CTRL */
|
||||
#define APLL_NDPLL_SWITCH (1 << 0)
|
||||
|
||||
static int omap_1510_usb_ohci_notifier(struct notifier_block *nb,
|
||||
unsigned long event, void *data)
|
||||
{
|
||||
struct device *dev = data;
|
||||
|
||||
if (event != BUS_NOTIFY_ADD_DEVICE)
|
||||
return NOTIFY_DONE;
|
||||
|
||||
if (strncmp(dev_name(dev), "ohci", 4) == 0 &&
|
||||
dma_direct_set_offset(dev, PHYS_OFFSET, OMAP1510_LB_OFFSET,
|
||||
(u64)-1))
|
||||
WARN_ONCE(1, "failed to set DMA offset\n");
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
static struct notifier_block omap_1510_usb_ohci_nb = {
|
||||
.notifier_call = omap_1510_usb_ohci_notifier,
|
||||
};
|
||||
|
||||
static void __init omap_1510_usb_init(struct omap_usb_config *config)
|
||||
{
|
||||
unsigned int val;
|
||||
@ -616,19 +664,19 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
|
||||
if (config->register_host) {
|
||||
if (IS_ENABLED(CONFIG_USB_OHCI_HCD) && config->register_host) {
|
||||
int status;
|
||||
|
||||
bus_register_notifier(&platform_bus_type,
|
||||
&omap_1510_usb_ohci_nb);
|
||||
ohci_device.dev.platform_data = config;
|
||||
dma_direct_set_offset(&ohci_device.dev, PHYS_OFFSET,
|
||||
OMAP1510_LB_OFFSET, (u64)-1);
|
||||
status = platform_device_register(&ohci_device);
|
||||
if (status)
|
||||
pr_debug("can't register OHCI device, %d\n", status);
|
||||
/* hcd explicitly gates 48MHz */
|
||||
|
||||
config->lb_reset = omap_1510_local_bus_reset;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
@ -3614,6 +3614,8 @@ int omap_hwmod_init_module(struct device *dev,
|
||||
oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
|
||||
if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
|
||||
oh->flags |= HWMOD_SWSUP_MSTANDBY;
|
||||
if (data->cfg->quirks & SYSC_QUIRK_CLKDM_NOAUTO)
|
||||
oh->flags |= HWMOD_CLKDM_NOAUTO;
|
||||
|
||||
error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
|
||||
rev_offs, sysc_offs, syss_offs,
|
||||
|
||||
@ -36,6 +36,10 @@
|
||||
* +-----+
|
||||
* |RSVD | JIT scratchpad
|
||||
* current ARM_SP => +-----+ <= (BPF_FP - STACK_SIZE + SCRATCH_SIZE)
|
||||
* | ... | caller-saved registers
|
||||
* +-----+
|
||||
* | ... | arguments passed on stack
|
||||
* ARM_SP during call => +-----|
|
||||
* | |
|
||||
* | ... | Function call stack
|
||||
* | |
|
||||
@ -63,6 +67,12 @@
|
||||
*
|
||||
* When popping registers off the stack at the end of a BPF function, we
|
||||
* reference them via the current ARM_FP register.
|
||||
*
|
||||
* Some eBPF operations are implemented via a call to a helper function.
|
||||
* Such calls are "invisible" in the eBPF code, so it is up to the calling
|
||||
* program to preserve any caller-saved ARM registers during the call. The
|
||||
* JIT emits code to push and pop those registers onto the stack, immediately
|
||||
* above the callee stack frame.
|
||||
*/
|
||||
#define CALLEE_MASK (1 << ARM_R4 | 1 << ARM_R5 | 1 << ARM_R6 | \
|
||||
1 << ARM_R7 | 1 << ARM_R8 | 1 << ARM_R9 | \
|
||||
@ -70,6 +80,8 @@
|
||||
#define CALLEE_PUSH_MASK (CALLEE_MASK | 1 << ARM_LR)
|
||||
#define CALLEE_POP_MASK (CALLEE_MASK | 1 << ARM_PC)
|
||||
|
||||
#define CALLER_MASK (1 << ARM_R0 | 1 << ARM_R1 | 1 << ARM_R2 | 1 << ARM_R3)
|
||||
|
||||
enum {
|
||||
/* Stack layout - these are offsets from (top of stack - 4) */
|
||||
BPF_R2_HI,
|
||||
@ -464,6 +476,7 @@ static inline int epilogue_offset(const struct jit_ctx *ctx)
|
||||
|
||||
static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op)
|
||||
{
|
||||
const int exclude_mask = BIT(ARM_R0) | BIT(ARM_R1);
|
||||
const s8 *tmp = bpf2a32[TMP_REG_1];
|
||||
|
||||
#if __LINUX_ARM_ARCH__ == 7
|
||||
@ -495,11 +508,17 @@ static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op)
|
||||
emit(ARM_MOV_R(ARM_R0, rm), ctx);
|
||||
}
|
||||
|
||||
/* Push caller-saved registers on stack */
|
||||
emit(ARM_PUSH(CALLER_MASK & ~exclude_mask), ctx);
|
||||
|
||||
/* Call appropriate function */
|
||||
emit_mov_i(ARM_IP, op == BPF_DIV ?
|
||||
(u32)jit_udiv32 : (u32)jit_mod32, ctx);
|
||||
emit_blx_r(ARM_IP, ctx);
|
||||
|
||||
/* Restore caller-saved registers from stack */
|
||||
emit(ARM_POP(CALLER_MASK & ~exclude_mask), ctx);
|
||||
|
||||
/* Save return value */
|
||||
if (rd != ARM_R0)
|
||||
emit(ARM_MOV_R(rd, ARM_R0), ctx);
|
||||
|
||||
@ -86,7 +86,7 @@ config ARM64
|
||||
select ARCH_SUPPORTS_LTO_CLANG_THIN
|
||||
select ARCH_SUPPORTS_CFI_CLANG
|
||||
select ARCH_SUPPORTS_ATOMIC_RMW
|
||||
select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 && (GCC_VERSION >= 50000 || CC_IS_CLANG)
|
||||
select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
|
||||
select ARCH_SUPPORTS_NUMA_BALANCING
|
||||
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT
|
||||
select ARCH_WANT_DEFAULT_BPF_JIT
|
||||
@ -1931,8 +1931,6 @@ source "drivers/cpufreq/Kconfig"
|
||||
|
||||
endmenu
|
||||
|
||||
source "drivers/firmware/Kconfig"
|
||||
|
||||
source "drivers/acpi/Kconfig"
|
||||
|
||||
source "arch/arm64/kvm/Kconfig"
|
||||
|
||||
@ -115,7 +115,6 @@ v2m_refclk32khz: refclk32khz {
|
||||
|
||||
bus@8000000 {
|
||||
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
||||
arm,v2m-memory-map = "rs1";
|
||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||
#size-cells = <1>;
|
||||
|
||||
|
||||
@ -192,32 +192,9 @@ panel_in: endpoint {
|
||||
remote-endpoint = <&clcd_pads>;
|
||||
};
|
||||
};
|
||||
|
||||
panel-timing {
|
||||
clock-frequency = <63500127>;
|
||||
hactive = <1024>;
|
||||
hback-porch = <152>;
|
||||
hfront-porch = <48>;
|
||||
hsync-len = <104>;
|
||||
vactive = <768>;
|
||||
vback-porch = <23>;
|
||||
vfront-porch = <3>;
|
||||
vsync-len = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
bus@8000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||
<1 0 0 0x14000000 0x04000000>,
|
||||
<2 0 0 0x18000000 0x04000000>,
|
||||
<3 0 0 0x1c000000 0x04000000>,
|
||||
<4 0 0 0x0c000000 0x04000000>,
|
||||
<5 0 0 0x10000000 0x04000000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 63>;
|
||||
interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
@ -27,8 +27,6 @@ mailbox: mhu@2b1f0000 {
|
||||
reg = <0x0 0x2b1f0000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "mhu_lpri_rx",
|
||||
"mhu_hpri_rx";
|
||||
#mbox-cells = <1>;
|
||||
clocks = <&soc_refclk100mhz>;
|
||||
clock-names = "apb_pclk";
|
||||
@ -804,16 +802,6 @@ memory@80000000 {
|
||||
};
|
||||
|
||||
bus@8000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||
<1 0 0 0x14000000 0x04000000>,
|
||||
<2 0 0 0x18000000 0x04000000>,
|
||||
<3 0 0 0x1c000000 0x04000000>,
|
||||
<4 0 0 0x0c000000 0x04000000>,
|
||||
<5 0 0 0x10000000 0x04000000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 15>;
|
||||
interrupt-map = <0 0 0 &gic 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
@ -92,16 +92,23 @@ nmi-button {
|
||||
};
|
||||
|
||||
bus@8000000 {
|
||||
motherboard-bus {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x8000000 0 0x8000000 0x18000000>;
|
||||
|
||||
motherboard-bus@8000000 {
|
||||
compatible = "arm,vexpress,v2p-p1", "simple-bus";
|
||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
model = "V2M-Juno";
|
||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||
<1 0 0 0x14000000 0x04000000>,
|
||||
<2 0 0 0x18000000 0x04000000>,
|
||||
<3 0 0 0x1c000000 0x04000000>,
|
||||
<4 0 0 0x0c000000 0x04000000>,
|
||||
<5 0 0 0x10000000 0x04000000>;
|
||||
arm,hbi = <0x252>;
|
||||
arm,vexpress,site = <0>;
|
||||
arm,v2m-memory-map = "rs1";
|
||||
|
||||
flash@0 {
|
||||
/* 2 * 32MiB NOR Flash memory mounted on CS0 */
|
||||
@ -218,7 +225,7 @@ led7 {
|
||||
};
|
||||
};
|
||||
|
||||
mmci@50000 {
|
||||
mmc@50000 {
|
||||
compatible = "arm,pl180", "arm,primecell";
|
||||
reg = <0x050000 0x1000>;
|
||||
interrupts = <5>;
|
||||
@ -246,7 +253,7 @@ kmi@70000 {
|
||||
clock-names = "KMIREFCLK", "apb_pclk";
|
||||
};
|
||||
|
||||
wdt@f0000 {
|
||||
watchdog@f0000 {
|
||||
compatible = "arm,sp805", "arm,primecell";
|
||||
reg = <0x0f0000 0x10000>;
|
||||
interrupts = <7>;
|
||||
|
||||
@ -133,17 +133,6 @@ panel_in: endpoint {
|
||||
};
|
||||
|
||||
bus@8000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||
<1 0 0 0x14000000 0x04000000>,
|
||||
<2 0 0 0x18000000 0x04000000>,
|
||||
<3 0 0 0x1c000000 0x04000000>,
|
||||
<4 0 0 0x0c000000 0x04000000>,
|
||||
<5 0 0 0x10000000 0x04000000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 63>;
|
||||
interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
*/
|
||||
/ {
|
||||
bus@8000000 {
|
||||
motherboard-bus {
|
||||
motherboard-bus@8000000 {
|
||||
arm,v2m-memory-map = "rs2";
|
||||
|
||||
iofpga-bus@300000000 {
|
||||
|
||||
@ -77,13 +77,21 @@ dvimode {
|
||||
};
|
||||
|
||||
bus@8000000 {
|
||||
motherboard-bus {
|
||||
arm,v2m-memory-map = "rs1";
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x8000000 0 0x8000000 0x18000000>;
|
||||
|
||||
motherboard-bus@8000000 {
|
||||
compatible = "arm,vexpress,v2m-p1", "simple-bus";
|
||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||
<1 0 0 0x14000000 0x04000000>,
|
||||
<2 0 0 0x18000000 0x04000000>,
|
||||
<3 0 0 0x1c000000 0x04000000>,
|
||||
<4 0 0 0x0c000000 0x04000000>,
|
||||
<5 0 0 0x10000000 0x04000000>;
|
||||
|
||||
flash@0 {
|
||||
compatible = "arm,vexpress-flash", "cfi-flash";
|
||||
@ -130,7 +138,7 @@ aaci@40000 {
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
mmci@50000 {
|
||||
mmc@50000 {
|
||||
compatible = "arm,pl180", "arm,primecell";
|
||||
reg = <0x050000 0x1000>;
|
||||
interrupts = <9>, <10>;
|
||||
@ -190,7 +198,7 @@ v2m_serial3: serial@c0000 {
|
||||
clock-names = "uartclk", "apb_pclk";
|
||||
};
|
||||
|
||||
wdt@f0000 {
|
||||
watchdog@f0000 {
|
||||
compatible = "arm,sp805", "arm,primecell";
|
||||
reg = <0x0f0000 0x1000>;
|
||||
interrupts = <0>;
|
||||
|
||||
@ -145,61 +145,6 @@ temp-fpga {
|
||||
};
|
||||
|
||||
smb: bus@8000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0 0x08000000 0x04000000>,
|
||||
<1 0 0 0x14000000 0x04000000>,
|
||||
<2 0 0 0x18000000 0x04000000>,
|
||||
<3 0 0 0x1c000000 0x04000000>,
|
||||
<4 0 0 0x0c000000 0x04000000>,
|
||||
<5 0 0 0x10000000 0x04000000>;
|
||||
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 63>;
|
||||
interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges = <0x8000000 0 0x8000000 0x18000000>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -405,9 +405,9 @@ esdhc1: mmc@2150000 {
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-frequency = <0>; /* fixed up by bootloader */
|
||||
clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;
|
||||
voltage-ranges = <1800 1800 3300 3300>;
|
||||
voltage-ranges = <1800 1800>;
|
||||
sdhci,auto-cmd12;
|
||||
broken-cd;
|
||||
non-removable;
|
||||
little-endian;
|
||||
bus-width = <4>;
|
||||
status = "disabled";
|
||||
|
||||
@ -91,7 +91,7 @@ flash@0 {
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
spi-max-frequency = <80000000>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -48,7 +48,7 @@ flash@0 {
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
spi-max-frequency = <80000000>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -102,6 +102,7 @@ reg_vdd_arm: BUCK2 {
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <3125>;
|
||||
nxp,dvs-run-voltage = <950000>;
|
||||
nxp,dvs-standby-voltage = <850000>;
|
||||
|
||||
@ -647,7 +647,7 @@ &iomuxc {
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
|
||||
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* M2_RST# */
|
||||
MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RST# */
|
||||
MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
|
||||
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
|
||||
MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x40000041 /* AMP GPIO1 */
|
||||
|
||||
@ -101,7 +101,7 @@ flash@0 {
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
spi-max-frequency = <80000000>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -633,7 +633,7 @@ &iomuxc {
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MN_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
|
||||
MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* M2_RST# */
|
||||
MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RST# */
|
||||
MX8MN_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
|
||||
MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
|
||||
MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */
|
||||
|
||||
@ -74,7 +74,7 @@ som_flash: flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <80000000>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -337,6 +337,8 @@ n25q256a: flash@0 {
|
||||
#size-cells = <1>;
|
||||
compatible = "micron,n25q256a", "jedec,spi-nor";
|
||||
spi-max-frequency = <29000000>;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -281,7 +281,7 @@ flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <4>;
|
||||
m25p,fast-read;
|
||||
spi-max-frequency = <50000000>;
|
||||
|
||||
@ -487,7 +487,6 @@ dwc_0: dwc3@8a00000 {
|
||||
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phys = <&qusb_phy_0>, <&usb0_ssphy>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
tx-fifo-resize;
|
||||
snps,is-utmi-l1-suspend;
|
||||
snps,hird-threshold = /bits/ 8 <0x0>;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
@ -528,7 +527,6 @@ dwc_1: dwc3@8c00000 {
|
||||
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phys = <&qusb_phy_1>, <&usb1_ssphy>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
tx-fifo-resize;
|
||||
snps,is-utmi-l1-suspend;
|
||||
snps,hird-threshold = /bits/ 8 <0x0>;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
|
||||
@ -48,8 +48,10 @@ pm8150_0: pmic@0 {
|
||||
#size-cells = <0>;
|
||||
|
||||
pon: power-on@800 {
|
||||
compatible = "qcom,pm8916-pon";
|
||||
compatible = "qcom,pm8998-pon";
|
||||
reg = <0x0800>;
|
||||
mode-bootloader = <0x2>;
|
||||
mode-recovery = <0x1>;
|
||||
|
||||
pon_pwrkey: pwrkey {
|
||||
compatible = "qcom,pm8941-pwrkey";
|
||||
|
||||
@ -804,6 +804,16 @@ lt9611_rst_pin: lt9611-rst-pin {
|
||||
};
|
||||
};
|
||||
|
||||
&pon_pwrkey {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pon_resin {
|
||||
status = "okay";
|
||||
|
||||
linux,code = <KEY_VOLUMEDOWN>;
|
||||
};
|
||||
|
||||
&qupv3_id_0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -273,7 +273,6 @@ sound: sound {
|
||||
"Headphone Jack", "HPOL",
|
||||
"Headphone Jack", "HPOR";
|
||||
|
||||
#sound-dai-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
@ -301,11 +300,11 @@ sound_multimedia1_codec: codec {
|
||||
};
|
||||
};
|
||||
|
||||
dai-link@2 {
|
||||
dai-link@5 {
|
||||
link-name = "MultiMedia2";
|
||||
reg = <2>;
|
||||
reg = <LPASS_DP_RX>;
|
||||
cpu {
|
||||
sound-dai = <&lpass_cpu 2>;
|
||||
sound-dai = <&lpass_cpu LPASS_DP_RX>;
|
||||
};
|
||||
|
||||
codec {
|
||||
@ -782,7 +781,7 @@ secondary_mi2s: mi2s@1 {
|
||||
qcom,playback-sd-lines = <0>;
|
||||
};
|
||||
|
||||
hdmi-primary@0 {
|
||||
hdmi@5 {
|
||||
reg = <LPASS_DP_RX>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -1850,9 +1850,9 @@ rpmhcc: clock-controller {
|
||||
|
||||
cpufreq_hw: cpufreq@18591000 {
|
||||
compatible = "qcom,cpufreq-epss";
|
||||
reg = <0 0x18591100 0 0x900>,
|
||||
<0 0x18592100 0 0x900>,
|
||||
<0 0x18593100 0 0x900>;
|
||||
reg = <0 0x18591000 0 0x1000>,
|
||||
<0 0x18592000 0 0x1000>,
|
||||
<0 0x18593000 0 0x1000>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
|
||||
clock-names = "xo", "alternate";
|
||||
#freq-domain-cells = <1>;
|
||||
|
||||
@ -654,9 +654,20 @@ a2noc: interconnect@1704000 {
|
||||
compatible = "qcom,sdm660-a2noc";
|
||||
reg = <0x01704000 0xc100>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clock-names = "bus",
|
||||
"bus_a",
|
||||
"ipa",
|
||||
"ufs_axi",
|
||||
"aggre2_ufs_axi",
|
||||
"aggre2_usb3_axi",
|
||||
"cfg_noc_usb2_axi";
|
||||
clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
|
||||
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>;
|
||||
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>,
|
||||
<&rpmcc RPM_SMD_IPA_CLK>,
|
||||
<&gcc GCC_UFS_AXI_CLK>,
|
||||
<&gcc GCC_AGGRE2_UFS_AXI_CLK>,
|
||||
<&gcc GCC_AGGRE2_USB3_AXI_CLK>,
|
||||
<&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
|
||||
};
|
||||
|
||||
mnoc: interconnect@1745000 {
|
||||
|
||||
@ -128,23 +128,28 @@ camera_mem: memory@8bf00000 {
|
||||
no-map;
|
||||
};
|
||||
|
||||
wlan_msa_mem: memory@8c400000 {
|
||||
reg = <0 0x8c400000 0 0x100000>;
|
||||
ipa_fw_mem: memory@8c400000 {
|
||||
reg = <0 0x8c400000 0 0x10000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
gpu_mem: memory@8c515000 {
|
||||
reg = <0 0x8c515000 0 0x2000>;
|
||||
ipa_gsi_mem: memory@8c410000 {
|
||||
reg = <0 0x8c410000 0 0x5000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
ipa_fw_mem: memory@8c517000 {
|
||||
reg = <0 0x8c517000 0 0x5a000>;
|
||||
gpu_mem: memory@8c415000 {
|
||||
reg = <0 0x8c415000 0 0x2000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
adsp_mem: memory@8c600000 {
|
||||
reg = <0 0x8c600000 0 0x1a00000>;
|
||||
adsp_mem: memory@8c500000 {
|
||||
reg = <0 0x8c500000 0 0x1a00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wlan_msa_mem: memory@8df00000 {
|
||||
reg = <0 0x8df00000 0 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
|
||||
@ -16,6 +16,17 @@
|
||||
#include "sdm850.dtsi"
|
||||
#include "pm8998.dtsi"
|
||||
|
||||
/*
|
||||
* Update following upstream (sdm845.dtsi) reserved
|
||||
* memory mappings for firmware loading to succeed
|
||||
* and enable the IPA device.
|
||||
*/
|
||||
/delete-node/ &ipa_fw_mem;
|
||||
/delete-node/ &ipa_gsi_mem;
|
||||
/delete-node/ &gpu_mem;
|
||||
/delete-node/ &adsp_mem;
|
||||
/delete-node/ &wlan_msa_mem;
|
||||
|
||||
/ {
|
||||
model = "Lenovo Yoga C630";
|
||||
compatible = "lenovo,yoga-c630", "qcom,sdm845";
|
||||
@ -58,6 +69,29 @@ panel_in_edp: endpoint {
|
||||
};
|
||||
};
|
||||
|
||||
/* Reserved memory changes for IPA */
|
||||
reserved-memory {
|
||||
wlan_msa_mem: memory@8c400000 {
|
||||
reg = <0 0x8c400000 0 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
gpu_mem: memory@8c515000 {
|
||||
reg = <0 0x8c515000 0 0x2000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
ipa_fw_mem: memory@8c517000 {
|
||||
reg = <0 0x8c517000 0 0x5a000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
adsp_mem: memory@8c600000 {
|
||||
reg = <0 0x8c600000 0 0x1a00000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
sn65dsi86_refclk: sn65dsi86-refclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
|
||||
@ -50,9 +50,6 @@ pgprot_t __acpi_get_mem_attribute(phys_addr_t addr);
|
||||
void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);
|
||||
#define acpi_os_ioremap acpi_os_ioremap
|
||||
|
||||
void __iomem *acpi_os_memmap(acpi_physical_address phys, acpi_size size);
|
||||
#define acpi_os_memmap acpi_os_memmap
|
||||
|
||||
typedef u64 phys_cpuid_t;
|
||||
#define PHYS_CPUID_INVALID INVALID_HWID
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user