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powerpc fixes for 5.15 #5
Fix a bug exposed by a previous fix, where running guests with certain SMT topologies could crash the host on Power8. Fix atomic sleep warnings when re-onlining CPUs, when PREEMPT is enabled. Thanks to: Nathan Lynch, Srikar Dronamraju, Valentin Schneider. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEJFGtCPCthwEv2Y/bUevqPMjhpYAFAmFxTaUTHG1wZUBlbGxl cm1hbi5pZC5hdQAKCRBR6+o8yOGlgFj/D/9J/rz1zYKxvPd+o5WsJBWrgsVBxgGr cIhtKARlh0Yoa9fhIYF6ir4HUT2TOhokwJJco7fcND73rfrHfbWshWEzwaR1Lz/2 WXr0Np509GQw1KCC9nv5DoE5qqLLL+rS+ul75Khkoi99wa/TDD8kQ5o3zUWtDoad D6paUIOf+DjnzzD7hIuTljfuOL/P3S4OyarQEopD69n8IgCTCrSsKdzOzAvlKcuL c3OoGAY5gasHowfxLfOigkCYloT4gJES7Kxl92QnPByOJUfqhjfKxiN4l0ydR6Bl 4dUFUp/PkvvmTZiIA3tFzu0fHOgjUCvICyEAewLX7Bh9fXAVYMRc1a2l4LrCWD8T hQqQFskxa/viG7Uq2N58Rts9GtF5nG5d6+4l5Ndxus2+tUledjiuzOv3nsSq64TF y+Gws66a+A8a7DjcHo281BWzWn3XCIuug4A0doyvJFNdiy/+zj3ojfUhppZam8ca DYo7ot71l0XGvFM0Yhr/NQ9MEdpgT19VC0xU2pafnkp6yGUqjH1b9xelvg+uMZEc vXb7h+XV0eY4Rdr+3wTnXIwIWnEslJ23YQxFvhZeWeF321wsR5kbBGvNf/aY6xQB rLkNX63RdpyYjHGcn3qwcYTkk8wAjCR719tFal8hRMLw+CCjzqcinb7P5FLi4hQv cUV/vDffiwyReg== =572c -----END PGP SIGNATURE----- Merge tag 'powerpc-5.15-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: - Fix a bug exposed by a previous fix, where running guests with certain SMT topologies could crash the host on Power8. - Fix atomic sleep warnings when re-onlining CPUs, when PREEMPT is enabled. Thanks to Nathan Lynch, Srikar Dronamraju, and Valentin Schneider. * tag 'powerpc-5.15-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/smp: do not decrement idle task preempt count in CPU offline powerpc/idle: Don't corrupt back chain when going idle
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0a3221b658
@ -126,14 +126,16 @@ _GLOBAL(idle_return_gpr_loss)
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/*
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* This is the sequence required to execute idle instructions, as
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* specified in ISA v2.07 (and earlier). MSR[IR] and MSR[DR] must be 0.
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*
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* The 0(r1) slot is used to save r2 in isa206, so use that here.
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* We have to store a GPR somewhere, ptesync, then reload it, and create
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* a false dependency on the result of the load. It doesn't matter which
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* GPR we store, or where we store it. We have already stored r2 to the
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* stack at -8(r1) in isa206_idle_insn_mayloss, so use that.
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*/
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#define IDLE_STATE_ENTER_SEQ_NORET(IDLE_INST) \
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/* Magic NAP/SLEEP/WINKLE mode enter sequence */ \
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std r2,0(r1); \
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std r2,-8(r1); \
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ptesync; \
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ld r2,0(r1); \
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ld r2,-8(r1); \
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236: cmpd cr0,r2,r2; \
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bne 236b; \
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IDLE_INST; \
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@ -1730,8 +1730,6 @@ void __cpu_die(unsigned int cpu)
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void arch_cpu_idle_dead(void)
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{
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sched_preempt_enable_no_resched();
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/*
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* Disable on the down path. This will be re-enabled by
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* start_secondary() via start_secondary_resume() below
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