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tg3: Recode PCI MRRS adjustment as a PCI quirk
This patch recodes the MRRS cap for 5719 A0 devices as a PCI quirk. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -14242,12 +14242,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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tg3_flag_set(tp, PCI_EXPRESS);
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if (tp->pci_chip_rev_id == CHIPREV_ID_5719_A0) {
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int readrq = pcie_get_readrq(tp->pdev);
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if (readrq > 2048)
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pcie_set_readrq(tp->pdev, 2048);
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}
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pci_read_config_word(tp->pdev,
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pci_pcie_cap(tp->pdev) + PCI_EXP_LNKCTL,
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&lnkctl);
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@ -2161,6 +2161,24 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
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PCI_DEVICE_ID_NX2_5709S,
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quirk_brcm_570x_limit_vpd);
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static void __devinit quirk_brcm_5719_limit_mrrs(struct pci_dev *dev)
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{
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u32 rev;
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pci_read_config_dword(dev, 0xf4, &rev);
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/* Only CAP the MRRS if the device is a 5719 A0 */
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if (rev == 0x05719000) {
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int readrq = pcie_get_readrq(dev);
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if (readrq > 2048)
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pcie_set_readrq(dev, 2048);
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}
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}
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DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_BROADCOM,
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PCI_DEVICE_ID_TIGON3_5719,
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quirk_brcm_5719_limit_mrrs);
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/* Originally in EDAC sources for i82875P:
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* Intel tells BIOS developers to hide device 6 which
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* configures the overflow device access containing
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@ -2105,6 +2105,7 @@
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#define PCI_DEVICE_ID_NX2_57711E 0x1650
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#define PCI_DEVICE_ID_TIGON3_5705 0x1653
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#define PCI_DEVICE_ID_TIGON3_5705_2 0x1654
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#define PCI_DEVICE_ID_TIGON3_5719 0x1657
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#define PCI_DEVICE_ID_TIGON3_5721 0x1659
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#define PCI_DEVICE_ID_TIGON3_5722 0x165a
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#define PCI_DEVICE_ID_TIGON3_5723 0x165b
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