spi: rockchip: Fix PM runtime count on no-op cs

The early bail out that caused an out-of-bounds write was removed with
commit 5c018e378f ("spi: spi-rockchip: Fix out of bounds array
access")
Unfortunately that caused the PM runtime count to be unbalanced and
underflowed on the first call. To fix that reintroduce a no-op check
by reading the register directly.

Cc: stable@vger.kernel.org
Fixes: 5c018e378f ("spi: spi-rockchip: Fix out of bounds array access")
Signed-off-by: Christian Loehle <christian.loehle@arm.com>
Link: https://patch.msgid.link/1f2b3af4-2b7a-4ac8-ab95-c80120ebf44c@arm.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Christian Loehle 2024-12-06 19:50:55 +00:00 committed by Mark Brown
parent c84dda3751
commit 0bb394067a
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@ -241,6 +241,20 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
struct spi_controller *ctlr = spi->controller; struct spi_controller *ctlr = spi->controller;
struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable; bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable;
bool cs_actual;
/*
* SPI subsystem tries to avoid no-op calls that would break the PM
* refcount below. It can't however for the first time it is used.
* To detect this case we read it here and bail out early for no-ops.
*/
if (spi_get_csgpiod(spi, 0))
cs_actual = !!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SER) & 1);
else
cs_actual = !!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SER) &
BIT(spi_get_chipselect(spi, 0)));
if (unlikely(cs_actual == cs_asserted))
return;
if (cs_asserted) { if (cs_asserted) {
/* Keep things powered as long as CS is asserted */ /* Keep things powered as long as CS is asserted */