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drm/mgag200: Initialize PCI registers early during device setup

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So far, PCI option registers were initialized as part of modesetting,
which is late in the process. As these registers control fundamental
operation, they should be set early.

The patch moves the PCI option handling into device register setup,
before even the device MMIO memory is being mapped. No functional
changes made.

Moving the PCI code next to the device-register setup also allows to
remove the has_sdram field from struct mga_device. The state is now
local to the init helper.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200730102844.10995-4-tzimmermann@suse.de
This commit is contained in:
Thomas Zimmermann 2020-07-30 12:28:39 +02:00
parent 42452165dc
commit 2021708e0d
3 changed files with 31 additions and 43 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
drivers/gpu/drm/mgag200/mgag200_drv.c
View File

@ -60,8 +60,38 @@ static bool mgag200_has_sgram(struct mga_device *mdev)
static int mgag200_regs_init(struct mga_device *mdev)
{
struct drm_device *dev = &mdev->base;
u32 option, option2;
mdev->has_sdram = !mgag200_has_sgram(mdev);
switch (mdev->type) {
case G200_SE_A:
case G200_SE_B:
if (mgag200_has_sgram(mdev))
option |= PCI_MGA_OPTION_HARDPWMSK;
option2 = 0x00008000;
break;
case G200_WB:
case G200_EW3:
option = 0x41049120;
option2 = 0x0000b000;
break;
case G200_EV:
option = 0x00000120;
option2 = 0x0000b000;
break;
case G200_EH:
case G200_EH3:
option = 0x00000120;
option2 = 0x0000b000;
break;
default:
option = 0;
option2 = 0;
}
if (option)
pci_write_config_dword(dev->pdev, PCI_MGA_OPTION, option);
if (option2)
pci_write_config_dword(dev->pdev, PCI_MGA_OPTION2, option2);
/* BAR 1 contains registers */
mdev->rmmio_base = pci_resource_start(dev->pdev, 1);

1
drivers/gpu/drm/mgag200/mgag200_drv.h
View File

@ -161,7 +161,6 @@ struct mga_device {
size_t vram_fb_available;
enum mga_type type;
int has_sdram;
int bpp_shifts[4];

41
drivers/gpu/drm/mgag200/mgag200_mode.c
View File

@ -9,7 +9,6 @@
*/
#include <linux/delay.h>
#include <linux/pci.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_atomic_state_helper.h>
@ -877,45 +876,6 @@ static void mgag200_set_startadd(struct mga_device *mdev,
WREG_ECRT(0x00, crtcext0);
}
static void mgag200_set_pci_regs(struct mga_device *mdev)
{
uint32_t option = 0, option2 = 0;
struct drm_device *dev = &mdev->base;
switch (mdev->type) {
case G200_SE_A:
case G200_SE_B:
if (mdev->has_sdram)
option = 0x40049120;
else
option = 0x4004d120;
option2 = 0x00008000;
break;
case G200_WB:
case G200_EW3:
option = 0x41049120;
option2 = 0x0000b000;
break;
case G200_EV:
option = 0x00000120;
option2 = 0x0000b000;
break;
case G200_EH:
case G200_EH3:
option = 0x00000120;
option2 = 0x0000b000;
break;
case G200_ER:
break;
}
if (option)
pci_write_config_dword(dev->pdev, PCI_MGA_OPTION, option);
if (option2)
pci_write_config_dword(dev->pdev, PCI_MGA_OPTION2, option2);
}
static void mgag200_set_dac_regs(struct mga_device *mdev)
{
size_t i;
@ -988,7 +948,6 @@ static void mgag200_init_regs(struct mga_device *mdev)
{
u8 crtc11, crtcext3, crtcext4, misc;
mgag200_set_pci_regs(mdev);
mgag200_set_dac_regs(mdev);
WREG_SEQ(2, 0x0f);