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mmc: sdhci_am654: Set HIGH_SPEED_ENA for SDR12 and SDR25
Timing Information in Datasheet assumes that HIGH_SPEED_ENA=1 should be set for SDR12 and SDR25 modes. But sdhci_am654 driver clears HIGH_SPEED_ENA register. Thus, Modify sdhci_am654 to not clear HIGH_SPEED_ENA (HOST_CONTROL[2]) bit for SDR12 and SDR25 speed modes. Fixes: e374e87538f4 ("mmc: sdhci_am654: Clear HISPD_ENA in some lower speed modes") Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20230317092711.660897-1-b-kapoor@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -351,8 +351,6 @@ static void sdhci_am654_write_b(struct sdhci_host *host, u8 val, int reg)
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*/
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case MMC_TIMING_SD_HS:
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case MMC_TIMING_MMC_HS:
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case MMC_TIMING_UHS_SDR12:
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case MMC_TIMING_UHS_SDR25:
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val &= ~SDHCI_CTRL_HISPD;
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}
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}
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