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https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
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[PATCH] mmconfig: minor cleanup in mmconfig code
This just cleans up. Signed-off-by: OGAWA Hirofumi <hirofumi@mail.parknet.co.jp> Signed-off-by: Andi Kleen <ak@suse.de>
This commit is contained in:
OGAWA Hirofumi
Andi Kleen
parent
a4ec1b2c9f
commit
429d512e53
@ -22,10 +22,6 @@
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#define MMCONFIG_APER_MIN (2 * 1024*1024)
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#define MMCONFIG_APER_MAX (256 * 1024*1024)
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/* Verify the first 16 busses. We assume that systems with more busses
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get MCFG right. */
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#define PCI_MMCFG_MAX_CHECK_BUS 16
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DECLARE_BITMAP(pci_mmcfg_fallback_slots, 32*PCI_MMCFG_MAX_CHECK_BUS);
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/* K8 systems have some devices (typically in the builtin northbridge)
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@ -34,29 +30,30 @@ DECLARE_BITMAP(pci_mmcfg_fallback_slots, 32*PCI_MMCFG_MAX_CHECK_BUS);
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and assigning suitable _SEGs, but this isn't implemented in some BIOS.
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Instead try to discover all devices on bus 0 that are unreachable using MM
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and fallback for them. */
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static __init void unreachable_devices(void)
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static void __init unreachable_devices(void)
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{
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int i, k;
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int i, bus;
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/* Use the max bus number from ACPI here? */
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for (k = 0; k < PCI_MMCFG_MAX_CHECK_BUS; k++) {
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for (bus = 0; bus < PCI_MMCFG_MAX_CHECK_BUS; bus++) {
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for (i = 0; i < 32; i++) {
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unsigned int devfn = PCI_DEVFN(i, 0);
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u32 val1, val2;
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pci_conf1_read(0, k, PCI_DEVFN(i,0), 0, 4, &val1);
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pci_conf1_read(0, bus, devfn, 0, 4, &val1);
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if (val1 == 0xffffffff)
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continue;
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raw_pci_ops->read(0, k, PCI_DEVFN(i, 0), 0, 4, &val2);
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raw_pci_ops->read(0, bus, devfn, 0, 4, &val2);
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if (val1 != val2) {
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set_bit(i + 32*k, pci_mmcfg_fallback_slots);
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set_bit(i + 32 * bus, pci_mmcfg_fallback_slots);
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printk(KERN_NOTICE "PCI: No mmconfig possible"
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" on device %02x:%02x\n", k, i);
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" on device %02x:%02x\n", bus, i);
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}
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}
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}
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}
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static __init const char *pci_mmcfg_e7520(void)
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static const char __init *pci_mmcfg_e7520(void)
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{
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u32 win;
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pci_conf1_read(0, 0, PCI_DEVFN(0,0), 0xce, 2, &win);
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@ -73,7 +70,7 @@ static __init const char *pci_mmcfg_e7520(void)
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return "Intel Corporation E7520 Memory Controller Hub";
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}
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static __init const char *pci_mmcfg_intel_945(void)
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static const char __init *pci_mmcfg_intel_945(void)
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{
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u32 pciexbar, mask = 0, len = 0;
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@ -128,7 +125,7 @@ struct pci_mmcfg_hostbridge_probe {
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const char *(*probe)(void);
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};
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static __initdata struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes[] = {
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static struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes[] __initdata = {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7520_MCH, pci_mmcfg_e7520 },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945G_HB, pci_mmcfg_intel_945 },
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};
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@ -148,25 +145,21 @@ static int __init pci_mmcfg_check_hostbridge(void)
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pci_mmcfg_config = NULL;
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name = NULL;
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for (i = 0; !name && i < ARRAY_SIZE(pci_mmcfg_probes); i++)
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if ((pci_mmcfg_probes[i].vendor == PCI_ANY_ID ||
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pci_mmcfg_probes[i].vendor == vendor) &&
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(pci_mmcfg_probes[i].device == PCI_ANY_ID ||
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pci_mmcfg_probes[i].device == device))
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for (i = 0; !name && i < ARRAY_SIZE(pci_mmcfg_probes); i++) {
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if (pci_mmcfg_probes[i].vendor == vendor &&
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pci_mmcfg_probes[i].device == device)
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name = pci_mmcfg_probes[i].probe();
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}
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if (name) {
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if (pci_mmcfg_config_num)
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printk(KERN_INFO "PCI: Found %s with MMCONFIG support.\n", name);
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else
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printk(KERN_INFO "PCI: Found %s without MMCONFIG support.\n",
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name);
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printk(KERN_INFO "PCI: Found %s %s MMCONFIG support.\n",
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name, pci_mmcfg_config_num ? "with" : "without");
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}
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return name != NULL;
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}
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static __init void pci_mmcfg_insert_resources(void)
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static void __init pci_mmcfg_insert_resources(void)
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{
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#define PCI_MMCFG_RESOURCE_NAME_LEN 19
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int i;
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@ -176,7 +169,6 @@ static __init void pci_mmcfg_insert_resources(void)
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res = kcalloc(PCI_MMCFG_RESOURCE_NAME_LEN + sizeof(*res),
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pci_mmcfg_config_num, GFP_KERNEL);
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if (!res) {
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printk(KERN_ERR "PCI: Unable to allocate MMCONFIG resources\n");
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return;
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@ -184,12 +176,12 @@ static __init void pci_mmcfg_insert_resources(void)
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names = (void *)&res[pci_mmcfg_config_num];
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for (i = 0; i < pci_mmcfg_config_num; i++, res++) {
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num_buses = pci_mmcfg_config[i].end_bus_number -
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pci_mmcfg_config[i].start_bus_number + 1;
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struct acpi_mcfg_allocation *cfg = &pci_mmcfg_config[i];
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num_buses = cfg->end_bus_number - cfg->start_bus_number + 1;
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res->name = names;
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snprintf(names, PCI_MMCFG_RESOURCE_NAME_LEN, "PCI MMCONFIG %u",
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pci_mmcfg_config[i].pci_segment);
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res->start = pci_mmcfg_config[i].address;
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cfg->pci_segment);
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res->start = cfg->address;
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res->end = res->start + (num_buses << 20) - 1;
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res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
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insert_resource(&iomem_resource, res);
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@ -27,22 +27,17 @@ static int mmcfg_last_accessed_cpu;
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*/
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static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
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{
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int cfg_num = -1;
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struct acpi_mcfg_allocation *cfg;
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int cfg_num;
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if (seg == 0 && bus < PCI_MMCFG_MAX_CHECK_BUS &&
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test_bit(PCI_SLOT(devfn) + 32*bus, pci_mmcfg_fallback_slots))
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return 0;
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while (1) {
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++cfg_num;
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if (cfg_num >= pci_mmcfg_config_num) {
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break;
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}
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for (cfg_num = 0; cfg_num < pci_mmcfg_config_num; cfg_num++) {
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cfg = &pci_mmcfg_config[cfg_num];
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if (cfg->pci_segment != seg)
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continue;
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if ((cfg->start_bus_number <= bus) &&
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if (cfg->pci_segment == seg &&
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(cfg->start_bus_number <= bus) &&
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(cfg->end_bus_number >= bus))
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return cfg->address;
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}
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@ -96,7 +96,9 @@ extern void pcibios_sort(void);
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/* pci-mmconfig.c */
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/* Verify the first 16 busses. We assume that systems with more busses
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get MCFG right. */
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#define PCI_MMCFG_MAX_CHECK_BUS 16
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extern DECLARE_BITMAP(pci_mmcfg_fallback_slots, 32*PCI_MMCFG_MAX_CHECK_BUS);
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extern int pci_mmcfg_arch_init(void);
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extern int __init pci_mmcfg_arch_init(void);
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@ -13,10 +13,6 @@
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#include "pci.h"
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/* Verify the first 16 busses. We assume that systems with more busses
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get MCFG right. */
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#define PCI_MMCFG_MAX_CHECK_BUS 16
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/* Static virtual mapping of the MMCONFIG aperture */
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struct mmcfg_virt {
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struct acpi_mcfg_allocation *cfg;
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@ -26,17 +22,13 @@ static struct mmcfg_virt *pci_mmcfg_virt;
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static char __iomem *get_virt(unsigned int seg, unsigned bus)
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{
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int cfg_num = -1;
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struct acpi_mcfg_allocation *cfg;
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int cfg_num;
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while (1) {
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++cfg_num;
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if (cfg_num >= pci_mmcfg_config_num)
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break;
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for (cfg_num = 0; cfg_num < pci_mmcfg_config_num; cfg_num++) {
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cfg = pci_mmcfg_virt[cfg_num].cfg;
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if (cfg->pci_segment != seg)
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continue;
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if ((cfg->start_bus_number <= bus) &&
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if (cfg->pci_segment == seg &&
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(cfg->start_bus_number <= bus) &&
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(cfg->end_bus_number >= bus))
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return pci_mmcfg_virt[cfg_num].virt;
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}
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