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pinctrl: nuvoton: wpcm450: Refactor MFSEL setting code

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In preparation for the next patch, which makes the logic around
setting/resetting bits in MFSEL a little more complicated, move that
code to a new function

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20221105185911.1547847-2-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Jonathan Neuschäfer 2022-11-05 19:59:04 +01:00 committed by Linus Walleij
parent 4829297c9b
commit 4f1d423cd2
1 changed files with 12 additions and 6 deletions
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18
drivers/pinctrl/nuvoton/pinctrl-wpcm450.c
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@ -800,6 +800,14 @@ static const struct pinctrl_pin_desc wpcm450_pins[] = {
WPCM450_PIN(124), WPCM450_PIN(125), WPCM450_PIN(126), WPCM450_PIN(127),
};
/* Helper function to update MFSEL field according to the selected function */
static void wpcm450_update_mfsel(struct regmap *gcr_regmap, int reg, int bit, int fn, int fn_selected)
{
bool value = (fn == fn_selected);
regmap_update_bits(gcr_regmap, reg, BIT(bit), value ? BIT(bit) : 0);
}
/* Enable mode in pin group */
static void wpcm450_setfunc(struct regmap *gcr_regmap, const unsigned int *pin,
int npins, int func)
@ -811,13 +819,11 @@ static void wpcm450_setfunc(struct regmap *gcr_regmap, const unsigned int *pin,
cfg = &pincfg[pin[i]];
if (func == fn_gpio || cfg->fn0 == func || cfg->fn1 == func) {
if (cfg->reg0)
regmap_update_bits(gcr_regmap, cfg->reg0,
BIT(cfg->bit0),
(cfg->fn0 == func) ? BIT(cfg->bit0) : 0);
wpcm450_update_mfsel(gcr_regmap, cfg->reg0,
cfg->bit0, cfg->fn0, func);
if (cfg->reg1)
regmap_update_bits(gcr_regmap, cfg->reg1,
BIT(cfg->bit1),
(cfg->fn1 == func) ? BIT(cfg->bit1) : 0);
wpcm450_update_mfsel(gcr_regmap, cfg->reg1,
cfg->bit1, cfg->fn1, func);
}
}
}