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drm/nouveau/fifo: separate object classes for dma channels
Future code will use the object class rather than chipset checks in order to identify available channel features. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -118,7 +118,10 @@ nv04_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
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return ret;
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switch (nv_mclass(parent)) {
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case 0x006b:
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case 0x006e:
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case 0x176e:
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case 0x406e:
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ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj);
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nouveau_object_ref(NULL, pobject);
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*pobject = nv_object(gpuobj);
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@ -247,7 +247,7 @@ nv04_fifo_ofuncs = {
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static struct nouveau_oclass
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nv04_fifo_sclass[] = {
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{ 0x006e, &nv04_fifo_ofuncs },
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{ 0x006b, &nv04_fifo_ofuncs },
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{}
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};
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@ -113,7 +113,7 @@ nv17_fifo_ofuncs = {
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static struct nouveau_oclass
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nv17_fifo_sclass[] = {
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{ 0x006e, &nv17_fifo_ofuncs },
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{ 0x176e, &nv17_fifo_ofuncs },
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{}
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};
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@ -232,7 +232,7 @@ nv40_fifo_ofuncs = {
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static struct nouveau_oclass
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nv40_fifo_sclass[] = {
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{ 0x006e, &nv40_fifo_ofuncs },
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{ 0x406e, &nv40_fifo_ofuncs },
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{}
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};
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@ -53,6 +53,7 @@ struct nv_dma_class {
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/* 006b: NV03_CHANNEL_DMA
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* 006e: NV10_CHANNEL_DMA
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* 176e: NV17_CHANNEL_DMA
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* 406e: NV40_CHANNEL_DMA
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*/
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@ -221,7 +221,7 @@ static int
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nouveau_channel_dma(struct nouveau_drm *drm, struct nouveau_cli *cli,
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u32 parent, u32 handle, struct nouveau_channel **pchan)
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{
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static const u16 oclasses[] = { 0x006e, 0 };
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static const u16 oclasses[] = { 0x406e, 0x176e, 0x006e, 0x006b, 0 };
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const u16 *oclass = oclasses;
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struct nv_channel_dma_class args;
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struct nouveau_channel *chan;
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@ -305,7 +305,8 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
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}
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/* initialise dma tracking parameters */
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switch (nv_hclass(chan->object) & 0xffff) {
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switch (nv_hclass(chan->object) & 0x00ff) {
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case 0x006b:
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case 0x006e:
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chan->user_put = 0x40;
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chan->user_get = 0x44;
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