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Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git

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This commit is contained in:
Stephen Rothwell 2024-12-20 10:41:18 +11:00
commit 54d4f3b6e6
38 changed files with 1981 additions and 76 deletions
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9
Documentation/devicetree/bindings/arm/fsl.yaml
View File

@ -1106,6 +1106,15 @@ properties:
- ysoft,imx8mp-iota2-lumpy # Y Soft i.MX8MP IOTA2 Lumpy Board
- const: fsl,imx8mp
- description: ABB Boards with i.MX8M Plus Modules from ADLink
items:
- enum:
- abb,imx8mp-aristanetos3-adpismarc # i.MX8MP ABB SoM on PI SMARC Board
- abb,imx8mp-aristanetos3-helios # i.MX8MP ABB SoM on helios Board
- abb,imx8mp-aristanetos3-proton2s # i.MX8MP ABB SoM on proton2s Board
- const: abb,imx8mp-aristanetos3-som # i.MX8MP ABB SoM
- const: fsl,imx8mp
- description: Avnet (MSC Branded) Boards with SM2S i.MX8M Plus Modules
items:
- const: avnet,sm2s-imx8mp-14N0600E-ep1 # SM2S-IMX8PLUS-14N0600E on SM2-MB-EP1 Carrier Board

13
MAINTAINERS
View File

@ -6661,19 +6661,14 @@ L: linux-rtc@vger.kernel.org
S: Maintained
F: drivers/rtc/rtc-sd2405al.c
DH ELECTRONICS IMX6 DHCOM/DHCOR BOARD SUPPORT
DH ELECTRONICS DHSOM SOM AND BOARD SUPPORT
M: Christoph Niedermaier <cniedermaier@dh-electronics.com>
L: kernel@dh-electronics.com
S: Maintained
F: arch/arm/boot/dts/nxp/imx/imx6*-dhcom-*
F: arch/arm/boot/dts/nxp/imx/imx6*-dhcor-*
DH ELECTRONICS STM32MP1 DHCOM/DHCOR BOARD SUPPORT
M: Marek Vasut <marex@denx.de>
L: kernel@dh-electronics.com
S: Maintained
F: arch/arm/boot/dts/st/stm32mp1*-dhcom-*
F: arch/arm/boot/dts/st/stm32mp1*-dhcor-*
N: dhcom
N: dhcor
N: dhsom
DIALOG SEMICONDUCTOR DRIVERS
M: Support Opensource <support.opensource@diasemi.com>

4
arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi
View File

@ -113,8 +113,8 @@
"DMICDAT", "DMIC";
mux-int-port = <2>;
mux-ext-port = <3>;
hp-det-gpio = <&gpio7 8 GPIO_ACTIVE_LOW>;
mic-det-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
hp-det-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
mic-det-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
};
backlight_lvds: backlight-lvds {

2
arch/arm/boot/dts/nxp/imx/imx6sl-evk.dts
View File

@ -108,7 +108,7 @@
"IN3R", "AMIC";
mux-int-port = <2>;
mux-ext-port = <3>;
hp-det-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
hp-det-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
};
panel {

2
arch/arm/boot/dts/nxp/imx/imx6sll-evk.dts
View File

@ -157,7 +157,7 @@
"IN3R", "AMIC";
mux-int-port = <2>;
mux-ext-port = <3>;
hp-det-gpio = <&gpio4 24 GPIO_ACTIVE_LOW>;
hp-det-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
};
};

2
arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi
View File

@ -167,7 +167,7 @@
"IN3R", "AMIC";
mux-int-port = <2>;
mux-ext-port = <6>;
hp-det-gpio = <&gpio1 17 GPIO_ACTIVE_LOW>;
hp-det-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
};
panel {

2
arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi
View File

@ -68,7 +68,7 @@
audio-cpu = <&sai2>;
audio-codec = <&codec>;
audio-asrc = <&asrc>;
hp-det-gpio = <&gpio5 4 0>;
hp-det-gpios = <&gpio5 4 0>;
audio-routing =
"Headphone Jack", "HP_L",
"Headphone Jack", "HP_R",

61
arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi
View File

@ -87,34 +87,6 @@
<&adc2 0>, <&adc2 1>, <&adc2 2>, <&adc2 3>;
};
reg_sd1_vmmc: regulator-sd1-vmmc {
compatible = "regulator-fixed";
regulator-name = "VCC3V3_SD1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_fec1_pwdn: regulator-fec1-pwdn {
compatible = "regulator-fixed";
regulator-name = "PWDN_FEC1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_fec2_pwdn: regulator-fec2-pwdn {
compatible = "regulator-fixed";
regulator-name = "PWDN_FEC2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
compatible = "regulator-fixed";
regulator-name = "VBUS_USBOTG1";
@ -141,6 +113,7 @@
gpio = <&pca9555 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
vin-supply = <&reg_mba_5v>;
};
reg_mpcie_3v3: regulator-mpcie-3v3 {
@ -151,6 +124,7 @@
gpio = <&pca9555 10 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
vin-supply = <&reg_mba_3v3>;
};
reg_mba_12v0: regulator-mba-12v0 {
@ -162,13 +136,18 @@
enable-active-high;
};
reg_lvds_transmitter: regulator-lvds-transmitter {
reg_mba_5v: regulator-mba-5v {
compatible = "regulator-fixed";
regulator-name = "#SHTDN_LVDS";
regulator-name = "VCC5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_mba_3v3: regulator-mba-3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pca9555 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_vref_1v8: regulator-vref-1v8 {
@ -186,14 +165,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vcc_3v3: regulator-vcc-3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
vin-supply = <&reg_mba_3v3>;
};
sound {
@ -239,7 +211,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rgmii-id";
phy-supply = <&reg_fec1_pwdn>;
phy-handle = <&ethphy1_0>;
fsl,magic-packet;
status = "okay";
@ -260,6 +231,8 @@
reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
reset-assert-us = <1000>;
reset-deassert-us = <500>;
interrupt-parent = <&gpio1>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
};
};
};
@ -318,7 +291,7 @@
lm75: temperature-sensor@49 {
compatible = "national,lm75a";
reg = <0x49>;
vs-supply = <&reg_vcc_3v3>;
vs-supply = <&reg_mba_3v3>;
};
};
@ -351,7 +324,7 @@
interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
vcc-supply = <&reg_vcc_3v3>;
vcc-supply = <&reg_mba_3v3>;
};
};
@ -668,7 +641,7 @@
pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
vmmc-supply = <&reg_sd1_vmmc>;
vmmc-supply = <&reg_mba_3v3>;
bus-width = <4>;
no-1-8-v;
no-sdio;

3
arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi
View File

@ -135,6 +135,7 @@
lm75a: temperature-sensor@48 {
compatible = "national,lm75a";
reg = <0x48>;
vs-supply = <&vgen4_reg>;
};
/* NXP SE97BTP with temperature sensor + eeprom, TQMa7x 02xx */
@ -150,7 +151,6 @@
reg = <0x50>;
pagesize = <32>;
vcc-supply = <&vgen4_reg>;
status = "okay";
};
at24c02: eeprom@56 {
@ -158,7 +158,6 @@
reg = <0x56>;
pagesize = <16>;
vcc-supply = <&vgen4_reg>;
status = "okay";
};
ds1339: rtc@68 {

3
arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts
View File

@ -21,7 +21,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rgmii-id";
phy-supply = <&reg_fec2_pwdn>;
phy-handle = <&ethphy2_0>;
fsl,magic-packet;
status = "okay";
@ -42,6 +41,8 @@
reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
reset-assert-us = <1000>;
reset-deassert-us = <500>;
interrupt-parent = <&gpio2>;
interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
};
};
};

2
arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts
View File

@ -169,7 +169,7 @@
model = "wm8960-audio";
audio-cpu = <&sai1>;
audio-codec = <&codec>;
hp-det-gpio = <&gpio2 28 GPIO_ACTIVE_HIGH>;
hp-det-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
audio-routing =
"Headphone Jack", "HP_L",
"Headphone Jack", "HP_R",

2
arch/arm/boot/dts/nxp/imx/imxrt1050.dtsi
View File

@ -87,7 +87,7 @@
reg = <0x402c0000 0x4000>;
interrupts = <110>;
clocks = <&clks IMXRT1050_CLK_IPG_PDOF>,
<&clks IMXRT1050_CLK_OSC>,
<&clks IMXRT1050_CLK_AHB_PODF>,
<&clks IMXRT1050_CLK_USDHC1>;
clock-names = "ipg", "ahb", "per";
bus-width = <4>;

2
arch/arm/configs/imx_v6_v7_defconfig
View File

@ -230,6 +230,7 @@ CONFIG_RN5T618_POWER=m
CONFIG_SENSORS_MC13783_ADC=y
CONFIG_SENSORS_GPIO_FAN=y
CONFIG_SENSORS_IIO_HWMON=y
CONFIG_SENSORS_JC42=m
CONFIG_SENSORS_LM75=m
CONFIG_SENSORS_PWM_FAN=y
CONFIG_SENSORS_SY7636A=y
@ -323,6 +324,7 @@ CONFIG_SND_SOC_IMX_SGTL5000=y
CONFIG_SND_SOC_FSL_ASOC_CARD=y
CONFIG_SND_SOC_AC97_CODEC=y
CONFIG_SND_SOC_CS42XX8_I2C=y
CONFIG_SND_SOC_SPDIF=y
CONFIG_SND_SOC_TLV320AIC3X_I2C=y
CONFIG_SND_SOC_WM8960=y
CONFIG_SND_SOC_WM8962=y

13
arch/arm64/boot/dts/freescale/Makefile
View File

@ -165,6 +165,11 @@ imx8mn-tqma8mqnl-mba8mx-usbotg-dtbs += imx8mn-tqma8mqnl-mba8mx.dtb imx8mn-tqma8m
dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx-lvds-tm070jvhg33.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx-usbotg.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-aristainetos3-adpismarc.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-aristainetos3-helios.dtb
imx8mp-aristainetos3-helios-lvds-dtbs += imx8mp-aristainetos3-helios.dtb imx8mp-aristainetos3-helios-lvds.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mp-aristainetos3-helios-lvds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-aristainetos3-proton2s.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-data-modul-edm-sbc.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-model-a.dtb
@ -211,8 +216,16 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-ivy.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-mallow.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-yavia.dtb
imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0-dtbs += imx8mp-evk.dtb imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtbo
imx8mp-evk-lvds0-imx-lvds-hdmi-dtbs += imx8mp-evk.dtb imx8mp-evk-lvds0-imx-lvds-hdmi.dtbo
imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0-dtbs += imx8mp-evk.dtb imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtbo
imx8mp-evk-lvds1-imx-lvds-hdmi-dtbs += imx8mp-evk.dtb imx8mp-evk-lvds1-imx-lvds-hdmi.dtbo
imx8mp-evk-mx8-dlvds-lcd1-dtbs += imx8mp-evk.dtb imx8mp-evk-mx8-dlvds-lcd1.dtbo
imx8mp-evk-pcie-ep-dtbs += imx8mp-evk.dtb imx8mp-evk-pcie-ep.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-lvds0-imx-lvds-hdmi.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-lvds1-imx-lvds-hdmi.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-mx8-dlvds-lcd1.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-pcie-ep.dtb

2
arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi
View File

@ -165,7 +165,7 @@ audio_subsys: bus@59000000 {
};
esai0: esai@59010000 {
compatible = "fsl,imx8qm-esai";
compatible = "fsl,imx8qm-esai", "fsl,imx6ull-esai";
reg = <0x59010000 0x10000>;
interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&esai0_lpcg IMX_LPCG_CLK_4>,

37
arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-adpismarc.dts Normal file
View File

@ -0,0 +1,37 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2024 Heiko Schocher <hs@denx.de>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx8mp-aristainetos3a-som-v1.dtsi"
&{/} {
model = "Aristainetos3 ADLink PI SMARC carrier";
compatible = "abb,imx8mp-aristanetos3-adpismarc",
"abb,imx8mp-aristanetos3-som",
"fsl,imx8mp";
};
&flexcan1 {
status = "okay";
};
&i2c2 {
gpio8: pinctrl@3e {
compatible = "semtech,sx1509q";
reg = <0x3e>;
#gpio-cells = <2>;
#interrupt-cells = <2>;
semtech,probe-reset;
gpio-controller;
interrupt-controller;
interrupt-parent = <&gpio6>;
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
};
};

113
arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios-lvds.dtso Normal file
View File

@ -0,0 +1,113 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2024 Heiko Schocher <hs@denx.de>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pwm/pwm.h>
/dts-v1/;
/plugin/;
&{/} {
model = "Aristainetos3 helios carrier with LVDS";
compatible = "abb,imx8mp-aristanetos3-helios",
"abb,imx8mp-aristanetos3-som",
"fsl,imx8mp";
panel_lvds: panel-lvds {
compatible = "lg,lb070wv8";
power-supply = <&reg_vcc_disp>;
backlight = <&lvds_backlight>;
port {
in_lvds0: endpoint {
remote-endpoint = <&ldb_lvds_ch0>;
};
};
};
reg_vcc_disp: regulator-disp {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd0_vcc_en>;
compatible = "regulator-fixed";
regulator-name = "disp_power_en_2v8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-boot-on;
regulator-always-on;
};
};
&gpio3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio3_hog>;
lvdssel-hog {
gpio-hog;
gpios = <23 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "LVDSSEL";
};
};
&hdmi_blk_ctrl {
status = "disabled";
};
&hdmi_pvi {
status = "disabled";
};
&hdmi_tx {
status = "disabled";
};
&hdmi_tx_phy {
status = "disabled";
};
&irqsteer_hdmi {
status = "disabled";
};
&ldb_lvds_ch0 {
remote-endpoint = <&in_lvds0>;
};
&lcdif1 {
status = "disabled";
};
&lcdif2 {
status = "okay";
};
&lcdif3 {
status = "disabled";
};
&lvds_backlight {
status = "okay";
};
&lvds_bridge {
/* IMX8MP_CLK_MEDIA_LDB = IMX8MP_CLK_MEDIA_DISP2_PIX * 7 */
assigned-clock-rates = <232820000>;
status = "okay";
};
&media_blk_ctrl {
/*
* currently it is not possible to let display clocks configure
* automatically, so we need to set them manually
*/
assigned-clock-rates = <500000000>, <200000000>, <0>,
/* IMX8MP_CLK_MEDIA_DISP2_PIX = pixelclk of lvds panel */
<33260000>, <0>,
/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB * 2 */
<465640000>;
};

98
arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-helios.dts Normal file
View File

@ -0,0 +1,98 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2024 Heiko Schocher <hs@denx.de>
*/
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include "imx8mp-aristainetos3a-som-v1.dtsi"
&{/} {
model = "Aristainetos3 helios carrier";
compatible = "abb,imx8mp-aristanetos3-helios",
"abb,imx8mp-aristanetos3-som",
"fsl,imx8mp";
led-controller {
compatible = "gpio-leds";
led-0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
function-enumerator = <20>;
gpios = <&pca6416 12 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led-1 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_YELLOW>;
function-enumerator = <20>;
gpios = <&pca6416 13 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led-2 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
function-enumerator = <20>;
gpios = <&pca6416 14 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led-3 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_BLUE>;
function-enumerator = <20>;
gpios = <&pca6416 15 GPIO_ACTIVE_LOW>;
default-state = "off";
};
};
};
&ethphy1 {
status = "disabled";
};
&fec {
status = "disabled";
};
&i2c1 {
eeprom@57 {
compatible = "atmel,24c64";
reg = <0x57>;
};
};
&i2c3 {
pca6416: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "DIN0_CON",
"DIN1_CON",
"DIN2_CON",
"DIN3_CON",
"DIN4_CON",
"DIN5_CON",
"DIN6_CON",
"DIN7_CON",
"PM102_RES",
"COMx_RES",
"BPL_RES",
"PC_RES",
"LED_RED",
"LED_YELLOW",
"LED_GREEN",
"LED_BLUE";
};
rtc@68 {
compatible = "st,m41t00";
reg = <0x68>;
};
};

161
arch/arm64/boot/dts/freescale/imx8mp-aristainetos3-proton2s.dts Normal file
View File

@ -0,0 +1,161 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2024 Heiko Schocher <hs@denx.de>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "imx8mp-aristainetos3a-som-v1.dtsi"
&{/} {
model = "Aristainetos3 proton2s carrier";
compatible = "abb,imx8mp-aristanetos3-proton2s",
"abb,imx8mp-aristanetos3-som",
"fsl,imx8mp";
watchdog {
/* MAX6371KA */
compatible = "linux,wdt-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_watchdog_gpio>;
always-running;
gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
hw_algo = "level";
/* Reset triggers in 3..9 seconds */
hw_margin_ms = <1500>;
};
};
&ethphy1 {
status = "disabled";
};
&eqos {
max-speed = <100>;
};
&ecspi1{
pinctrl-0 = <&pinctrl_ecspi1>;
cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
};
&fec {
status = "disabled";
};
&gpio1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_proton2s>;
gpio-line-names =
"", "", "", "", "", "", "", "POWER",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&gpio6 {
gpio-line-names =
"RELAY0", "RELAY1", "RELAY2", "HEATER",
"FAN", "SPARE", "CLEAR", "FAULT",
"", "", "", "", "", "", "", "", "";
};
&i2c2 {
tlc59108@40 {
compatible = "ti,tlc59108";
reg = <0x40>;
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0x0>;
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
function-enumerator = <20>;
};
led@1 {
reg = <0x1>;
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
function-enumerator = <20>;
};
led@2 {
reg = <0x2>;
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
function-enumerator = <21>;
};
led@3 {
reg = <0x3>;
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
function-enumerator = <21>;
};
led@4 {
reg = <0x4>;
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_BLUE>;
function-enumerator = <21>;
};
led@5 {
reg = <0x5>;
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
function-enumerator = <22>;
};
led@6 {
reg = <0x6>;
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
function-enumerator = <22>;
};
led@7 {
reg = <0x7>;
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_BLUE>;
function-enumerator = <22>;
};
};
rtc1: rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
&uart1 {
pinctrl-0 = <&pinctrl_uart1>;
};
&uart2 {
pinctrl-0 = <&pinctrl_uart2>;
};
&uart3 {
pinctrl-0 = <&pinctrl_uart3>;
};
&uart4 {
linux,rs485-enabled-at-boot-time;
rs485-rts-active-low;
rs485-rts-delay = <0 0>;
rts-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
};
&usdhc1 {
status = "disabled";
};
&wdog1 {
status = "okay";
};

1107
arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi Normal file
View File

File diff suppressed because it is too large Load Diff

29
arch/arm64/boot/dts/freescale/imx8mp-evk-imx-lvds-hdmi-common.dtsi Normal file
View File

@ -0,0 +1,29 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2024 NXP
*/
/dts-v1/;
/plugin/;
&{/} {
lvds-hdmi-connector {
compatible = "hdmi-connector";
label = "J2";
type = "a";
port {
lvds2hdmi_connector_in: endpoint {
remote-endpoint = <&it6263_out>;
};
};
};
};
&lcdif2 {
status = "okay";
};
&lvds_bridge {
status = "okay";
};

44
arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtso Normal file
View File

@ -0,0 +1,44 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2024 NXP
*/
#include "imx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi"
&it6263 {
ports {
port@0 {
reg = <0>;
dual-lvds-odd-pixels;
it6263_lvds_link1: endpoint {
remote-endpoint = <&ldb_lvds_ch0>;
};
};
port@1 {
reg = <1>;
dual-lvds-even-pixels;
it6263_lvds_link2: endpoint {
remote-endpoint = <&ldb_lvds_ch1>;
};
};
};
};
&lvds_bridge {
ports {
port@1 {
ldb_lvds_ch0: endpoint {
remote-endpoint = <&it6263_lvds_link1>;
};
};
port@2 {
ldb_lvds_ch1: endpoint {
remote-endpoint = <&it6263_lvds_link2>;
};
};
};
};

43
arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi Normal file
View File

@ -0,0 +1,43 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2024 NXP
*/
#include <dt-bindings/gpio/gpio.h>
#include "imx8mp-evk-imx-lvds-hdmi-common.dtsi"
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
it6263: hdmi@4c {
compatible = "ite,it6263";
reg = <0x4c>;
data-mapping = "jeida-24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lvds_en>;
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
ivdd-supply = <&reg_buck5>;
ovdd-supply = <&reg_vext_3v3>;
txavcc18-supply = <&reg_buck5>;
txavcc33-supply = <&reg_vext_3v3>;
pvcc1-supply = <&reg_buck5>;
pvcc2-supply = <&reg_buck5>;
avcc-supply = <&reg_vext_3v3>;
anvdd-supply = <&reg_buck5>;
apvdd-supply = <&reg_buck5>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
reg = <2>;
it6263_out: endpoint {
remote-endpoint = <&lvds2hdmi_connector_in>;
};
};
};
};
};

28
arch/arm64/boot/dts/freescale/imx8mp-evk-lvds0-imx-lvds-hdmi.dtso Normal file
View File

@ -0,0 +1,28 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2024 NXP
*/
#include "imx8mp-evk-lvds0-imx-lvds-hdmi-common.dtsi"
&it6263 {
ports {
port@0 {
reg = <0>;
it6263_lvds_link1: endpoint {
remote-endpoint = <&ldb_lvds_ch0>;
};
};
};
};
&lvds_bridge {
ports {
port@1 {
ldb_lvds_ch0: endpoint {
remote-endpoint = <&it6263_lvds_link1>;
};
};
};
};

44
arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtso Normal file
View File

@ -0,0 +1,44 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2024 NXP
*/
#include "imx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi"
&it6263 {
ports {
port@0 {
reg = <0>;
dual-lvds-even-pixels;
it6263_lvds_link1: endpoint {
remote-endpoint = <&ldb_lvds_ch1>;
};
};
port@1 {
reg = <1>;
dual-lvds-odd-pixels;
it6263_lvds_link2: endpoint {
remote-endpoint = <&ldb_lvds_ch0>;
};
};
};
};
&lvds_bridge {
ports {
port@1 {
ldb_lvds_ch0: endpoint {
remote-endpoint = <&it6263_lvds_link2>;
};
};
port@2 {
ldb_lvds_ch1: endpoint {
remote-endpoint = <&it6263_lvds_link1>;
};
};
};
};

43
arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi Normal file
View File

@ -0,0 +1,43 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2024 NXP
*/
#include <dt-bindings/gpio/gpio.h>
#include "imx8mp-evk-imx-lvds-hdmi-common.dtsi"
&i2c3 {
#address-cells = <1>;
#size-cells = <0>;
it6263: hdmi@4c {
compatible = "ite,it6263";
reg = <0x4c>;
data-mapping = "jeida-24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lvds_en>;
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
ivdd-supply = <&reg_buck5>;
ovdd-supply = <&reg_vext_3v3>;
txavcc18-supply = <&reg_buck5>;
txavcc33-supply = <&reg_vext_3v3>;
pvcc1-supply = <&reg_buck5>;
pvcc2-supply = <&reg_buck5>;
avcc-supply = <&reg_vext_3v3>;
anvdd-supply = <&reg_buck5>;
apvdd-supply = <&reg_buck5>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
reg = <2>;
it6263_out: endpoint {
remote-endpoint = <&lvds2hdmi_connector_in>;
};
};
};
};
};

28
arch/arm64/boot/dts/freescale/imx8mp-evk-lvds1-imx-lvds-hdmi.dtso Normal file
View File

@ -0,0 +1,28 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2024 NXP
*/
#include "imx8mp-evk-lvds1-imx-lvds-hdmi-common.dtsi"
&it6263 {
ports {
port@0 {
reg = <0>;
it6263_lvds_link1: endpoint {
remote-endpoint = <&ldb_lvds_ch1>;
};
};
};
};
&lvds_bridge {
ports {
port@2 {
ldb_lvds_ch1: endpoint {
remote-endpoint = <&it6263_lvds_link1>;
};
};
};
};

6
arch/arm64/boot/dts/freescale/imx8mp-evk.dts
View File

@ -938,6 +938,12 @@
>;
};
pinctrl_lvds_en: lvdsengrp {
fsl,pins = <
MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x1c0
>;
};
pinctrl_pcie0: pcie0grp {
fsl,pins = <
MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B 0x60 /* open drain, pull up */

8
arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts
View File

@ -52,7 +52,7 @@
&lvds_bridge {
/* IMX8MP_CLK_MEDIA_LDB = IMX8MP_CLK_MEDIA_DISP2_PIX * 7 */
assigned-clock-rates = <482300000>;
assigned-clock-rates = <490000000>;
status = "okay";
ports {
@ -70,10 +70,10 @@
*/
assigned-clock-rates = <500000000>, <200000000>, <0>,
/* IMX8MP_CLK_MEDIA_DISP2_PIX = pixelclk of lvds panel */
<68900000>,
<70000000>,
<500000000>,
/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB * 2 */
<964600000>;
/* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB */
<490000000>;
};
&pwm4 {

2
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
View File

@ -172,7 +172,7 @@
"Headphones", "HP_OUT",
"Builtin Speaker", "Speaker Amp OUTR",
"Speaker Amp INR", "LINE_OUT";
simple-audio-card,hp-det-gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
simple-audio-card,hp-det-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
simple-audio-card,cpu {
sound-dai = <&sai2>;

2
arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
View File

@ -241,7 +241,7 @@
"Headset Mic", "MICBIAS",
"IN3R", "Headset Mic",
"DMICDAT", "Digital Mic";
simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
simple-audio-card,hp-det-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
simple-audio-card,cpu {
sound-dai = <&sai2>;

2
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi
View File

@ -517,8 +517,6 @@
eeprom@a4 {
compatible = "zii,rave-sp-eeprom";
reg = <0xa4 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
zii,eeprom-name = "main-eeprom";
};
};

2
arch/arm64/boot/dts/freescale/imx8qm-ss-audio.dtsi
View File

@ -134,7 +134,7 @@
};
esai1: esai@59810000 {
compatible = "fsl,imx8qm-esai";
compatible = "fsl,imx8qm-esai", "fsl,imx6ull-esai";
reg = <0x59810000 0x10000>;
interrupts = <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&esai1_lpcg IMX_LPCG_CLK_0>,

5
arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
View File

@ -221,6 +221,11 @@
>;
};
p3t1085: temperature-sensor@48 {
compatible = "nxp,p3t1085";
reg = <0x48>;
};
ptn5110: tcpc@50 {
compatible = "nxp,ptn5110", "tcpci";
reg = <0x50>;

2
arch/arm64/boot/dts/freescale/imx95.dtsi
View File

@ -1673,7 +1673,7 @@
netcmix_blk_ctrl: syscon@4c810000 {
compatible = "nxp,imx95-netcmix-blk-ctrl", "syscon";
reg = <0x0 0x4c810000 0x0 0x10000>;
reg = <0x0 0x4c810000 0x0 0x8>;
#clock-cells = <1>;
clocks = <&scmi_clk IMX95_CLK_BUSNETCMIX>;
assigned-clocks = <&scmi_clk IMX95_CLK_BUSNETCMIX>;

1
arch/arm64/configs/defconfig
View File

@ -902,6 +902,7 @@ CONFIG_DRM_PANEL_SITRONIX_ST7703=m
CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
CONFIG_DRM_PANEL_VISIONOX_VTDR6130=m
CONFIG_DRM_FSL_LDB=m
CONFIG_DRM_ITE_IT6263=m
CONFIG_DRM_LONTIUM_LT8912B=m
CONFIG_DRM_LONTIUM_LT9611=m
CONFIG_DRM_LONTIUM_LT9611UXC=m

2
drivers/soc/imx/Makefile
View File

@ -3,4 +3,4 @@ ifeq ($(CONFIG_ARM),y)
obj-$(CONFIG_ARCH_MXC) += soc-imx.o
endif
obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
obj-$(CONFIG_SOC_IMX9) += imx93-src.o
obj-$(CONFIG_SOC_IMX9) += imx93-src.o soc-imx9.o

128
drivers/soc/imx/soc-imx9.c Normal file
View File

@ -0,0 +1,128 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2024 NXP
*/
#include <linux/arm-smccc.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/sys_soc.h>
#define IMX_SIP_GET_SOC_INFO 0xc2000006
#define SOC_ID(x) (((x) & 0xFFFF) >> 8)
#define SOC_REV_MAJOR(x) ((((x) >> 28) & 0xF) - 0x9)
#define SOC_REV_MINOR(x) (((x) >> 24) & 0xF)
static int imx9_soc_probe(struct platform_device *pdev)
{
struct soc_device_attribute *attr;
struct arm_smccc_res res;
struct soc_device *sdev;
u32 soc_id, rev_major, rev_minor;
u64 uid127_64, uid63_0;
int err;
attr = kzalloc(sizeof(*attr), GFP_KERNEL);
if (!attr)
return -ENOMEM;
err = of_property_read_string(of_root, "model", &attr->machine);
if (err) {
pr_err("%s: missing model property: %d\n", __func__, err);
goto attr;
}
attr->family = kasprintf(GFP_KERNEL, "Freescale i.MX");
/*
* Retrieve the soc id, rev & uid info:
* res.a1[31:16]: soc revision;
* res.a1[15:0]: soc id;
* res.a2: uid[127:64];
* res.a3: uid[63:0];
*/
arm_smccc_smc(IMX_SIP_GET_SOC_INFO, 0, 0, 0, 0, 0, 0, 0, &res);
if (res.a0 != SMCCC_RET_SUCCESS) {
pr_err("%s: SMC failed: 0x%lx\n", __func__, res.a0);
err = -EINVAL;
goto family;
}
soc_id = SOC_ID(res.a1);
rev_major = SOC_REV_MAJOR(res.a1);
rev_minor = SOC_REV_MINOR(res.a1);
attr->soc_id = kasprintf(GFP_KERNEL, "i.MX%2x", soc_id);
attr->revision = kasprintf(GFP_KERNEL, "%d.%d", rev_major, rev_minor);
uid127_64 = res.a2;
uid63_0 = res.a3;
attr->serial_number = kasprintf(GFP_KERNEL, "%016llx%016llx", uid127_64, uid63_0);
sdev = soc_device_register(attr);
if (IS_ERR(sdev)) {
err = PTR_ERR(sdev);
pr_err("%s failed to register SoC as a device: %d\n", __func__, err);
goto serial_number;
}
return 0;
serial_number:
kfree(attr->serial_number);
kfree(attr->revision);
kfree(attr->soc_id);
family:
kfree(attr->family);
attr:
kfree(attr);
return err;
}
static __maybe_unused const struct of_device_id imx9_soc_match[] = {
{ .compatible = "fsl,imx93", },
{ .compatible = "fsl,imx95", },
{ }
};
#define IMX_SOC_DRIVER "imx9-soc"
static struct platform_driver imx9_soc_driver = {
.probe = imx9_soc_probe,
.driver = {
.name = IMX_SOC_DRIVER,
},
};
static int __init imx9_soc_init(void)
{
int ret;
struct platform_device *pdev;
/* No match means it is not an i.MX 9 series SoC, do nothing. */
if (!of_match_node(imx9_soc_match, of_root))
return 0;
ret = platform_driver_register(&imx9_soc_driver);
if (ret) {
pr_err("failed to register imx9_soc platform driver: %d\n", ret);
return ret;
}
pdev = platform_device_register_simple(IMX_SOC_DRIVER, -1, NULL, 0);
if (IS_ERR(pdev)) {
pr_err("failed to register imx9_soc platform device: %ld\n", PTR_ERR(pdev));
platform_driver_unregister(&imx9_soc_driver);
return PTR_ERR(pdev);
}
return 0;
}
device_initcall(imx9_soc_init);
MODULE_AUTHOR("NXP");
MODULE_DESCRIPTION("NXP i.MX9 SoC");
MODULE_LICENSE("GPL");