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staging: comedi: s626: prefix macros in s626.c
Prefix the macros defined in "s626.c" with `S626_`. Macro `VECT0` is unused, so remove it. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Ian Abbott
Greg Kroah-Hartman
parent
31de1948d8
commit
676921c9d2
@ -145,15 +145,16 @@ struct s626_enc_info {
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};
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/* Counter overflow/index event flag masks for RDMISC2. */
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#define INDXMASK(C) (1 << (((C) > 2) ? ((C) * 2 - 1) : ((C) * 2 + 4)))
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#define OVERMASK(C) (1 << (((C) > 2) ? ((C) * 2 + 5) : ((C) * 2 + 10)))
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#define EVBITS(C) { 0, OVERMASK(C), INDXMASK(C), \
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OVERMASK(C) | INDXMASK(C) }
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#define S626_INDXMASK(C) (1 << (((C) > 2) ? ((C) * 2 - 1) : ((C) * 2 + 4)))
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#define S626_OVERMASK(C) (1 << (((C) > 2) ? ((C) * 2 + 5) : ((C) * 2 + 10)))
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#define S626_EVBITS(C) { 0, S626_OVERMASK(C), S626_INDXMASK(C), \
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S626_OVERMASK(C) | S626_INDXMASK(C) }
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/*
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* Translation table to map IntSrc into equivalent RDMISC2 event flag bits.
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* static const uint16_t s626_event_bits[][4] =
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* { EVBITS(0), EVBITS(1), EVBITS(2), EVBITS(3), EVBITS(4), EVBITS(5) };
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* { S626_EVBITS(0), S626_EVBITS(1), S626_EVBITS(2), S626_EVBITS(3),
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* S626_EVBITS(4), S626_EVBITS(5) };
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*/
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/*
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@ -190,10 +191,10 @@ static bool s626_mc_test(struct comedi_device *dev,
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return (val & cmd) ? true : false;
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}
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#define BUGFIX_STREG(REGADRS) (REGADRS - 4)
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#define S626_BUGFIX_STREG(REGADRS) ((REGADRS) - 4)
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/* Write a time slot control record to TSL2. */
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#define VECTPORT(VECTNUM) (P_TSL2 + ((VECTNUM) << 2))
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#define S626_VECTPORT(VECTNUM) (P_TSL2 + ((VECTNUM) << 2))
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static const struct comedi_lrange s626_range_table = {
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2, {
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@ -341,10 +342,6 @@ static uint8_t s626_i2c_read(struct comedi_device *dev, uint8_t addr)
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/* *********** DAC FUNCTIONS *********** */
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/* Slot 0 base settings. */
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#define VECT0 (XSD2 | RSD3 | SIB_A2)
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/* Slot 0 always shifts in 0xFF and store it to FB_BUFFER2. */
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/* TrimDac LogicalChan-to-PhysicalChan mapping table. */
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static const uint8_t s626_trimchan[] = { 10, 9, 8, 3, 2, 7, 6, 1, 0, 5, 4 };
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@ -417,7 +414,7 @@ static void s626_send_dac(struct comedi_device *dev, uint32_t val)
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* will be shifted in and stored in FB_BUFFER2 for end-of-slot-list
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* detection.
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*/
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writel(XSD2 | RSD3 | SIB_A2, devpriv->mmio + VECTPORT(0));
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writel(XSD2 | RSD3 | SIB_A2, devpriv->mmio + S626_VECTPORT(0));
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/*
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* Wait for slot 1 to execute to ensure that the Packet will be
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@ -437,7 +434,7 @@ static void s626_send_dac(struct comedi_device *dev, uint32_t val)
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* buffer register.
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*/
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writel(XSD2 | XFIFO_2 | RSD2 | SIB_A2 | EOS,
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devpriv->mmio + VECTPORT(0));
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devpriv->mmio + S626_VECTPORT(0));
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/* WAIT FOR THE TRANSACTION TO FINISH ----------------------- */
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@ -479,7 +476,7 @@ static void s626_send_dac(struct comedi_device *dev, uint32_t val)
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* In order to do this, we reprogram slot 0 so that it will shift in
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* SD3, which is driven only by a pull-up resistor.
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*/
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writel(RSD3 | SIB_A2 | EOS, devpriv->mmio + VECTPORT(0));
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writel(RSD3 | SIB_A2 | EOS, devpriv->mmio + S626_VECTPORT(0));
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/*
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* Wait for slot 0 to execute, at which time the TSL is setup for
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@ -530,13 +527,13 @@ static void s626_set_dac(struct comedi_device *dev, uint16_t chan,
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/* Choose DAC chip select to be asserted */
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ws_image = (chan & 2) ? WS1 : WS2;
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/* Slot 2: Transmit high data byte to target DAC */
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writel(XSD2 | XFIFO_1 | ws_image, devpriv->mmio + VECTPORT(2));
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writel(XSD2 | XFIFO_1 | ws_image, devpriv->mmio + S626_VECTPORT(2));
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/* Slot 3: Transmit low data byte to target DAC */
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writel(XSD2 | XFIFO_0 | ws_image, devpriv->mmio + VECTPORT(3));
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writel(XSD2 | XFIFO_0 | ws_image, devpriv->mmio + S626_VECTPORT(3));
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/* Slot 4: Transmit to non-existent TrimDac channel to keep clock */
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writel(XSD2 | XFIFO_3 | WS3, devpriv->mmio + VECTPORT(4));
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writel(XSD2 | XFIFO_3 | WS3, devpriv->mmio + S626_VECTPORT(4));
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/* Slot 5: running after writing target DAC's low data byte */
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writel(XSD2 | XFIFO_2 | WS3 | EOS, devpriv->mmio + VECTPORT(5));
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writel(XSD2 | XFIFO_2 | WS3 | EOS, devpriv->mmio + S626_VECTPORT(5));
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/*
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* Construct and transmit target DAC's serial packet:
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@ -577,13 +574,13 @@ static void s626_write_trim_dac(struct comedi_device *dev, uint8_t logical_chan,
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*/
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/* Slot 2: Send high uint8_t to target TrimDac */
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writel(XSD2 | XFIFO_1 | WS3, devpriv->mmio + VECTPORT(2));
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writel(XSD2 | XFIFO_1 | WS3, devpriv->mmio + S626_VECTPORT(2));
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/* Slot 3: Send low uint8_t to target TrimDac */
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writel(XSD2 | XFIFO_0 | WS3, devpriv->mmio + VECTPORT(3));
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writel(XSD2 | XFIFO_0 | WS3, devpriv->mmio + S626_VECTPORT(3));
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/* Slot 4: Send NOP high uint8_t to DAC0 to keep clock running */
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writel(XSD2 | XFIFO_3 | WS1, devpriv->mmio + VECTPORT(4));
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writel(XSD2 | XFIFO_3 | WS1, devpriv->mmio + S626_VECTPORT(4));
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/* Slot 5: Send NOP low uint8_t to DAC0 */
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writel(XSD2 | XFIFO_2 | WS1 | EOS, devpriv->mmio + VECTPORT(5));
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writel(XSD2 | XFIFO_2 | WS1 | EOS, devpriv->mmio + S626_VECTPORT(5));
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/*
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* Construct and transmit target DAC's serial packet:
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@ -1230,7 +1227,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
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.my_cra = LP_CR0A,
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.my_crb = LP_CR0B,
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.my_latch_lsw = LP_CNTR0ALSW,
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.my_event_bits = EVBITS(0),
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.my_event_bits = S626_EVBITS(0),
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}, {
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.get_enable = s626_get_enable_a,
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.get_int_src = s626_get_int_src_a,
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@ -1245,7 +1242,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
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.my_cra = LP_CR1A,
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.my_crb = LP_CR1B,
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.my_latch_lsw = LP_CNTR1ALSW,
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.my_event_bits = EVBITS(1),
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.my_event_bits = S626_EVBITS(1),
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}, {
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.get_enable = s626_get_enable_a,
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.get_int_src = s626_get_int_src_a,
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@ -1260,7 +1257,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
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.my_cra = LP_CR2A,
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.my_crb = LP_CR2B,
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.my_latch_lsw = LP_CNTR2ALSW,
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.my_event_bits = EVBITS(2),
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.my_event_bits = S626_EVBITS(2),
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}, {
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.get_enable = s626_get_enable_b,
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.get_int_src = s626_get_int_src_b,
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@ -1275,7 +1272,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
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.my_cra = LP_CR0A,
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.my_crb = LP_CR0B,
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.my_latch_lsw = LP_CNTR0BLSW,
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.my_event_bits = EVBITS(3),
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.my_event_bits = S626_EVBITS(3),
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}, {
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.get_enable = s626_get_enable_b,
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.get_int_src = s626_get_int_src_b,
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@ -1290,7 +1287,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
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.my_cra = LP_CR1A,
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.my_crb = LP_CR1B,
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.my_latch_lsw = LP_CNTR1BLSW,
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.my_event_bits = EVBITS(4),
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.my_event_bits = S626_EVBITS(4),
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}, {
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.get_enable = s626_get_enable_b,
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.get_int_src = s626_get_int_src_b,
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@ -1305,7 +1302,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
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.my_cra = LP_CR2A,
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.my_crb = LP_CR2B,
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.my_latch_lsw = LP_CNTR2BLSW,
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.my_event_bits = EVBITS(5),
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.my_event_bits = S626_EVBITS(5),
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},
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};
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@ -1746,7 +1743,7 @@ static void s626_reset_adc(struct comedi_device *dev, uint8_t *ppl)
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*rps++ = RPS_PAUSE | RPS_GPIO2; /* Wait for ADC done. */
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/* Transfer ADC data from FB BUFFER 1 register to DMA buffer. */
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*rps++ = RPS_STREG | (BUGFIX_STREG(P_FB_BUFFER1) >> 2);
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*rps++ = RPS_STREG | (S626_BUGFIX_STREG(P_FB_BUFFER1) >> 2);
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*rps++ = (uint32_t)devpriv->ana_buf.physical_base +
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(devpriv->adc_items << 2);
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@ -1789,7 +1786,7 @@ static void s626_reset_adc(struct comedi_device *dev, uint8_t *ppl)
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*rps++ = RPS_PAUSE | RPS_GPIO2; /* Wait for ADC done. */
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/* Transfer final ADC data from FB BUFFER 1 register to DMA buffer. */
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*rps++ = RPS_STREG | (BUGFIX_STREG(P_FB_BUFFER1) >> 2);
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*rps++ = RPS_STREG | (S626_BUGFIX_STREG(P_FB_BUFFER1) >> 2);
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*rps++ = (uint32_t)devpriv->ana_buf.physical_base +
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(devpriv->adc_items << 2);
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@ -2211,14 +2208,14 @@ static int s626_ai_cmdtest(struct comedi_device *dev,
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if (cmd->convert_src == TRIG_EXT)
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err |= cfc_check_trigger_arg_max(&cmd->convert_arg, 39);
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#define MAX_SPEED 200000 /* in nanoseconds */
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#define MIN_SPEED 2000000000 /* in nanoseconds */
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#define S626_MAX_SPEED 200000 /* in nanoseconds */
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#define S626_MIN_SPEED 2000000000 /* in nanoseconds */
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if (cmd->scan_begin_src == TRIG_TIMER) {
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err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
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MAX_SPEED);
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S626_MAX_SPEED);
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err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
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MIN_SPEED);
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S626_MIN_SPEED);
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} else {
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/* external trigger */
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/* should be level/edge, hi/lo specification here */
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@ -2226,8 +2223,10 @@ static int s626_ai_cmdtest(struct comedi_device *dev,
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/* err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg, 9); */
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}
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if (cmd->convert_src == TRIG_TIMER) {
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err |= cfc_check_trigger_arg_min(&cmd->convert_arg, MAX_SPEED);
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err |= cfc_check_trigger_arg_max(&cmd->convert_arg, MIN_SPEED);
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err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
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S626_MAX_SPEED);
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err |= cfc_check_trigger_arg_max(&cmd->convert_arg,
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S626_MIN_SPEED);
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} else {
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/* external trigger */
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/* see above */
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@ -2704,7 +2703,7 @@ static void s626_initialize(struct comedi_device *dev)
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*/
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/* Slot 0: Trap TSL execution, shift 0xFF into FB_BUFFER2 */
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writel(XSD2 | RSD3 | SIB_A2 | EOS, devpriv->mmio + VECTPORT(0));
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writel(XSD2 | RSD3 | SIB_A2 | EOS, devpriv->mmio + S626_VECTPORT(0));
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/*
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* Initialize slot 1, which is constant. Slot 1 causes a
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@ -2716,7 +2715,7 @@ static void s626_initialize(struct comedi_device *dev)
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*/
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/* Slot 1: Fetch DWORD from Audio2's output FIFO */
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writel(LF_A2, devpriv->mmio + VECTPORT(1));
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writel(LF_A2, devpriv->mmio + S626_VECTPORT(1));
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/* Start DAC's audio interface (TSL2) running */
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writel(ACON1_DACSTART, devpriv->mmio + P_ACON1);
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