diff --git a/drivers/net/pse-pd/tps23881.c b/drivers/net/pse-pd/tps23881.c index 2ea75686a319..5c4e88be46ee 100644 --- a/drivers/net/pse-pd/tps23881.c +++ b/drivers/net/pse-pd/tps23881.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -737,6 +738,7 @@ static int tps23881_i2c_probe(struct i2c_client *client) { struct device *dev = &client->dev; struct tps23881_priv *priv; + struct gpio_desc *reset; int ret; u8 val; @@ -749,6 +751,25 @@ static int tps23881_i2c_probe(struct i2c_client *client) if (!priv) return -ENOMEM; + reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(reset)) + return dev_err_probe(&client->dev, PTR_ERR(reset), "Failed to get reset GPIO\n"); + + if (reset) { + /* TPS23880 datasheet (Rev G) indicates minimum reset pulse is 5us */ + usleep_range(5, 10); + gpiod_set_value_cansleep(reset, 0); /* De-assert reset */ + + /* TPS23880 datasheet indicates the minimum time after power on reset + * should be 20ms, but the document describing how to load SRAM ("How + * to Load TPS2388x SRAM and Parity Code over I2C" (Rev E)) + * indicates we should delay that programming by at least 50ms. So + * we'll wait the entire 50ms here to ensure we're safe to go to the + * SRAM loading proceedure. + */ + msleep(50); + } + ret = i2c_smbus_read_byte_data(client, TPS23881_REG_DEVID); if (ret < 0) return ret;