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tg3: Address byte-order miss-matches
Address byte-order miss-matches flagged by Sparse. In tg3_load_firmware_cpu() and tg3_get_device_address() this is done using appropriate types to store big endian values. In the cases of tg3_test_nvram(), where buf is an array which contains values of several different types, cast to __le32 before converting values to host byte order. Reported by Sparse as: .../tg3.c:3745:34: warning: cast to restricted __be32 .../tg3.c:13096:21: warning: cast to restricted __le32 .../tg3.c:13096:21: warning: cast from restricted __be32 .../tg3.c:13101:21: warning: cast to restricted __le32 .../tg3.c:13101:21: warning: cast from restricted __be32 .../tg3.c:17070:63: warning: incorrect type in argument 3 (different base types) .../tg3.c:17070:63: expected restricted __be32 [usertype] *val .../tg3.c:17070:63: got unsigned int * dr.../tg3.c:17071:63: warning: incorrect type in argument 3 (different base types) .../tg3.c:17071:63: expected restricted __be32 [usertype] *val .../tg3.c:17071:63: got unsigned int * Also, address white-space issues on lines modified for the above. And, for consistency, lines adjacent to them. Compile tested only. No functional change intended. Signed-off-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20241009-tg3-sparse-v1-1-6af38a7bf4ff@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -3737,7 +3737,7 @@ static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base,
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}
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do {
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u32 *fw_data = (u32 *)(fw_hdr + 1);
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__be32 *fw_data = (__be32 *)(fw_hdr + 1);
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for (i = 0; i < tg3_fw_data_len(tp, fw_hdr); i++)
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write_op(tp, cpu_scratch_base +
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(be32_to_cpu(fw_hdr->base_addr) & 0xffff) +
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@ -13126,12 +13126,16 @@ static int tg3_test_nvram(struct tg3 *tp)
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/* Bootstrap checksum at offset 0x10 */
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csum = calc_crc((unsigned char *) buf, 0x10);
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if (csum != le32_to_cpu(buf[0x10/4]))
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/* The type of buf is __be32 *, but this value is __le32 */
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if (csum != le32_to_cpu((__force __le32)buf[0x10 / 4]))
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goto out;
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/* Manufacturing block starts at offset 0x74, checksum at 0xfc */
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csum = calc_crc((unsigned char *) &buf[0x74/4], 0x88);
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if (csum != le32_to_cpu(buf[0xfc/4]))
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csum = calc_crc((unsigned char *)&buf[0x74 / 4], 0x88);
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/* The type of buf is __be32 *, but this value is __le32 */
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if (csum != le32_to_cpu((__force __le32)buf[0xfc / 4]))
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goto out;
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kfree(buf);
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@ -17098,12 +17102,14 @@ static int tg3_get_device_address(struct tg3 *tp, u8 *addr)
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addr_ok = is_valid_ether_addr(addr);
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}
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if (!addr_ok) {
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__be32 be_hi, be_lo;
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/* Next, try NVRAM. */
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if (!tg3_flag(tp, NO_NVRAM) &&
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!tg3_nvram_read_be32(tp, mac_offset + 0, &hi) &&
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!tg3_nvram_read_be32(tp, mac_offset + 4, &lo)) {
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memcpy(&addr[0], ((char *)&hi) + 2, 2);
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memcpy(&addr[2], (char *)&lo, sizeof(lo));
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!tg3_nvram_read_be32(tp, mac_offset + 0, &be_hi) &&
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!tg3_nvram_read_be32(tp, mac_offset + 4, &be_lo)) {
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memcpy(&addr[0], ((char *)&be_hi) + 2, 2);
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memcpy(&addr[2], (char *)&be_lo, sizeof(be_lo));
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}
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/* Finally just fetch it out of the MAC control regs. */
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else {
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