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V4L/DVB (6629): zl10353: fix default adc_clock and TRL nominal rate calculation
The default adc_clock for the zl10353 is different from what was originally thought to be the case and the TRL nominal rate formula was incorrect as a result. Use a better (and hopefully now correct) formula. Signed-off-by: Chris Pascoe <c.pascoe@itee.uq.edu.au> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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@ -122,7 +122,7 @@ static void zl10353_calc_nominal_rate(struct dvb_frontend *fe,
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enum fe_bandwidth bandwidth,
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u16 *nominal_rate)
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{
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u32 adc_clock = 22528; /* 20.480 MHz on the board(!?) */
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u32 adc_clock = 45056; /* 45.056 MHz */
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u8 bw;
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struct zl10353_state *state = fe->demodulator_priv;
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@ -142,7 +142,7 @@ static void zl10353_calc_nominal_rate(struct dvb_frontend *fe,
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break;
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}
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*nominal_rate = (64 * bw * (1<<16) / (7 * 8) * 4000 / adc_clock + 2) / 4;
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*nominal_rate = (bw * (1 << 23) / 7 * 125 + adc_clock / 2) / adc_clock;
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dprintk("%s: bw %d, adc_clock %d => 0x%x\n",
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__FUNCTION__, bw, adc_clock, *nominal_rate);
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@ -30,7 +30,7 @@ struct zl10353_config
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u8 demod_address;
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/* frequencies in kHz */
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int adc_clock; // default: 22528
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int adc_clock; /* default: 45056 */
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/* set if no pll is connected to the secondary i2c bus */
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int no_tuner;
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