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clk: davinci: remove platform data struct
There are no board files using struct davinci_pll_platform_data anymore. The structure itself is currently used to store a single pointer. Let's remove the struct definition, the header and rework the driver to not require the syscon regmap to be stored in probe(). Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20241217174154.84441-1-brgl@bgdev.pl Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -19,7 +19,6 @@
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#include <linux/mfd/syscon.h>
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#include <linux/notifier.h>
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#include <linux/of.h>
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#include <linux/platform_data/clk-davinci-pll.h>
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#include <linux/platform_device.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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@ -840,27 +839,6 @@ int of_davinci_pll_init(struct device *dev, struct device_node *node,
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return 0;
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}
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static struct davinci_pll_platform_data *davinci_pll_get_pdata(struct device *dev)
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{
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struct davinci_pll_platform_data *pdata = dev_get_platdata(dev);
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/*
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* Platform data is optional, so allocate a new struct if one was not
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* provided. For device tree, this will always be the case.
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*/
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if (!pdata)
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pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return NULL;
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/* for device tree, we need to fill in the struct */
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if (dev->of_node)
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pdata->cfgchip =
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syscon_regmap_lookup_by_compatible("ti,da830-cfgchip");
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return pdata;
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}
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/* needed in early boot for clocksource/clockevent */
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#ifdef CONFIG_ARCH_DAVINCI_DA850
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CLK_OF_DECLARE(da850_pll0, "ti,da850-pll0", of_da850_pll0_init);
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@ -890,8 +868,8 @@ typedef int (*davinci_pll_init)(struct device *dev, void __iomem *base,
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static int davinci_pll_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct davinci_pll_platform_data *pdata;
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davinci_pll_init pll_init = NULL;
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struct regmap *cfgchip;
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void __iomem *base;
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pll_init = device_get_match_data(dev);
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@ -903,17 +881,13 @@ static int davinci_pll_probe(struct platform_device *pdev)
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return -EINVAL;
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}
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pdata = davinci_pll_get_pdata(dev);
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if (!pdata) {
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dev_err(dev, "missing platform data\n");
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return -EINVAL;
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}
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cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip");
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base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(base))
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return PTR_ERR(base);
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return pll_init(dev, base, pdata->cfgchip);
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return pll_init(dev, base, cfgchip);
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}
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static struct platform_driver davinci_pll_driver = {
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@ -1,21 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* PLL clock driver for TI Davinci SoCs
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*
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* Copyright (C) 2018 David Lechner <david@lechnology.com>
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*/
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#ifndef __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__
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#define __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__
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#include <linux/regmap.h>
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/**
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* davinci_pll_platform_data
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* @cfgchip: CFGCHIP syscon regmap
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*/
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struct davinci_pll_platform_data {
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struct regmap *cfgchip;
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};
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#endif /* __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__ */
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