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habanalabs/gaudi2: add PCI revision 2 support
Add support for Gaudi2 Device with PCI revision 2. Functionality is exactly the same as revision 1, the only difference is device name exposed to user. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
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306206985a
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841cd2d765
@ -748,6 +748,10 @@ static int device_early_init(struct hl_device *hdev)
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gaudi2_set_asic_funcs(hdev);
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strscpy(hdev->asic_name, "GAUDI2", sizeof(hdev->asic_name));
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break;
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case ASIC_GAUDI2B:
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gaudi2_set_asic_funcs(hdev);
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strscpy(hdev->asic_name, "GAUDI2B", sizeof(hdev->asic_name));
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break;
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break;
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default:
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dev_err(hdev->dev, "Unrecognized ASIC type %d\n",
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@ -1192,6 +1192,7 @@ struct hl_dec {
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* @ASIC_GAUDI: Gaudi device (HL-2000).
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* @ASIC_GAUDI_SEC: Gaudi secured device (HL-2000).
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* @ASIC_GAUDI2: Gaudi2 device.
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* @ASIC_GAUDI2B: Gaudi2B device.
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*/
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enum hl_asic_type {
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ASIC_INVALID,
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@ -1199,6 +1200,7 @@ enum hl_asic_type {
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ASIC_GAUDI,
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ASIC_GAUDI_SEC,
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ASIC_GAUDI2,
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ASIC_GAUDI2B,
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};
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struct hl_cs_parser;
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@ -9,6 +9,7 @@
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#define pr_fmt(fmt) "habanalabs: " fmt
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#include "habanalabs.h"
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#include "../include/hw_ip/pci/pci_general.h"
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#include <linux/pci.h>
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#include <linux/aer.h>
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@ -74,16 +75,17 @@ MODULE_DEVICE_TABLE(pci, ids);
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/*
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* get_asic_type - translate device id to asic type
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*
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* @device: id of the PCI device
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* @hdev: pointer to habanalabs device structure.
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*
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* Translate device id to asic type.
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* Translate device id and revision id to asic type.
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* In case of unidentified device, return -1
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*/
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static enum hl_asic_type get_asic_type(u16 device)
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static enum hl_asic_type get_asic_type(struct hl_device *hdev)
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{
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enum hl_asic_type asic_type;
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struct pci_dev *pdev = hdev->pdev;
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enum hl_asic_type asic_type = ASIC_INVALID;
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switch (device) {
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switch (pdev->device) {
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case PCI_IDS_GOYA:
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asic_type = ASIC_GOYA;
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break;
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@ -94,10 +96,18 @@ static enum hl_asic_type get_asic_type(u16 device)
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asic_type = ASIC_GAUDI_SEC;
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break;
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case PCI_IDS_GAUDI2:
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asic_type = ASIC_GAUDI2;
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switch (pdev->revision) {
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case REV_ID_A:
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asic_type = ASIC_GAUDI2;
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break;
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case REV_ID_B:
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asic_type = ASIC_GAUDI2B;
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break;
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default:
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break;
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}
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break;
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default:
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asic_type = ASIC_INVALID;
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break;
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}
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@ -416,7 +426,7 @@ static int create_hdev(struct hl_device **dev, struct pci_dev *pdev)
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/* First, we must find out which ASIC are we handling. This is needed
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* to configure the behavior of the driver (kernel parameters)
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*/
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hdev->asic_type = get_asic_type(pdev->device);
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hdev->asic_type = get_asic_type(hdev);
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if (hdev->asic_type == ASIC_INVALID) {
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dev_err(&pdev->dev, "Unsupported ASIC\n");
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rc = -ENODEV;
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@ -10,10 +10,11 @@
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#include <uapi/misc/habanalabs.h>
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#include "habanalabs.h"
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/uaccess.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/uaccess.h>
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#include <linux/vmalloc.h>
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static u32 hl_debug_struct_size[HL_DEBUG_OP_TIMESTAMP + 1] = {
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@ -105,6 +106,7 @@ static int hw_ip_info(struct hl_device *hdev, struct hl_info_args *args)
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hw_ip.edma_enabled_mask = prop->edma_enabled_mask;
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hw_ip.server_type = prop->server_type;
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hw_ip.security_enabled = prop->fw_security_enabled;
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hw_ip.revision_id = hdev->pdev->revision;
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return copy_to_user(out, &hw_ip,
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min((size_t) size, sizeof(hw_ip))) ? -EFAULT : 0;
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@ -635,6 +635,7 @@ int hl_mmu_if_set_funcs(struct hl_device *hdev)
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hl_mmu_v1_set_funcs(hdev, &hdev->mmu_func[MMU_DR_PGT]);
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break;
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case ASIC_GAUDI2:
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case ASIC_GAUDI2B:
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/* MMUs in Gaudi2 are always host resident */
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hl_mmu_v2_hr_set_funcs(hdev, &hdev->mmu_func[MMU_HR_PGT]);
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break;
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@ -248,6 +248,8 @@ static ssize_t device_type_show(struct device *dev,
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case ASIC_GAUDI2:
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str = "GAUDI2";
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break;
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case ASIC_GAUDI2B:
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str = "GAUDI2B";
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break;
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default:
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dev_err(hdev->dev, "Unrecognized ASIC type %d\n",
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@ -3968,11 +3968,7 @@ static void gaudi2_init_firmware_loader(struct hl_device *hdev)
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fw_loader->skip_bmc = false;
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fw_loader->sram_bar_id = SRAM_CFG_BAR_ID;
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fw_loader->dram_bar_id = DRAM_BAR_ID;
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if (hdev->asic_type == ASIC_GAUDI2)
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fw_loader->cpu_timeout = GAUDI2_CPU_TIMEOUT_USEC;
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else /* ASIC_GAUDI2_FPGA */
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fw_loader->cpu_timeout = GAUDI2_FPGA_CPU_TIMEOUT;
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fw_loader->cpu_timeout = GAUDI2_CPU_TIMEOUT_USEC;
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/* here we update initial values for few specific dynamic regs (as
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* before reading the first descriptor from FW those value has to be
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@ -23,8 +23,6 @@
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#define GAUDI2_CPU_TIMEOUT_USEC 30000000 /* 30s */
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#define GAUDI2_FPGA_CPU_TIMEOUT 100000000 /* 100s */
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#define NUMBER_OF_PDMA_QUEUES 2
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#define NUMBER_OF_EDMA_QUEUES 8
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#define NUMBER_OF_MME_QUEUES 4
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@ -20,4 +20,11 @@
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#define PCI_CONFIG_ELBI_STS_MASK (PCI_CONFIG_ELBI_STS_ERR | \
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PCI_CONFIG_ELBI_STS_DONE)
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enum hl_revision_id {
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/* PCI revision ID 0 is not legal */
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REV_ID_INVALID = 0x00,
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REV_ID_A = 0x01,
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REV_ID_B = 0x02,
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};
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#endif /* INCLUDE_PCI_GENERAL_H_ */
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@ -868,6 +868,7 @@ enum hl_server_type {
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* @number_of_user_interrupts: The number of interrupts that are available to the userspace
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* application to use. Relevant for Gaudi2 and later.
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* @device_mem_alloc_default_page_size: default page size used in device memory allocation.
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* @revision_id: PCI revision ID of the ASIC.
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*/
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struct hl_info_hw_ip_info {
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__u64 sram_base_address;
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@ -898,6 +899,12 @@ struct hl_info_hw_ip_info {
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__u16 pad2;
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__u64 reserved4;
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__u64 device_mem_alloc_default_page_size;
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__u64 reserved5;
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__u64 reserved6;
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__u32 reserved7;
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__u8 reserved8;
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__u8 revision_id;
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__u8 pad[2];
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};
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struct hl_info_dram_usage {
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