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drivers: perf: arm_pmuv3: Add new macro PMUV3_INIT_MAP_EVENT()
This further compacts all remaining PMU init procedures requiring specific map_event functions via a new macro PMUV3_INIT_MAP_EVENT(). While here, it also changes generated init function names to match to those generated via the other macro PMUV3_INIT_SIMPLE(). This does not cause functional change. Cc: Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: James Clark <james.clark@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/20231114061656.337231-1-anshuman.khandual@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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@ -1221,6 +1221,12 @@ static int name##_pmu_init(struct arm_pmu *cpu_pmu) \
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return armv8_pmu_init(cpu_pmu, #name, armv8_pmuv3_map_event); \
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}
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#define PMUV3_INIT_MAP_EVENT(name, map_event) \
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static int name##_pmu_init(struct arm_pmu *cpu_pmu) \
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{ \
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return armv8_pmu_init(cpu_pmu, #name, map_event); \
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}
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PMUV3_INIT_SIMPLE(armv8_pmuv3)
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PMUV3_INIT_SIMPLE(armv8_cortex_a34)
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@ -1247,51 +1253,24 @@ PMUV3_INIT_SIMPLE(armv8_neoverse_v1)
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PMUV3_INIT_SIMPLE(armv8_nvidia_carmel)
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PMUV3_INIT_SIMPLE(armv8_nvidia_denver)
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static int armv8_a35_pmu_init(struct arm_pmu *cpu_pmu)
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{
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return armv8_pmu_init(cpu_pmu, "armv8_cortex_a35", armv8_a53_map_event);
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}
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static int armv8_a53_pmu_init(struct arm_pmu *cpu_pmu)
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{
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return armv8_pmu_init(cpu_pmu, "armv8_cortex_a53", armv8_a53_map_event);
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}
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static int armv8_a57_pmu_init(struct arm_pmu *cpu_pmu)
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{
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return armv8_pmu_init(cpu_pmu, "armv8_cortex_a57", armv8_a57_map_event);
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}
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static int armv8_a72_pmu_init(struct arm_pmu *cpu_pmu)
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{
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return armv8_pmu_init(cpu_pmu, "armv8_cortex_a72", armv8_a57_map_event);
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}
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static int armv8_a73_pmu_init(struct arm_pmu *cpu_pmu)
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{
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return armv8_pmu_init(cpu_pmu, "armv8_cortex_a73", armv8_a73_map_event);
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}
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static int armv8_thunder_pmu_init(struct arm_pmu *cpu_pmu)
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{
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return armv8_pmu_init(cpu_pmu, "armv8_cavium_thunder", armv8_thunder_map_event);
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}
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static int armv8_vulcan_pmu_init(struct arm_pmu *cpu_pmu)
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{
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return armv8_pmu_init(cpu_pmu, "armv8_brcm_vulcan", armv8_vulcan_map_event);
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}
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PMUV3_INIT_MAP_EVENT(armv8_cortex_a35, armv8_a53_map_event)
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PMUV3_INIT_MAP_EVENT(armv8_cortex_a53, armv8_a53_map_event)
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PMUV3_INIT_MAP_EVENT(armv8_cortex_a57, armv8_a57_map_event)
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PMUV3_INIT_MAP_EVENT(armv8_cortex_a72, armv8_a57_map_event)
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PMUV3_INIT_MAP_EVENT(armv8_cortex_a73, armv8_a73_map_event)
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PMUV3_INIT_MAP_EVENT(armv8_cavium_thunder, armv8_thunder_map_event)
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PMUV3_INIT_MAP_EVENT(armv8_brcm_vulcan, armv8_vulcan_map_event)
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static const struct of_device_id armv8_pmu_of_device_ids[] = {
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{.compatible = "arm,armv8-pmuv3", .data = armv8_pmuv3_pmu_init},
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{.compatible = "arm,cortex-a34-pmu", .data = armv8_cortex_a34_pmu_init},
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{.compatible = "arm,cortex-a35-pmu", .data = armv8_a35_pmu_init},
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{.compatible = "arm,cortex-a53-pmu", .data = armv8_a53_pmu_init},
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{.compatible = "arm,cortex-a35-pmu", .data = armv8_cortex_a35_pmu_init},
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{.compatible = "arm,cortex-a53-pmu", .data = armv8_cortex_a53_pmu_init},
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{.compatible = "arm,cortex-a55-pmu", .data = armv8_cortex_a55_pmu_init},
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{.compatible = "arm,cortex-a57-pmu", .data = armv8_a57_pmu_init},
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{.compatible = "arm,cortex-a57-pmu", .data = armv8_cortex_a57_pmu_init},
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{.compatible = "arm,cortex-a65-pmu", .data = armv8_cortex_a65_pmu_init},
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{.compatible = "arm,cortex-a72-pmu", .data = armv8_a72_pmu_init},
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{.compatible = "arm,cortex-a73-pmu", .data = armv8_a73_pmu_init},
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{.compatible = "arm,cortex-a72-pmu", .data = armv8_cortex_a72_pmu_init},
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{.compatible = "arm,cortex-a73-pmu", .data = armv8_cortex_a73_pmu_init},
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{.compatible = "arm,cortex-a75-pmu", .data = armv8_cortex_a75_pmu_init},
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{.compatible = "arm,cortex-a76-pmu", .data = armv8_cortex_a76_pmu_init},
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{.compatible = "arm,cortex-a77-pmu", .data = armv8_cortex_a77_pmu_init},
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@ -1309,8 +1288,8 @@ static const struct of_device_id armv8_pmu_of_device_ids[] = {
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{.compatible = "arm,neoverse-n1-pmu", .data = armv8_neoverse_n1_pmu_init},
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{.compatible = "arm,neoverse-n2-pmu", .data = armv9_neoverse_n2_pmu_init},
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{.compatible = "arm,neoverse-v1-pmu", .data = armv8_neoverse_v1_pmu_init},
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{.compatible = "cavium,thunder-pmu", .data = armv8_thunder_pmu_init},
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{.compatible = "brcm,vulcan-pmu", .data = armv8_vulcan_pmu_init},
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{.compatible = "cavium,thunder-pmu", .data = armv8_cavium_thunder_pmu_init},
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{.compatible = "brcm,vulcan-pmu", .data = armv8_brcm_vulcan_pmu_init},
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{.compatible = "nvidia,carmel-pmu", .data = armv8_nvidia_carmel_pmu_init},
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{.compatible = "nvidia,denver-pmu", .data = armv8_nvidia_denver_pmu_init},
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{},
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