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tools/memory-model: Distinguish between syntactic and semantic tags
Not all annotated accesses provide the semantics their syntactic tags would imply. For example, an 'acquire tag on a write does not imply that the write is finally in the Acquire set and provides acquire ordering. To distinguish in those cases between the syntactic tags and actual sets, we capitalize the former, so 'ACQUIRE tags may be present on both reads and writes, but only reads will appear in the Acquire set. For tags where the two concepts are the same we do not use specific capitalization to make this distinction. Reported-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Jonas Oberhauser <jonas.oberhauser@huaweicloud.com> Reviewed-by: Boqun Feng <boqun.feng@gmail.com> Tested-by: Boqun Feng <boqun.feng@gmail.com> Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
This commit is contained in:
Jonas Oberhauser
Paul E. McKenney
parent
55ea0b074d
commit
9049cf9a20
@ -21,7 +21,7 @@
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# Note that the syntactic representation does not always match the sets and
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# relations in linux-kernel.cat, due to redefinitions in linux-kernel.bell and
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# lock.cat. For example, the po link between LKR and LKW is upgraded to an rmw
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# link, and W[acquire] are not included in the Acquire set.
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# link, and W[ACQUIRE] are not included in the Acquire set.
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#
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# Disclaimer. The table includes representations of "add" and "and" operations;
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# corresponding/identical representations of "sub", "inc", "dec" and "or", "xor",
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@ -32,16 +32,16 @@
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------------------------------------------------------------------------------
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| Non-RMW ops | |
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------------------------------------------------------------------------------
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| READ_ONCE | R[once] |
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| READ_ONCE | R[ONCE] |
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| atomic_read | |
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| WRITE_ONCE | W[once] |
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| WRITE_ONCE | W[ONCE] |
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| atomic_set | |
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| smp_load_acquire | R[acquire] |
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| smp_load_acquire | R[ACQUIRE] |
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| atomic_read_acquire | |
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| smp_store_release | W[release] |
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| smp_store_release | W[RELEASE] |
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| atomic_set_release | |
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| smp_store_mb | W[once] ->po F[mb] |
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| smp_mb | F[mb] |
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| smp_store_mb | W[ONCE] ->po F[MB] |
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| smp_mb | F[MB] |
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| smp_rmb | F[rmb] |
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| smp_wmb | F[wmb] |
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| smp_mb__before_atomic | F[before-atomic] |
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@ -54,8 +54,8 @@
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| rcu_read_lock | F[rcu-lock] |
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| rcu_read_unlock | F[rcu-unlock] |
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| synchronize_rcu | F[sync-rcu] |
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| rcu_dereference | R[once] |
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| rcu_assign_pointer | W[release] |
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| rcu_dereference | R[ONCE] |
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| rcu_assign_pointer | W[RELEASE] |
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| srcu_read_lock | R[srcu-lock] |
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| srcu_down_read | |
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| srcu_read_unlock | W[srcu-unlock] |
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@ -65,31 +65,31 @@
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------------------------------------------------------------------------------
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| RMW ops w/o return value | |
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------------------------------------------------------------------------------
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| atomic_add | R*[noreturn] ->rmw W*[noreturn] |
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| atomic_add | R*[NORETURN] ->rmw W*[NORETURN] |
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| atomic_and | |
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| spin_lock | LKR ->po LKW |
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------------------------------------------------------------------------------
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| RMW ops w/ return value | |
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------------------------------------------------------------------------------
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| atomic_add_return | R*[mb] ->rmw W*[mb] |
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| atomic_add_return | R*[MB] ->rmw W*[MB] |
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| atomic_fetch_add | |
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| atomic_fetch_and | |
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| atomic_xchg | |
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| xchg | |
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| atomic_add_negative | |
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| atomic_add_return_relaxed | R*[once] ->rmw W*[once] |
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| atomic_add_return_relaxed | R*[ONCE] ->rmw W*[ONCE] |
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| atomic_fetch_add_relaxed | |
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| atomic_fetch_and_relaxed | |
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| atomic_xchg_relaxed | |
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| xchg_relaxed | |
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| atomic_add_negative_relaxed | |
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| atomic_add_return_acquire | R*[acquire] ->rmw W*[acquire] |
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| atomic_add_return_acquire | R*[ACQUIRE] ->rmw W*[ACQUIRE] |
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| atomic_fetch_add_acquire | |
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| atomic_fetch_and_acquire | |
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| atomic_xchg_acquire | |
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| xchg_acquire | |
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| atomic_add_negative_acquire | |
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| atomic_add_return_release | R*[release] ->rmw W*[release] |
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| atomic_add_return_release | R*[RELEASE] ->rmw W*[RELEASE] |
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| atomic_fetch_add_release | |
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| atomic_fetch_and_release | |
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| atomic_xchg_release | |
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@ -98,16 +98,16 @@
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------------------------------------------------------------------------------
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| Conditional RMW ops | |
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------------------------------------------------------------------------------
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| atomic_cmpxchg | On success: R*[mb] ->rmw W*[mb] |
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| | On failure: R*[mb] |
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| atomic_cmpxchg | On success: R*[MB] ->rmw W*[MB] |
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| | On failure: R*[MB] |
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| cmpxchg | |
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| atomic_add_unless | |
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| atomic_cmpxchg_relaxed | On success: R*[once] ->rmw W*[once] |
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| | On failure: R*[once] |
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| atomic_cmpxchg_acquire | On success: R*[acquire] ->rmw W*[acquire] |
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| | On failure: R*[acquire] |
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| atomic_cmpxchg_release | On success: R*[release] ->rmw W*[release] |
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| | On failure: R*[release] |
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| atomic_cmpxchg_relaxed | On success: R*[ONCE] ->rmw W*[ONCE] |
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| | On failure: R*[ONCE] |
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| atomic_cmpxchg_acquire | On success: R*[ACQUIRE] ->rmw W*[ACQUIRE] |
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| | On failure: R*[ACQUIRE] |
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| atomic_cmpxchg_release | On success: R*[RELEASE] ->rmw W*[RELEASE] |
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| | On failure: R*[RELEASE] |
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| spin_trylock | On success: LKR ->po LKW |
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| | On failure: LF |
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------------------------------------------------------------------------------
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@ -13,18 +13,18 @@
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"Linux-kernel memory consistency model"
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enum Accesses = 'once (*READ_ONCE,WRITE_ONCE*) ||
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'release (*smp_store_release*) ||
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'acquire (*smp_load_acquire*) ||
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'noreturn (* R of non-return RMW *) ||
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'mb (*xchg(),cmpxchg(),...*)
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enum Accesses = 'ONCE (*READ_ONCE,WRITE_ONCE*) ||
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'RELEASE (*smp_store_release*) ||
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'ACQUIRE (*smp_load_acquire*) ||
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'NORETURN (* R of non-return RMW *) ||
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'MB (*xchg(),cmpxchg(),...*)
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instructions R[Accesses]
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instructions W[Accesses]
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instructions RMW[Accesses]
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enum Barriers = 'wmb (*smp_wmb*) ||
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'rmb (*smp_rmb*) ||
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'mb (*smp_mb*) ||
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'MB (*smp_mb*) ||
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'barrier (*barrier*) ||
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'rcu-lock (*rcu_read_lock*) ||
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'rcu-unlock (*rcu_read_unlock*) ||
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@ -42,10 +42,10 @@ instructions F[Barriers]
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* semantic ordering, such as Acquire on a store or Mb on a failed RMW.
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*)
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let FailedRMW = RMW \ (domain(rmw) | range(rmw))
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let Acquire = Acquire \ W \ FailedRMW
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let Release = Release \ R \ FailedRMW
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let Mb = Mb \ FailedRMW
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let Noreturn = Noreturn \ W
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let Acquire = ACQUIRE \ W \ FailedRMW
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let Release = RELEASE \ R \ FailedRMW
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let Mb = MB \ FailedRMW
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let Noreturn = NORETURN \ W
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(* SRCU *)
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enum SRCU = 'srcu-lock || 'srcu-unlock || 'sync-srcu
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@ -85,7 +85,7 @@ flag ~empty rcu-rscs & (po ; [Sync-srcu] ; po) as invalid-sleep
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flag ~empty different-values(srcu-rscs) as srcu-bad-value-match
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(* Compute marked and plain memory accesses *)
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let Marked = (~M) | IW | Once | Release | Acquire | domain(rmw) | range(rmw) |
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let Marked = (~M) | IW | ONCE | RELEASE | ACQUIRE | MB | RMW |
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LKR | LKW | UL | LF | RL | RU | Srcu-lock | Srcu-unlock
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let Plain = M \ Marked
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@ -6,18 +6,18 @@
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// which appeared in ASPLOS 2018.
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// ONCE
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READ_ONCE(X) __load{once}(X)
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WRITE_ONCE(X,V) { __store{once}(X,V); }
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READ_ONCE(X) __load{ONCE}(X)
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WRITE_ONCE(X,V) { __store{ONCE}(X,V); }
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// Release Acquire and friends
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smp_store_release(X,V) { __store{release}(*X,V); }
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smp_load_acquire(X) __load{acquire}(*X)
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rcu_assign_pointer(X,V) { __store{release}(X,V); }
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rcu_dereference(X) __load{once}(X)
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smp_store_mb(X,V) { __store{once}(X,V); __fence{mb}; }
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smp_store_release(X,V) { __store{RELEASE}(*X,V); }
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smp_load_acquire(X) __load{ACQUIRE}(*X)
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rcu_assign_pointer(X,V) { __store{RELEASE}(X,V); }
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rcu_dereference(X) __load{ONCE}(X)
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smp_store_mb(X,V) { __store{ONCE}(X,V); __fence{MB}; }
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// Fences
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smp_mb() { __fence{mb}; }
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smp_mb() { __fence{MB}; }
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smp_rmb() { __fence{rmb}; }
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smp_wmb() { __fence{wmb}; }
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smp_mb__before_atomic() { __fence{before-atomic}; }
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@ -28,14 +28,14 @@ smp_mb__after_srcu_read_unlock() { __fence{after-srcu-read-unlock}; }
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barrier() { __fence{barrier}; }
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// Exchange
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xchg(X,V) __xchg{mb}(X,V)
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xchg_relaxed(X,V) __xchg{once}(X,V)
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xchg_release(X,V) __xchg{release}(X,V)
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xchg_acquire(X,V) __xchg{acquire}(X,V)
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cmpxchg(X,V,W) __cmpxchg{mb}(X,V,W)
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cmpxchg_relaxed(X,V,W) __cmpxchg{once}(X,V,W)
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cmpxchg_acquire(X,V,W) __cmpxchg{acquire}(X,V,W)
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cmpxchg_release(X,V,W) __cmpxchg{release}(X,V,W)
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xchg(X,V) __xchg{MB}(X,V)
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xchg_relaxed(X,V) __xchg{ONCE}(X,V)
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xchg_release(X,V) __xchg{RELEASE}(X,V)
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xchg_acquire(X,V) __xchg{ACQUIRE}(X,V)
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cmpxchg(X,V,W) __cmpxchg{MB}(X,V,W)
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cmpxchg_relaxed(X,V,W) __cmpxchg{ONCE}(X,V,W)
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cmpxchg_acquire(X,V,W) __cmpxchg{ACQUIRE}(X,V,W)
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cmpxchg_release(X,V,W) __cmpxchg{RELEASE}(X,V,W)
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// Spinlocks
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spin_lock(X) { __lock(X); }
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@ -63,86 +63,86 @@ atomic_set(X,V) { WRITE_ONCE(*X,V); }
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atomic_read_acquire(X) smp_load_acquire(X)
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atomic_set_release(X,V) { smp_store_release(X,V); }
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atomic_add(V,X) { __atomic_op{noreturn}(X,+,V); }
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atomic_sub(V,X) { __atomic_op{noreturn}(X,-,V); }
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atomic_and(V,X) { __atomic_op{noreturn}(X,&,V); }
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atomic_or(V,X) { __atomic_op{noreturn}(X,|,V); }
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atomic_xor(V,X) { __atomic_op{noreturn}(X,^,V); }
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atomic_inc(X) { __atomic_op{noreturn}(X,+,1); }
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atomic_dec(X) { __atomic_op{noreturn}(X,-,1); }
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atomic_andnot(V,X) { __atomic_op{noreturn}(X,&~,V); }
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atomic_add(V,X) { __atomic_op{NORETURN}(X,+,V); }
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atomic_sub(V,X) { __atomic_op{NORETURN}(X,-,V); }
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atomic_and(V,X) { __atomic_op{NORETURN}(X,&,V); }
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atomic_or(V,X) { __atomic_op{NORETURN}(X,|,V); }
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atomic_xor(V,X) { __atomic_op{NORETURN}(X,^,V); }
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atomic_inc(X) { __atomic_op{NORETURN}(X,+,1); }
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atomic_dec(X) { __atomic_op{NORETURN}(X,-,1); }
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atomic_andnot(V,X) { __atomic_op{NORETURN}(X,&~,V); }
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atomic_add_return(V,X) __atomic_op_return{mb}(X,+,V)
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atomic_add_return_relaxed(V,X) __atomic_op_return{once}(X,+,V)
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atomic_add_return_acquire(V,X) __atomic_op_return{acquire}(X,+,V)
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atomic_add_return_release(V,X) __atomic_op_return{release}(X,+,V)
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atomic_fetch_add(V,X) __atomic_fetch_op{mb}(X,+,V)
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atomic_fetch_add_relaxed(V,X) __atomic_fetch_op{once}(X,+,V)
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atomic_fetch_add_acquire(V,X) __atomic_fetch_op{acquire}(X,+,V)
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atomic_fetch_add_release(V,X) __atomic_fetch_op{release}(X,+,V)
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atomic_add_return(V,X) __atomic_op_return{MB}(X,+,V)
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atomic_add_return_relaxed(V,X) __atomic_op_return{ONCE}(X,+,V)
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atomic_add_return_acquire(V,X) __atomic_op_return{ACQUIRE}(X,+,V)
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atomic_add_return_release(V,X) __atomic_op_return{RELEASE}(X,+,V)
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atomic_fetch_add(V,X) __atomic_fetch_op{MB}(X,+,V)
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atomic_fetch_add_relaxed(V,X) __atomic_fetch_op{ONCE}(X,+,V)
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atomic_fetch_add_acquire(V,X) __atomic_fetch_op{ACQUIRE}(X,+,V)
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atomic_fetch_add_release(V,X) __atomic_fetch_op{RELEASE}(X,+,V)
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atomic_fetch_and(V,X) __atomic_fetch_op{mb}(X,&,V)
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atomic_fetch_and_relaxed(V,X) __atomic_fetch_op{once}(X,&,V)
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atomic_fetch_and_acquire(V,X) __atomic_fetch_op{acquire}(X,&,V)
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atomic_fetch_and_release(V,X) __atomic_fetch_op{release}(X,&,V)
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atomic_fetch_and(V,X) __atomic_fetch_op{MB}(X,&,V)
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atomic_fetch_and_relaxed(V,X) __atomic_fetch_op{ONCE}(X,&,V)
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atomic_fetch_and_acquire(V,X) __atomic_fetch_op{ACQUIRE}(X,&,V)
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atomic_fetch_and_release(V,X) __atomic_fetch_op{RELEASE}(X,&,V)
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atomic_fetch_or(V,X) __atomic_fetch_op{mb}(X,|,V)
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atomic_fetch_or_relaxed(V,X) __atomic_fetch_op{once}(X,|,V)
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atomic_fetch_or_acquire(V,X) __atomic_fetch_op{acquire}(X,|,V)
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atomic_fetch_or_release(V,X) __atomic_fetch_op{release}(X,|,V)
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atomic_fetch_or(V,X) __atomic_fetch_op{MB}(X,|,V)
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atomic_fetch_or_relaxed(V,X) __atomic_fetch_op{ONCE}(X,|,V)
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atomic_fetch_or_acquire(V,X) __atomic_fetch_op{ACQUIRE}(X,|,V)
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atomic_fetch_or_release(V,X) __atomic_fetch_op{RELEASE}(X,|,V)
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atomic_fetch_xor(V,X) __atomic_fetch_op{mb}(X,^,V)
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atomic_fetch_xor_relaxed(V,X) __atomic_fetch_op{once}(X,^,V)
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atomic_fetch_xor_acquire(V,X) __atomic_fetch_op{acquire}(X,^,V)
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atomic_fetch_xor_release(V,X) __atomic_fetch_op{release}(X,^,V)
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atomic_fetch_xor(V,X) __atomic_fetch_op{MB}(X,^,V)
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atomic_fetch_xor_relaxed(V,X) __atomic_fetch_op{ONCE}(X,^,V)
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atomic_fetch_xor_acquire(V,X) __atomic_fetch_op{ACQUIRE}(X,^,V)
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atomic_fetch_xor_release(V,X) __atomic_fetch_op{RELEASE}(X,^,V)
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atomic_inc_return(X) __atomic_op_return{mb}(X,+,1)
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atomic_inc_return_relaxed(X) __atomic_op_return{once}(X,+,1)
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atomic_inc_return_acquire(X) __atomic_op_return{acquire}(X,+,1)
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atomic_inc_return_release(X) __atomic_op_return{release}(X,+,1)
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atomic_fetch_inc(X) __atomic_fetch_op{mb}(X,+,1)
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atomic_fetch_inc_relaxed(X) __atomic_fetch_op{once}(X,+,1)
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atomic_fetch_inc_acquire(X) __atomic_fetch_op{acquire}(X,+,1)
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atomic_fetch_inc_release(X) __atomic_fetch_op{release}(X,+,1)
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atomic_inc_return(X) __atomic_op_return{MB}(X,+,1)
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atomic_inc_return_relaxed(X) __atomic_op_return{ONCE}(X,+,1)
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atomic_inc_return_acquire(X) __atomic_op_return{ACQUIRE}(X,+,1)
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atomic_inc_return_release(X) __atomic_op_return{RELEASE}(X,+,1)
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atomic_fetch_inc(X) __atomic_fetch_op{MB}(X,+,1)
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atomic_fetch_inc_relaxed(X) __atomic_fetch_op{ONCE}(X,+,1)
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atomic_fetch_inc_acquire(X) __atomic_fetch_op{ACQUIRE}(X,+,1)
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atomic_fetch_inc_release(X) __atomic_fetch_op{RELEASE}(X,+,1)
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atomic_sub_return(V,X) __atomic_op_return{mb}(X,-,V)
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atomic_sub_return_relaxed(V,X) __atomic_op_return{once}(X,-,V)
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atomic_sub_return_acquire(V,X) __atomic_op_return{acquire}(X,-,V)
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atomic_sub_return_release(V,X) __atomic_op_return{release}(X,-,V)
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atomic_fetch_sub(V,X) __atomic_fetch_op{mb}(X,-,V)
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atomic_fetch_sub_relaxed(V,X) __atomic_fetch_op{once}(X,-,V)
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atomic_fetch_sub_acquire(V,X) __atomic_fetch_op{acquire}(X,-,V)
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atomic_fetch_sub_release(V,X) __atomic_fetch_op{release}(X,-,V)
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atomic_sub_return(V,X) __atomic_op_return{MB}(X,-,V)
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atomic_sub_return_relaxed(V,X) __atomic_op_return{ONCE}(X,-,V)
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atomic_sub_return_acquire(V,X) __atomic_op_return{ACQUIRE}(X,-,V)
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atomic_sub_return_release(V,X) __atomic_op_return{RELEASE}(X,-,V)
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atomic_fetch_sub(V,X) __atomic_fetch_op{MB}(X,-,V)
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atomic_fetch_sub_relaxed(V,X) __atomic_fetch_op{ONCE}(X,-,V)
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atomic_fetch_sub_acquire(V,X) __atomic_fetch_op{ACQUIRE}(X,-,V)
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atomic_fetch_sub_release(V,X) __atomic_fetch_op{RELEASE}(X,-,V)
|
||||
|
||||
atomic_dec_return(X) __atomic_op_return{mb}(X,-,1)
|
||||
atomic_dec_return_relaxed(X) __atomic_op_return{once}(X,-,1)
|
||||
atomic_dec_return_acquire(X) __atomic_op_return{acquire}(X,-,1)
|
||||
atomic_dec_return_release(X) __atomic_op_return{release}(X,-,1)
|
||||
atomic_fetch_dec(X) __atomic_fetch_op{mb}(X,-,1)
|
||||
atomic_fetch_dec_relaxed(X) __atomic_fetch_op{once}(X,-,1)
|
||||
atomic_fetch_dec_acquire(X) __atomic_fetch_op{acquire}(X,-,1)
|
||||
atomic_fetch_dec_release(X) __atomic_fetch_op{release}(X,-,1)
|
||||
atomic_dec_return(X) __atomic_op_return{MB}(X,-,1)
|
||||
atomic_dec_return_relaxed(X) __atomic_op_return{ONCE}(X,-,1)
|
||||
atomic_dec_return_acquire(X) __atomic_op_return{ACQUIRE}(X,-,1)
|
||||
atomic_dec_return_release(X) __atomic_op_return{RELEASE}(X,-,1)
|
||||
atomic_fetch_dec(X) __atomic_fetch_op{MB}(X,-,1)
|
||||
atomic_fetch_dec_relaxed(X) __atomic_fetch_op{ONCE}(X,-,1)
|
||||
atomic_fetch_dec_acquire(X) __atomic_fetch_op{ACQUIRE}(X,-,1)
|
||||
atomic_fetch_dec_release(X) __atomic_fetch_op{RELEASE}(X,-,1)
|
||||
|
||||
atomic_xchg(X,V) __xchg{mb}(X,V)
|
||||
atomic_xchg_relaxed(X,V) __xchg{once}(X,V)
|
||||
atomic_xchg_release(X,V) __xchg{release}(X,V)
|
||||
atomic_xchg_acquire(X,V) __xchg{acquire}(X,V)
|
||||
atomic_cmpxchg(X,V,W) __cmpxchg{mb}(X,V,W)
|
||||
atomic_cmpxchg_relaxed(X,V,W) __cmpxchg{once}(X,V,W)
|
||||
atomic_cmpxchg_acquire(X,V,W) __cmpxchg{acquire}(X,V,W)
|
||||
atomic_cmpxchg_release(X,V,W) __cmpxchg{release}(X,V,W)
|
||||
atomic_xchg(X,V) __xchg{MB}(X,V)
|
||||
atomic_xchg_relaxed(X,V) __xchg{ONCE}(X,V)
|
||||
atomic_xchg_release(X,V) __xchg{RELEASE}(X,V)
|
||||
atomic_xchg_acquire(X,V) __xchg{ACQUIRE}(X,V)
|
||||
atomic_cmpxchg(X,V,W) __cmpxchg{MB}(X,V,W)
|
||||
atomic_cmpxchg_relaxed(X,V,W) __cmpxchg{ONCE}(X,V,W)
|
||||
atomic_cmpxchg_acquire(X,V,W) __cmpxchg{ACQUIRE}(X,V,W)
|
||||
atomic_cmpxchg_release(X,V,W) __cmpxchg{RELEASE}(X,V,W)
|
||||
|
||||
atomic_sub_and_test(V,X) __atomic_op_return{mb}(X,-,V) == 0
|
||||
atomic_dec_and_test(X) __atomic_op_return{mb}(X,-,1) == 0
|
||||
atomic_inc_and_test(X) __atomic_op_return{mb}(X,+,1) == 0
|
||||
atomic_add_negative(V,X) __atomic_op_return{mb}(X,+,V) < 0
|
||||
atomic_add_negative_relaxed(V,X) __atomic_op_return{once}(X,+,V) < 0
|
||||
atomic_add_negative_acquire(V,X) __atomic_op_return{acquire}(X,+,V) < 0
|
||||
atomic_add_negative_release(V,X) __atomic_op_return{release}(X,+,V) < 0
|
||||
atomic_sub_and_test(V,X) __atomic_op_return{MB}(X,-,V) == 0
|
||||
atomic_dec_and_test(X) __atomic_op_return{MB}(X,-,1) == 0
|
||||
atomic_inc_and_test(X) __atomic_op_return{MB}(X,+,1) == 0
|
||||
atomic_add_negative(V,X) __atomic_op_return{MB}(X,+,V) < 0
|
||||
atomic_add_negative_relaxed(V,X) __atomic_op_return{ONCE}(X,+,V) < 0
|
||||
atomic_add_negative_acquire(V,X) __atomic_op_return{ACQUIRE}(X,+,V) < 0
|
||||
atomic_add_negative_release(V,X) __atomic_op_return{RELEASE}(X,+,V) < 0
|
||||
|
||||
atomic_fetch_andnot(V,X) __atomic_fetch_op{mb}(X,&~,V)
|
||||
atomic_fetch_andnot_acquire(V,X) __atomic_fetch_op{acquire}(X,&~,V)
|
||||
atomic_fetch_andnot_release(V,X) __atomic_fetch_op{release}(X,&~,V)
|
||||
atomic_fetch_andnot_relaxed(V,X) __atomic_fetch_op{once}(X,&~,V)
|
||||
atomic_fetch_andnot(V,X) __atomic_fetch_op{MB}(X,&~,V)
|
||||
atomic_fetch_andnot_acquire(V,X) __atomic_fetch_op{ACQUIRE}(X,&~,V)
|
||||
atomic_fetch_andnot_release(V,X) __atomic_fetch_op{RELEASE}(X,&~,V)
|
||||
atomic_fetch_andnot_relaxed(V,X) __atomic_fetch_op{ONCE}(X,&~,V)
|
||||
|
||||
atomic_add_unless(X,V,W) __atomic_add_unless{mb}(X,V,W)
|
||||
atomic_add_unless(X,V,W) __atomic_add_unless{MB}(X,V,W)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user