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kbuild: do not add $(srctree) or $(objtree) to header search paths
scripts/Makefile.lib is included not only from scripts/Makefile.build but also from scripts/Makefile.{vmlinux,modfinal} for building generated C files. In scripts/Makefile.{vmlinux,modfinal}, $(obj) and $(src) are empty. Therefore, the header include paths: -I $(srctree)/$(src) -I $(objtree)/$(obj) ... become meaningless code: -I $(srctree)/ -I $(objtree)/ Add these paths only when 'obj' and 'src' are defined. Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/oe-kbuild-all/202404170634.BlqTaYA0-lkp@intel.com/ Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Nicolas Schier <n.schier@avm.de>
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@ -213,9 +213,9 @@ endif
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# $(objtree)/$(obj) for including generated headers from checkin source files
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ifeq ($(KBUILD_EXTMOD),)
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ifdef building_out_of_srctree
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_c_flags += -I $(srctree)/$(src) -I $(objtree)/$(obj)
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_a_flags += -I $(srctree)/$(src) -I $(objtree)/$(obj)
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_cpp_flags += -I $(srctree)/$(src) -I $(objtree)/$(obj)
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_c_flags += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj))
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_a_flags += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj))
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_cpp_flags += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj))
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endif
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endif
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