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usb: cdns3: Fix issue for clear halt endpoint
Path fixes bug which occurs during resetting endpoint in __cdns3_gadget_ep_clear_halt function. During resetting endpoint controller will change HW/DMA owned TRB. It set Abort flag in trb->control and will change trb->length field. If driver want to use the aborted trb it must update the changed field in TRB. Fixes: 7733f6c32e36 ("usb: cdns3: Add Cadence USB3 DRD Driver") cc: <stable@vger.kernel.org> Acked-by: Peter Chen <peter.chen@kernel.org> Signed-off-by: Pawel Laszczak <pawell@cadence.com> Link: https://lore.kernel.org/r/20220329084605.4022-1-pawell@cadence.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -2684,6 +2684,7 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
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struct usb_request *request;
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struct usb_request *request;
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struct cdns3_request *priv_req;
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struct cdns3_request *priv_req;
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struct cdns3_trb *trb = NULL;
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struct cdns3_trb *trb = NULL;
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struct cdns3_trb trb_tmp;
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int ret;
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int ret;
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int val;
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int val;
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@ -2693,8 +2694,10 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
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if (request) {
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if (request) {
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priv_req = to_cdns3_request(request);
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priv_req = to_cdns3_request(request);
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trb = priv_req->trb;
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trb = priv_req->trb;
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if (trb)
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if (trb) {
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trb_tmp = *trb;
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trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
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trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
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}
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}
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}
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writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
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writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
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@ -2709,7 +2712,7 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
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if (request) {
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if (request) {
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if (trb)
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if (trb)
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trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
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*trb = trb_tmp;
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cdns3_rearm_transfer(priv_ep, 1);
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cdns3_rearm_transfer(priv_ep, 1);
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}
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}
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