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perf/x86/rapl: Add core energy counter support for AMD CPUs
Add a new "power_core" PMU and "energy-core" event for monitoring energy consumption by each individual core. The existing energy-cores event aggregates the energy consumption of CPU cores at the package level. This new event aligns with the AMD's per-core energy counters. Tested the package level and core level PMU counters with workloads pinned to different CPUs. Results with workload pinned to CPU 4 in core 4 on an AMD Zen4 Genoa machine: $ sudo perf stat --per-core -e power_core/energy-core/ -- taskset -c 4 stress-ng --matrix 1 --timeout 5s stress-ng: info: [21250] setting to a 5 second run per stressor stress-ng: info: [21250] dispatching hogs: 1 matrix stress-ng: info: [21250] successful run completed in 5.00s Performance counter stats for 'system wide': S0-D0-C0 1 0.00 Joules power_core/energy-core/ S0-D0-C1 1 0.00 Joules power_core/energy-core/ S0-D0-C2 1 0.00 Joules power_core/energy-core/ S0-D0-C3 1 0.00 Joules power_core/energy-core/ S0-D0-C4 1 8.43 Joules power_core/energy-core/ S0-D0-C5 1 0.00 Joules power_core/energy-core/ S0-D0-C6 1 0.00 Joules power_core/energy-core/ S0-D0-C7 1 0.00 Joules power_core/energy-core/ S0-D1-C8 1 0.00 Joules power_core/energy-core/ S0-D1-C9 1 0.00 Joules power_core/energy-core/ S0-D1-C10 1 0.00 Joules power_core/energy-core/ Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: "Gautham R. Shenoy" <gautham.shenoy@amd.com> Link: https://lore.kernel.org/r/20241115060805.447565-11-Dhananjay.Ugwekar@amd.com
This commit is contained in:
Dhananjay Ugwekar
Peter Zijlstra
parent
54d2759778
commit
b4943b8bfc
@ -39,6 +39,10 @@
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* event: rapl_energy_psys
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* perf code: 0x5
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*
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* core counter: consumption of a single physical core
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* event: rapl_energy_core (power_core PMU)
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* perf code: 0x1
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*
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* We manage those counters as free running (read-only). They may be
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* use simultaneously by other tools, such as turbostat.
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*
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@ -81,6 +85,10 @@ enum perf_rapl_pkg_events {
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NR_RAPL_PKG_DOMAINS = PERF_RAPL_PKG_EVENTS_MAX,
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};
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#define PERF_RAPL_CORE 0 /* single core */
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#define PERF_RAPL_CORE_EVENTS_MAX 1
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#define NR_RAPL_CORE_DOMAINS PERF_RAPL_CORE_EVENTS_MAX
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static const char *const rapl_pkg_domain_names[NR_RAPL_PKG_DOMAINS] __initconst = {
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"pp0-core",
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"package",
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@ -89,6 +97,8 @@ static const char *const rapl_pkg_domain_names[NR_RAPL_PKG_DOMAINS] __initconst
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"psys",
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};
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static const char *const rapl_core_domain_name __initconst = "core";
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/*
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* event code: LSB 8 bits, passed in attr->config
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* any other bit is reserved
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@ -141,14 +151,18 @@ enum rapl_unit_quirk {
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struct rapl_model {
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struct perf_msr *rapl_pkg_msrs;
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struct perf_msr *rapl_core_msrs;
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unsigned long pkg_events;
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unsigned long core_events;
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unsigned int msr_power_unit;
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enum rapl_unit_quirk unit_quirk;
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};
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/* 1/2^hw_unit Joule */
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static int rapl_pkg_hw_unit[NR_RAPL_PKG_DOMAINS] __read_mostly;
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static int rapl_core_hw_unit __read_mostly;
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static struct rapl_pmus *rapl_pmus_pkg;
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static struct rapl_pmus *rapl_pmus_core;
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static u64 rapl_timer_ms;
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static struct rapl_model *rapl_model;
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@ -156,15 +170,23 @@ static struct rapl_model *rapl_model;
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* Helper function to get the correct topology id according to the
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* RAPL PMU scope.
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*/
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static inline unsigned int get_rapl_pmu_idx(int cpu)
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static inline unsigned int get_rapl_pmu_idx(int cpu, int scope)
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{
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/*
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* Returns unsigned int, which converts the '-1' return value
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* (for non-existent mappings in topology map) to UINT_MAX, so
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* the error check in the caller is simplified.
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*/
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return rapl_pkg_pmu_is_pkg_scope() ? topology_logical_package_id(cpu) :
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topology_logical_die_id(cpu);
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switch (scope) {
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case PERF_PMU_SCOPE_PKG:
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return topology_logical_package_id(cpu);
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case PERF_PMU_SCOPE_DIE:
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return topology_logical_die_id(cpu);
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case PERF_PMU_SCOPE_CORE:
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return topology_logical_core_id(cpu);
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default:
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return -EINVAL;
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}
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}
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static inline u64 rapl_read_counter(struct perf_event *event)
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@ -174,19 +196,20 @@ static inline u64 rapl_read_counter(struct perf_event *event)
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return raw;
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}
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static inline u64 rapl_scale(u64 v, int cfg)
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static inline u64 rapl_scale(u64 v, struct perf_event *event)
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{
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if (cfg > NR_RAPL_PKG_DOMAINS) {
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pr_warn("Invalid domain %d, failed to scale data\n", cfg);
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return v;
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}
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int hw_unit = rapl_pkg_hw_unit[event->hw.config - 1];
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if (event->pmu->scope == PERF_PMU_SCOPE_CORE)
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hw_unit = rapl_core_hw_unit;
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/*
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* scale delta to smallest unit (1/2^32)
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* users must then scale back: count * 1/(1e9*2^32) to get Joules
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* or use ldexp(count, -32).
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* Watts = Joules/Time delta
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*/
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return v << (32 - rapl_pkg_hw_unit[cfg - 1]);
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return v << (32 - hw_unit);
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}
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static u64 rapl_event_update(struct perf_event *event)
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@ -213,7 +236,7 @@ static u64 rapl_event_update(struct perf_event *event)
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delta = (new_raw_count << shift) - (prev_raw_count << shift);
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delta >>= shift;
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sdelta = rapl_scale(delta, event->hw.config);
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sdelta = rapl_scale(delta, event);
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local64_add(sdelta, &event->count);
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@ -342,13 +365,14 @@ static void rapl_pmu_event_del(struct perf_event *event, int flags)
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static int rapl_pmu_event_init(struct perf_event *event)
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{
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u64 cfg = event->attr.config & RAPL_EVENT_MASK;
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int bit, ret = 0;
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int bit, rapl_pmus_scope, ret = 0;
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struct rapl_pmu *rapl_pmu;
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unsigned int rapl_pmu_idx;
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struct rapl_pmus *rapl_pmus;
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/* only look at RAPL events */
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if (event->attr.type != rapl_pmus_pkg->pmu.type)
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return -ENOENT;
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/* unsupported modes and filters */
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if (event->attr.sample_period) /* no sampling */
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return -EINVAL;
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/* check only supported bits are set */
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if (event->attr.config & ~RAPL_EVENT_MASK)
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@ -357,31 +381,49 @@ static int rapl_pmu_event_init(struct perf_event *event)
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if (event->cpu < 0)
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return -EINVAL;
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if (!cfg || cfg >= NR_RAPL_PKG_DOMAINS + 1)
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rapl_pmus = container_of(event->pmu, struct rapl_pmus, pmu);
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if (!rapl_pmus)
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return -EINVAL;
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rapl_pmus_scope = rapl_pmus->pmu.scope;
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cfg = array_index_nospec((long)cfg, NR_RAPL_PKG_DOMAINS + 1);
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bit = cfg - 1;
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if (rapl_pmus_scope == PERF_PMU_SCOPE_PKG || rapl_pmus_scope == PERF_PMU_SCOPE_DIE) {
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/* only look at RAPL package events */
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if (event->attr.type != rapl_pmus_pkg->pmu.type)
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return -ENOENT;
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cfg = array_index_nospec((long)cfg, NR_RAPL_PKG_DOMAINS + 1);
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if (!cfg || cfg >= NR_RAPL_PKG_DOMAINS + 1)
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return -EINVAL;
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bit = cfg - 1;
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event->hw.event_base = rapl_model->rapl_pkg_msrs[bit].msr;
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} else if (rapl_pmus_scope == PERF_PMU_SCOPE_CORE) {
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/* only look at RAPL core events */
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if (event->attr.type != rapl_pmus_core->pmu.type)
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return -ENOENT;
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cfg = array_index_nospec((long)cfg, NR_RAPL_CORE_DOMAINS + 1);
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if (!cfg || cfg >= NR_RAPL_PKG_DOMAINS + 1)
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return -EINVAL;
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bit = cfg - 1;
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event->hw.event_base = rapl_model->rapl_core_msrs[bit].msr;
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} else
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return -EINVAL;
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/* check event supported */
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if (!(rapl_pmus_pkg->cntr_mask & (1 << bit)))
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if (!(rapl_pmus->cntr_mask & (1 << bit)))
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return -EINVAL;
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/* unsupported modes and filters */
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if (event->attr.sample_period) /* no sampling */
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rapl_pmu_idx = get_rapl_pmu_idx(event->cpu, rapl_pmus_scope);
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if (rapl_pmu_idx >= rapl_pmus->nr_rapl_pmu)
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return -EINVAL;
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rapl_pmu_idx = get_rapl_pmu_idx(event->cpu);
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if (rapl_pmu_idx >= rapl_pmus_pkg->nr_rapl_pmu)
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return -EINVAL;
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/* must be done before validate_group */
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rapl_pmu = rapl_pmus_pkg->rapl_pmu[rapl_pmu_idx];
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rapl_pmu = rapl_pmus->rapl_pmu[rapl_pmu_idx];
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if (!rapl_pmu)
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return -EINVAL;
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event->pmu_private = rapl_pmu;
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event->hw.event_base = rapl_model->rapl_pkg_msrs[bit].msr;
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event->hw.config = cfg;
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event->hw.idx = bit;
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@ -398,12 +440,14 @@ RAPL_EVENT_ATTR_STR(energy-pkg , rapl_pkg, "event=0x02");
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RAPL_EVENT_ATTR_STR(energy-ram , rapl_ram, "event=0x03");
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RAPL_EVENT_ATTR_STR(energy-gpu , rapl_gpu, "event=0x04");
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RAPL_EVENT_ATTR_STR(energy-psys, rapl_psys, "event=0x05");
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RAPL_EVENT_ATTR_STR(energy-core, rapl_core, "event=0x01");
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RAPL_EVENT_ATTR_STR(energy-cores.unit, rapl_cores_unit, "Joules");
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RAPL_EVENT_ATTR_STR(energy-pkg.unit , rapl_pkg_unit, "Joules");
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RAPL_EVENT_ATTR_STR(energy-ram.unit , rapl_ram_unit, "Joules");
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RAPL_EVENT_ATTR_STR(energy-gpu.unit , rapl_gpu_unit, "Joules");
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RAPL_EVENT_ATTR_STR(energy-psys.unit, rapl_psys_unit, "Joules");
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RAPL_EVENT_ATTR_STR(energy-core.unit, rapl_core_unit, "Joules");
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/*
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* we compute in 0.23 nJ increments regardless of MSR
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@ -413,6 +457,7 @@ RAPL_EVENT_ATTR_STR(energy-pkg.scale, rapl_pkg_scale, "2.3283064365386962890
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RAPL_EVENT_ATTR_STR(energy-ram.scale, rapl_ram_scale, "2.3283064365386962890625e-10");
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RAPL_EVENT_ATTR_STR(energy-gpu.scale, rapl_gpu_scale, "2.3283064365386962890625e-10");
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RAPL_EVENT_ATTR_STR(energy-psys.scale, rapl_psys_scale, "2.3283064365386962890625e-10");
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RAPL_EVENT_ATTR_STR(energy-core.scale, rapl_core_scale, "2.3283064365386962890625e-10");
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/*
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* There are no default events, but we need to create
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@ -445,6 +490,12 @@ static const struct attribute_group *rapl_attr_groups[] = {
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NULL,
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};
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static const struct attribute_group *rapl_core_attr_groups[] = {
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&rapl_pmu_format_group,
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&rapl_pmu_events_group,
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NULL,
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};
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static struct attribute *rapl_events_cores[] = {
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EVENT_PTR(rapl_cores),
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EVENT_PTR(rapl_cores_unit),
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@ -505,6 +556,18 @@ static struct attribute_group rapl_events_psys_group = {
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.attrs = rapl_events_psys,
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};
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static struct attribute *rapl_events_core[] = {
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EVENT_PTR(rapl_core),
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EVENT_PTR(rapl_core_unit),
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EVENT_PTR(rapl_core_scale),
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NULL,
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};
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static struct attribute_group rapl_events_core_group = {
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.name = "events",
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.attrs = rapl_events_core,
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};
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static bool test_msr(int idx, void *data)
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{
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return test_bit(idx, (unsigned long *) data);
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@ -542,6 +605,11 @@ static struct perf_msr amd_rapl_pkg_msrs[] = {
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[PERF_RAPL_PSYS] = { 0, &rapl_events_psys_group, NULL, false, 0 },
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};
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static struct perf_msr amd_rapl_core_msrs[] = {
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[PERF_RAPL_CORE] = { MSR_AMD_CORE_ENERGY_STATUS, &rapl_events_core_group,
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test_msr, false, RAPL_MSR_MASK },
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};
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static int rapl_check_hw_unit(void)
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{
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u64 msr_rapl_power_unit_bits;
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@ -553,6 +621,8 @@ static int rapl_check_hw_unit(void)
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for (i = 0; i < NR_RAPL_PKG_DOMAINS; i++)
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rapl_pkg_hw_unit[i] = (msr_rapl_power_unit_bits >> 8) & 0x1FULL;
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rapl_core_hw_unit = (msr_rapl_power_unit_bits >> 8) & 0x1FULL;
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switch (rapl_model->unit_quirk) {
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/*
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* DRAM domain on HSW server and KNL has fixed energy unit which can be
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@ -571,7 +641,6 @@ static int rapl_check_hw_unit(void)
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break;
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}
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/*
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* Calculate the timer rate:
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* Use reference of 200W for scaling the timeout to avoid counter
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@ -590,9 +659,13 @@ static int rapl_check_hw_unit(void)
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static void __init rapl_advertise(void)
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{
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int i;
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int num_counters = hweight32(rapl_pmus_pkg->cntr_mask);
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if (rapl_pmus_core)
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num_counters += hweight32(rapl_pmus_core->cntr_mask);
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pr_info("API unit is 2^-32 Joules, %d fixed counters, %llu ms ovfl timer\n",
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hweight32(rapl_pmus_pkg->cntr_mask), rapl_timer_ms);
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num_counters, rapl_timer_ms);
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for (i = 0; i < NR_RAPL_PKG_DOMAINS; i++) {
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if (rapl_pmus_pkg->cntr_mask & (1 << i)) {
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@ -600,6 +673,10 @@ static void __init rapl_advertise(void)
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rapl_pkg_domain_names[i], rapl_pkg_hw_unit[i]);
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}
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}
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if (rapl_pmus_core && (rapl_pmus_core->cntr_mask & (1 << PERF_RAPL_CORE)))
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pr_info("hw unit of domain %s 2^-%d Joules\n",
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rapl_core_domain_name, rapl_core_hw_unit);
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}
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static void cleanup_rapl_pmus(struct rapl_pmus *rapl_pmus)
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@ -620,6 +697,11 @@ static const struct attribute_group *rapl_attr_update[] = {
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NULL,
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};
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static const struct attribute_group *rapl_core_attr_update[] = {
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&rapl_events_core_group,
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NULL,
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};
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static int __init init_rapl_pmu(struct rapl_pmus *rapl_pmus)
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{
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struct rapl_pmu *rapl_pmu;
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@ -646,13 +728,22 @@ static int __init init_rapl_pmu(struct rapl_pmus *rapl_pmus)
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return -ENOMEM;
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}
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static int __init init_rapl_pmus(struct rapl_pmus **rapl_pmus_ptr, int rapl_pmu_scope)
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static int __init init_rapl_pmus(struct rapl_pmus **rapl_pmus_ptr, int rapl_pmu_scope,
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const struct attribute_group **rapl_attr_groups,
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const struct attribute_group **rapl_attr_update)
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{
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int nr_rapl_pmu = topology_max_packages();
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struct rapl_pmus *rapl_pmus;
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/*
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* rapl_pmu_scope must be either PKG, DIE or CORE
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*/
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if (rapl_pmu_scope == PERF_PMU_SCOPE_DIE)
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nr_rapl_pmu *= topology_max_dies_per_package();
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else if (rapl_pmu_scope == PERF_PMU_SCOPE_CORE)
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nr_rapl_pmu *= topology_num_cores_per_package();
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else if (rapl_pmu_scope != PERF_PMU_SCOPE_PKG)
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return -EINVAL;
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rapl_pmus = kzalloc(struct_size(rapl_pmus, rapl_pmu, nr_rapl_pmu), GFP_KERNEL);
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if (!rapl_pmus)
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@ -741,8 +832,10 @@ static struct rapl_model model_spr = {
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static struct rapl_model model_amd_hygon = {
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.pkg_events = BIT(PERF_RAPL_PKG),
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.core_events = BIT(PERF_RAPL_CORE),
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.msr_power_unit = MSR_AMD_RAPL_POWER_UNIT,
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.rapl_pkg_msrs = amd_rapl_pkg_msrs,
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.rapl_core_msrs = amd_rapl_core_msrs,
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};
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static const struct x86_cpu_id rapl_model_match[] __initconst = {
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@ -814,7 +907,8 @@ static int __init rapl_pmu_init(void)
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if (ret)
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return ret;
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ret = init_rapl_pmus(&rapl_pmus_pkg, rapl_pkg_pmu_scope);
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ret = init_rapl_pmus(&rapl_pmus_pkg, rapl_pkg_pmu_scope, rapl_attr_groups,
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rapl_attr_update);
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if (ret)
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return ret;
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|
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@ -826,6 +920,27 @@ static int __init rapl_pmu_init(void)
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
if (rapl_model->core_events) {
|
||||
ret = init_rapl_pmus(&rapl_pmus_core, PERF_PMU_SCOPE_CORE,
|
||||
rapl_core_attr_groups,
|
||||
rapl_core_attr_update);
|
||||
if (ret) {
|
||||
pr_warn("power-core PMU initialization failed (%d)\n", ret);
|
||||
goto core_init_failed;
|
||||
}
|
||||
|
||||
rapl_pmus_core->cntr_mask = perf_msr_probe(rapl_model->rapl_core_msrs,
|
||||
PERF_RAPL_CORE_EVENTS_MAX, false,
|
||||
(void *) &rapl_model->core_events);
|
||||
|
||||
ret = perf_pmu_register(&rapl_pmus_core->pmu, "power_core", -1);
|
||||
if (ret) {
|
||||
pr_warn("power-core PMU registration failed (%d)\n", ret);
|
||||
cleanup_rapl_pmus(rapl_pmus_core);
|
||||
}
|
||||
}
|
||||
|
||||
core_init_failed:
|
||||
rapl_advertise();
|
||||
return 0;
|
||||
|
||||
@ -838,6 +953,10 @@ module_init(rapl_pmu_init);
|
||||
|
||||
static void __exit intel_rapl_exit(void)
|
||||
{
|
||||
if (rapl_pmus_core) {
|
||||
perf_pmu_unregister(&rapl_pmus_core->pmu);
|
||||
cleanup_rapl_pmus(rapl_pmus_core);
|
||||
}
|
||||
perf_pmu_unregister(&rapl_pmus_pkg->pmu);
|
||||
cleanup_rapl_pmus(rapl_pmus_pkg);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user