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Merge branch 'for-6.14/constify-bin-attribute' into for-next

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Jiri Kosina 2024-12-11 15:12:11 +01:00
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9
.clippy.toml Normal file
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@ -0,0 +1,9 @@
# SPDX-License-Identifier: GPL-2.0
check-private-items = true
disallowed-macros = [
# The `clippy::dbg_macro` lint only works with `std::dbg!`, thus we simulate
# it here, see: https://github.com/rust-lang/rust-clippy/issues/11303.
{ path = "kernel::dbg", reason = "the `dbg!` macro is intended as a debugging tool" },
]

2
.gitignore vendored
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@ -103,6 +103,7 @@ modules.order
# We don't want to ignore the following even if they are dot-files
#
!.clang-format
!.clippy.toml
!.cocciconfig
!.editorconfig
!.get_maintainer.ignore
@ -128,6 +129,7 @@ series
# ctags files
tags
!tags/
TAGS
# cscope files

64
Documentation/ABI/testing/configfs-usb-gadget-uvc
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@ -342,6 +342,70 @@ Description: Specific uncompressed frame descriptors
support
========================= =====================================
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased
Date: Sept 2024
KernelVersion: 5.15
Description: Framebased format descriptors
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased/name
Date: Sept 2024
KernelVersion: 5.15
Description: Specific framebased format descriptors
================== =======================================
bFormatIndex unique id for this format descriptor;
only defined after parent header is
linked into the streaming class;
read-only
bmaControls this format's data for bmaControls in
the streaming header
bmInterlaceFlags specifies interlace information,
read-only
bAspectRatioY the X dimension of the picture aspect
ratio, read-only
bAspectRatioX the Y dimension of the picture aspect
ratio, read-only
bDefaultFrameIndex optimum frame index for this stream
bBitsPerPixel number of bits per pixel used to
specify color in the decoded video
frame
guidFormat globally unique id used to identify
stream-encoding format
================== =======================================
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased/name/name
Date: Sept 2024
KernelVersion: 5.15
Description: Specific framebased frame descriptors
========================= =====================================
bFrameIndex unique id for this framedescriptor;
only defined after parent format is
linked into the streaming header;
read-only
dwFrameInterval indicates how frame interval can be
programmed; a number of values
separated by newline can be specified
dwDefaultFrameInterval the frame interval the device would
like to use as default
dwBytesPerLine Specifies the number of bytes per line
of video for packed fixed frame size
formats, allowing the receiver to
perform stride alignment of the video.
If the bVariableSize value (above) is
TRUE (1), or if the format does not
permit such alignment, this value shall
be set to zero (0).
dwMaxBitRate the maximum bit rate at the shortest
frame interval in bps
dwMinBitRate the minimum bit rate at the longest
frame interval in bps
wHeight height of decoded bitmap frame in px
wWidth width of decoded bitmam frame in px
bmCapabilities still image support, fixed frame-rate
support
========================= =====================================
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/header
Date: Dec 2014
KernelVersion: 4.0

25
Documentation/ABI/testing/debugfs-hisi-migration Normal file
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@ -0,0 +1,25 @@
What: /sys/kernel/debug/vfio/<device>/migration/hisi_acc/dev_data
Date: Jan 2025
KernelVersion: 6.13
Contact: Longfang Liu <liulongfang@huawei.com>
Description: Read the configuration data and some status data
required for device live migration. These data include device
status data, queue configuration data, some task configuration
data and device attribute data. The output format of the data
is defined by the live migration driver.
What: /sys/kernel/debug/vfio/<device>/migration/hisi_acc/migf_data
Date: Jan 2025
KernelVersion: 6.13
Contact: Longfang Liu <liulongfang@huawei.com>
Description: Read the data from the last completed live migration.
This data includes the same device status data as in "dev_data".
The migf_data is the dev_data that is migrated.
What: /sys/kernel/debug/vfio/<device>/migration/hisi_acc/cmd_state
Date: Jan 2025
KernelVersion: 6.13
Contact: Longfang Liu <liulongfang@huawei.com>
Description: Used to obtain the device command sending and receiving
channel status. Returns failure or success logs based on the
results.

15
Documentation/ABI/testing/sysfs-bus-event_source-devices-vpa-pmu
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@ -8,17 +8,18 @@ Description: Read-only. Attribute group to describe the magic bits
Each attribute under this group defines a bit range of the
perf_event_attr.config. Supported attribute are listed
below::
event = "config:0-31" - event ID
For example::
event = "config:0-31" - event ID
l1_to_l2_lat = "event=0x1"
For example::
l1_to_l2_lat = "event=0x1"
What: /sys/bus/event_source/devices/vpa_pmu/events
Date: November 2024
Contact: Linux on PowerPC Developer List <linuxppc-dev@lists.ozlabs.org>
Description: Read-only. Attribute group to describe performance monitoring
Description: Read-only. Attribute group to describe performance monitoring
events for the Virtual Processor Area events. Each attribute
in this group describes a single performance monitoring event
supported by vpa_pmu. The name of the file is the name of
the event (See ABI/testing/sysfs-bus-event_source-devices-events).
in this group describes a single performance monitoring event
supported by vpa_pmu. The name of the file is the name of
the event (See ABI/testing/sysfs-bus-event_source-devices-events).

32
Documentation/ABI/testing/sysfs-bus-iio
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@ -2268,6 +2268,30 @@ Description:
An example format is 16-bytes, 2-digits-per-byte, HEX-string
representing the sensor unique ID number.
What: /sys/bus/iio/devices/iio:deviceX/filter_type_available
What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available
KernelVersion: 6.1
Contact: linux-iio@vger.kernel.org
Description:
Reading returns a list with the possible filter modes. Options
for the attribute:
* "sinc3" - The digital sinc3 filter. Moderate 1st
conversion time. Good noise performance.
* "sinc4" - Sinc 4. Excellent noise performance. Long
1st conversion time.
* "sinc5" - The digital sinc5 filter. Excellent noise
performance
* "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion
time.
* "sinc3+rej60" - Sinc3 + 60Hz rejection.
* "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion
time.
* "sinc3+pf1" - Sinc3 + device specific Post Filter 1.
* "sinc3+pf2" - Sinc3 + device specific Post Filter 2.
* "sinc3+pf3" - Sinc3 + device specific Post Filter 3.
* "sinc3+pf4" - Sinc3 + device specific Post Filter 4.
What: /sys/.../events/in_proximity_thresh_either_runningperiod
KernelVersion: 6.6
Contact: linux-iio@vger.kernel.org
@ -2339,3 +2363,11 @@ KernelVersion: 6.10
Contact: linux-iio@vger.kernel.org
Description:
The value of current sense resistor in Ohms.
What: /sys/.../iio:deviceX/in_attention_input
KernelVersion: 6.13
Contact: linux-iio@vger.kernel.org
Description:
Value representing the user's attention to the system expressed
in units as percentage. This usually means if the user is
looking at the screen or not.

46
Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130
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@ -1,46 +0,0 @@
What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available
KernelVersion: 6.2
Contact: linux-iio@vger.kernel.org
Description:
Reading returns a list with the possible filter modes.
* "sinc4" - Sinc 4. Excellent noise performance. Long
1st conversion time. No natural 50/60Hz rejection.
* "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion
time.
* "sinc3" - Sinc3. Moderate 1st conversion time.
Good noise performance.
* "sinc3+rej60" - Sinc3 + 60Hz rejection. At a sampling
frequency of 50Hz, achieves simultaneous 50Hz and 60Hz
rejection.
* "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion
time. Best used with a sampling frequency of at least
216.19Hz.
* "sinc3+pf1" - Sinc3 + Post Filter 1. 53dB rejection @
50Hz, 58dB rejection @ 60Hz.
* "sinc3+pf2" - Sinc3 + Post Filter 2. 70dB rejection @
50Hz, 70dB rejection @ 60Hz.
* "sinc3+pf3" - Sinc3 + Post Filter 3. 99dB rejection @
50Hz, 103dB rejection @ 60Hz.
* "sinc3+pf4" - Sinc3 + Post Filter 4. 103dB rejection @
50Hz, 109dB rejection @ 60Hz.
What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_filter_mode
KernelVersion: 6.2
Contact: linux-iio@vger.kernel.org
Description:
Set the filter mode of the differential channel. When the filter
mode changes, the in_voltageY-voltageZ_sampling_frequency and
in_voltageY-voltageZ_sampling_frequency_available attributes
might also change to accommodate the new filter mode.
If the current sampling frequency is out of range for the new
filter mode, the sampling frequency will be changed to the
closest valid one.

11
Documentation/ABI/testing/sysfs-bus-pci
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@ -163,6 +163,17 @@ Description:
will be present in sysfs. Writing 1 to this file
will perform reset.
What: /sys/bus/pci/devices/.../reset_subordinate
Date: October 2024
Contact: linux-pci@vger.kernel.org
Description:
This is visible only for bridge devices. If you want to reset
all devices attached through the subordinate bus of a specific
bridge device, writing 1 to this will try to do it. This will
affect all devices attached to the system through this bridge
similiar to writing 1 to their individual "reset" file, so use
with caution.
What: /sys/bus/pci/devices/.../vpd
Date: February 2008
Contact: Ben Hutchings <bwh@kernel.org>

27
Documentation/ABI/testing/sysfs-class-typec
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@ -149,6 +149,19 @@ Description:
advertise to the partner. The currently used capabilities are in
brackets. Selection happens by writing to the file.
What: /sys/class/typec/<port>/usb_capability
Date: November 2024
Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Description: Lists the supported USB Modes. The default USB mode that is used
next time with the Enter_USB Message is in brackets. The default
mode can be changed by writing to the file when supported by the
driver.
Valid values:
- usb2 (USB 2.0)
- usb3 (USB 3.2)
- usb4 (USB4)
USB Type-C partner devices (eg. /sys/class/typec/port0-partner/)
What: /sys/class/typec/<port>-partner/accessory_mode
@ -220,6 +233,20 @@ Description:
directory exists, it will have an attribute file for every VDO
in Discover Identity command result.
What: /sys/class/typec/<port>-partner/usb_mode
Date: November 2024
Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Description: The USB Modes that the partner device supports. The active mode
is displayed in brackets. The active USB mode can be changed by
writing to this file when the port driver is able to send Data
Reset Message to the partner. That requires USB Power Delivery
contract between the partner and the port.
Valid values:
- usb2 (USB 2.0)
- usb3 (USB 3.2)
- usb4 (USB4)
USB Type-C cable devices (eg. /sys/class/typec/port0-cable/)
Note: Electronically Marked Cables will have a device also for one cable plug

2
Documentation/ABI/testing/sysfs-class-watchdog
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@ -76,7 +76,7 @@ Description:
timeout when the pretimeout interrupt is delivered. Pretimeout
is an optional feature.
What: /sys/class/watchdog/watchdogn/pretimeout_avaialable_governors
What: /sys/class/watchdog/watchdogn/pretimeout_available_governors
Date: February 2017
Contact: Wim Van Sebroeck <wim@iguana.be>
Description:

13
Documentation/ABI/testing/sysfs-fs-f2fs
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@ -311,10 +311,13 @@ Description: Do background GC aggressively when set. Set to 0 by default.
GC approach and turns SSR mode on.
gc urgent low(2): lowers the bar of checking I/O idling in
order to process outstanding discard commands and GC a
little bit aggressively. uses cost benefit GC approach.
little bit aggressively. always uses cost benefit GC approach,
and will override age-threshold GC approach if ATGC is enabled
at the same time.
gc urgent mid(3): does GC forcibly in a period of given
gc_urgent_sleep_time and executes a mid level of I/O idling check.
uses cost benefit GC approach.
always uses cost benefit GC approach, and will override
age-threshold GC approach if ATGC is enabled at the same time.
What: /sys/fs/f2fs/<disk>/gc_urgent_sleep_time
Date: August 2017
@ -819,3 +822,9 @@ Description: It controls the valid block ratio threshold not to trigger excessiv
for zoned deivces. The initial value of it is 95(%). F2FS will stop the
background GC thread from intiating GC for sections having valid blocks
exceeding the ratio.
What: /sys/fs/f2fs/<disk>/max_read_extent_count
Date: November 2024
Contact: "Chao Yu" <chao@kernel.org>
Description: It controls max read extent count for per-inode, the value of threshold
is 10240 by default.

29
Documentation/PCI/endpoint/pci-endpoint.rst
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@ -117,6 +117,35 @@ by the PCI endpoint function driver.
The PCI endpoint function driver should use pci_epc_mem_free_addr() to
free the memory space allocated using pci_epc_mem_alloc_addr().
* pci_epc_map_addr()
A PCI endpoint function driver should use pci_epc_map_addr() to map to a RC
PCI address the CPU address of local memory obtained with
pci_epc_mem_alloc_addr().
* pci_epc_unmap_addr()
A PCI endpoint function driver should use pci_epc_unmap_addr() to unmap the
CPU address of local memory mapped to a RC address with pci_epc_map_addr().
* pci_epc_mem_map()
A PCI endpoint controller may impose constraints on the RC PCI addresses that
can be mapped. The function pci_epc_mem_map() allows endpoint function
drivers to allocate and map controller memory while handling such
constraints. This function will determine the size of the memory that must be
allocated with pci_epc_mem_alloc_addr() for successfully mapping a RC PCI
address range. This function will also indicate the size of the PCI address
range that was actually mapped, which can be less than the requested size, as
well as the offset into the allocated memory to use for accessing the mapped
RC PCI address range.
* pci_epc_mem_unmap()
A PCI endpoint function driver can use pci_epc_mem_unmap() to unmap and free
controller memory that was allocated and mapped using pci_epc_mem_map().
Other EPC APIs
~~~~~~~~~~~~~~

1
Documentation/PCI/index.rst
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@ -18,3 +18,4 @@ PCI Bus Subsystem
pcieaer-howto
endpoint/index
boot-interrupts
tph

14
Documentation/PCI/pciebus-howto.rst
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@ -217,8 +217,12 @@ capability structure except the PCI Express capability structure,
that is shared between many drivers including the service drivers.
RMW Capability accessors (pcie_capability_clear_and_set_word(),
pcie_capability_set_word(), and pcie_capability_clear_word()) protect
a selected set of PCI Express Capability Registers (Link Control
Register and Root Control Register). Any change to those registers
should be performed using RMW accessors to avoid problems due to
concurrent updates. For the up-to-date list of protected registers,
see pcie_capability_clear_and_set_word().
a selected set of PCI Express Capability Registers:
* Link Control Register
* Root Control Register
* Link Control 2 Register
Any change to those registers should be performed using RMW accessors to
avoid problems due to concurrent updates. For the up-to-date list of
protected registers, see pcie_capability_clear_and_set_word().

132
Documentation/PCI/tph.rst Normal file
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@ -0,0 +1,132 @@
.. SPDX-License-Identifier: GPL-2.0
===========
TPH Support
===========
:Copyright: 2024 Advanced Micro Devices, Inc.
:Authors: - Eric van Tassell <eric.vantassell@amd.com>
- Wei Huang <wei.huang2@amd.com>
Overview
========
TPH (TLP Processing Hints) is a PCIe feature that allows endpoint devices
to provide optimization hints for requests that target memory space.
These hints, in a format called Steering Tags (STs), are embedded in the
requester's TLP headers, enabling the system hardware, such as the Root
Complex, to better manage platform resources for these requests.
For example, on platforms with TPH-based direct data cache injection
support, an endpoint device can include appropriate STs in its DMA
traffic to specify which cache the data should be written to. This allows
the CPU core to have a higher probability of getting data from cache,
potentially improving performance and reducing latency in data
processing.
How to Use TPH
==============
TPH is presented as an optional extended capability in PCIe. The Linux
kernel handles TPH discovery during boot, but it is up to the device
driver to request TPH enablement if it is to be utilized. Once enabled,
the driver uses the provided API to obtain the Steering Tag for the
target memory and to program the ST into the device's ST table.
Enable TPH support in Linux
---------------------------
To support TPH, the kernel must be built with the CONFIG_PCIE_TPH option
enabled.
Manage TPH
----------
To enable TPH for a device, use the following function::
int pcie_enable_tph(struct pci_dev *pdev, int mode);
This function enables TPH support for device with a specific ST mode.
Current supported modes include:
* PCI_TPH_ST_NS_MODE - NO ST Mode
* PCI_TPH_ST_IV_MODE - Interrupt Vector Mode
* PCI_TPH_ST_DS_MODE - Device Specific Mode
`pcie_enable_tph()` checks whether the requested mode is actually
supported by the device before enabling. The device driver can figure out
which TPH mode is supported and can be properly enabled based on the
return value of `pcie_enable_tph()`.
To disable TPH, use the following function::
void pcie_disable_tph(struct pci_dev *pdev);
Manage ST
---------
Steering Tags are platform specific. PCIe spec does not specify where STs
are from. Instead PCI Firmware Specification defines an ACPI _DSM method
(see the `Revised _DSM for Cache Locality TPH Features ECN
<https://members.pcisig.com/wg/PCI-SIG/document/15470>`_) for retrieving
STs for a target memory of various properties. This method is what is
supported in this implementation.
To retrieve a Steering Tag for a target memory associated with a specific
CPU, use the following function::
int pcie_tph_get_cpu_st(struct pci_dev *pdev, enum tph_mem_type type,
unsigned int cpu_uid, u16 *tag);
The `type` argument is used to specify the memory type, either volatile
or persistent, of the target memory. The `cpu_uid` argument specifies the
CPU where the memory is associated to.
After the ST value is retrieved, the device driver can use the following
function to write the ST into the device::
int pcie_tph_set_st_entry(struct pci_dev *pdev, unsigned int index,
u16 tag);
The `index` argument is the ST table entry index the ST tag will be
written into. `pcie_tph_set_st_entry()` will figure out the proper
location of ST table, either in the MSI-X table or in the TPH Extended
Capability space, and write the Steering Tag into the ST entry pointed by
the `index` argument.
It is completely up to the driver to decide how to use these TPH
functions. For example a network device driver can use the TPH APIs above
to update the Steering Tag when interrupt affinity of a RX/TX queue has
been changed. Here is a sample code for IRQ affinity notifier:
.. code-block:: c
static void irq_affinity_notified(struct irq_affinity_notify *notify,
const cpumask_t *mask)
{
struct drv_irq *irq;
unsigned int cpu_id;
u16 tag;
irq = container_of(notify, struct drv_irq, affinity_notify);
cpumask_copy(irq->cpu_mask, mask);
/* Pick a right CPU as the target - here is just an example */
cpu_id = cpumask_first(irq->cpu_mask);
if (pcie_tph_get_cpu_st(irq->pdev, TPH_MEM_TYPE_VM, cpu_id,
&tag))
return;
if (pcie_tph_set_st_entry(irq->pdev, irq->msix_nr, tag))
return;
}
Disable TPH system-wide
-----------------------
There is a kernel command line option available to control TPH feature:
* "notph": TPH will be disabled for all endpoint devices.

7
Documentation/admin-guide/LSM/apparmor.rst
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@ -18,8 +18,11 @@ set ``CONFIG_SECURITY_APPARMOR=y``
If AppArmor should be selected as the default security module then set::
CONFIG_DEFAULT_SECURITY="apparmor"
CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1
CONFIG_DEFAULT_SECURITY_APPARMOR=y
The CONFIG_LSM parameter manages the order and selection of LSMs.
Specify apparmor as the first "major" module (e.g. AppArmor, SELinux, Smack)
in the list.
Build the kernel

1
Documentation/admin-guide/kernel-parameters.rst
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@ -174,6 +174,7 @@ is applicable::
SCSI Appropriate SCSI support is enabled.
A lot of drivers have their options described inside
the Documentation/scsi/ sub-directory.
SDW SoundWire support is enabled.
SECURITY Different security models are enabled.
SELINUX SELinux support is enabled.
SERIAL Serial support is enabled.

18
Documentation/admin-guide/kernel-parameters.txt
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@ -4686,6 +4686,10 @@
nomio [S390] Do not use MIO instructions.
norid [S390] ignore the RID field and force use of
one PCI domain per PCI function
notph [PCIE] If the PCIE_TPH kernel config parameter
is enabled, this kernel boot option can be used
to disable PCIe TLP Processing Hints support
system-wide.
pcie_aspm= [PCIE] Forcibly enable or ignore PCIe Active State Power
Management.
@ -6071,6 +6075,10 @@
non-zero "wait" parameter. See weight_single
and weight_many.
sdw_mclk_divider=[SDW]
Specify the MCLK divider for Intel SoundWire buses in
case the BIOS does not provide the clock rate properly.
skew_tick= [KNL,EARLY] Offset the periodic timer tick per cpu to mitigate
xtime_lock contention on larger systems, and/or RCU lock
contention on all systems with CONFIG_MAXSMP set.
@ -6158,6 +6166,16 @@
For more information see Documentation/mm/slub.rst.
(slub_nomerge legacy name also accepted for now)
slab_strict_numa [MM]
Support memory policies on a per object level
in the slab allocator. The default is for memory
policies to be applied at the folio level when
a new folio is needed or a partial folio is
retrieved from the lists. Increases overhead
in the slab fastpaths but gains more accurate
NUMA kernel object placement which helps with slow
interconnects in NUMA systems.
slram= [HW,MTD]
smart2= [HW]

5
Documentation/admin-guide/media/index.rst
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@ -20,6 +20,11 @@ Documentation/driver-api/media/index.rst
- for driver development information and Kernel APIs used by
media devices;
Documentation/process/debugging/media_specific_debugging_guide.rst
- for advice about essential tools and techniques to debug drivers on this
subsystem
.. toctree::
:caption: Table of Contents
:maxdepth: 2

10
Documentation/admin-guide/sysctl/fs.rst
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@ -337,3 +337,13 @@ Each "watch" costs roughly 90 bytes on a 32-bit kernel, and roughly 160 bytes
on a 64-bit one.
The current default value for ``max_user_watches`` is 4% of the
available low memory, divided by the "watch" cost in bytes.
5. /proc/sys/fs/fuse - Configuration options for FUSE filesystems
=====================================================================
This directory contains the following configuration options for FUSE
filesystems:
``/proc/sys/fs/fuse/max_pages_limit`` is a read/write file for
setting/getting the maximum number of pages that can be used for servicing
requests in FUSE.

9
Documentation/admin-guide/sysctl/kernel.rst
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@ -401,6 +401,15 @@ The upper bound on the number of tasks that are checked.
This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled.
hung_task_detect_count
======================
Indicates the total number of tasks that have been detected as hung since
the system boot.
This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled.
hung_task_timeout_secs
======================

2
Documentation/arch/arm64/silicon-errata.rst
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@ -258,6 +258,8 @@ stable kernels.
| Hisilicon | Hip{08,09,10,10C| #162001900 | N/A |
| | ,11} SMMU PMCG | | |
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip09 | #162100801 | HISILICON_ERRATUM_162100801 |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
+----------------+-----------------+-----------------+-----------------------------+

19
Documentation/arch/riscv/hwprobe.rst
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@ -239,6 +239,9 @@ The following keys are defined:
ratified in commit 98918c844281 ("Merge pull request #1217 from
riscv/zawrs") of riscv-isa-manual.
* :c:macro:`RISCV_HWPROBE_EXT_SUPM`: The Supm extension is supported as
defined in version 1.0 of the RISC-V Pointer Masking extensions.
* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to
:c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was
mistakenly classified as a bitmask rather than a value.
@ -274,3 +277,19 @@ The following keys are defined:
represent the highest userspace virtual address usable.
* :c:macro:`RISCV_HWPROBE_KEY_TIME_CSR_FREQ`: Frequency (in Hz) of `time CSR`.
* :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF`: An enum value describing the
performance of misaligned vector accesses on the selected set of processors.
* :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN`: The performance of misaligned
vector accesses is unknown.
* :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW`: 32-bit misaligned accesses using vector
registers are slower than the equivalent quantity of byte accesses via vector registers.
Misaligned accesses may be supported directly in hardware, or trapped and emulated by software.
* :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_FAST`: 32-bit misaligned accesses using vector
registers are faster than the equivalent quantity of byte accesses via vector registers.
* :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED`: Misaligned vector accesses are
not supported at all and will generate a misaligned address fault.

16
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@ -68,3 +68,19 @@ Misaligned accesses
Misaligned scalar accesses are supported in userspace, but they may perform
poorly. Misaligned vector accesses are only supported if the Zicclsm extension
is supported.
Pointer masking
---------------
Support for pointer masking in userspace (the Supm extension) is provided via
the ``PR_SET_TAGGED_ADDR_CTRL`` and ``PR_GET_TAGGED_ADDR_CTRL`` ``prctl()``
operations. Pointer masking is disabled by default. To enable it, userspace
must call ``PR_SET_TAGGED_ADDR_CTRL`` with the ``PR_PMLEN`` field set to the
number of mask/tag bits needed by the application. ``PR_PMLEN`` is interpreted
as a lower bound; if the kernel is unable to satisfy the request, the
``PR_SET_TAGGED_ADDR_CTRL`` operation will fail. The actual number of tag bits
is returned in ``PR_PMLEN`` by the ``PR_GET_TAGGED_ADDR_CTRL`` operation.
Additionally, when pointer masking is enabled (``PR_PMLEN`` is greater than 0),
a tagged address ABI is supported, with the same interface and behavior as
documented for AArch64 (Documentation/arch/arm64/tagged-address-abi.rst).

17
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@ -896,10 +896,19 @@ Offset/size: 0x260/4
The kernel runtime start address is determined by the following algorithm::
if (relocatable_kernel)
runtime_start = align_up(load_address, kernel_alignment)
else
runtime_start = pref_address
if (relocatable_kernel) {
if (load_address < pref_address)
load_address = pref_address;
runtime_start = align_up(load_address, kernel_alignment);
} else {
runtime_start = pref_address;
}
Hence the necessary memory window location and size can be estimated by
a boot loader as::
memory_window_start = runtime_start;
memory_window_size = init_size;
============ ===============
Field name: handover_offset

20
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@ -55,14 +55,16 @@ scope.
What about __vmalloc(GFP_NOFS)
==============================
vmalloc doesn't support GFP_NOFS semantic because there are hardcoded
GFP_KERNEL allocations deep inside the allocator which are quite non-trivial
to fix up. That means that calling ``vmalloc`` with GFP_NOFS/GFP_NOIO is
almost always a bug. The good news is that the NOFS/NOIO semantic can be
achieved by the scope API.
Since v5.17, and specifically after the commit 451769ebb7e79 ("mm/vmalloc:
alloc GFP_NO{FS,IO} for vmalloc"), GFP_NOFS/GFP_NOIO are now supported in
``[k]vmalloc`` by implicitly using scope API.
In earlier kernels ``vmalloc`` didn't support GFP_NOFS semantic because there
were hardcoded GFP_KERNEL allocations deep inside the allocator. That means
that calling ``vmalloc`` with GFP_NOFS/GFP_NOIO was almost always a bug.
In the ideal world, upper layers should already mark dangerous contexts
and so no special care is required and vmalloc should be called without
any problems. Sometimes if the context is not really clear or there are
layering violations then the recommended way around that is to wrap ``vmalloc``
by the scope API with a comment explaining the problem.
and so no special care is required and ``vmalloc`` should be called without any
problems. Sometimes if the context is not really clear or there are layering
violations then the recommended way around that (on pre-v5.17 kernels) is to
wrap ``vmalloc`` by the scope API with a comment explaining the problem.

1
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@ -52,6 +52,7 @@ Library functionality that is used throughout the kernel.
wrappers/atomic_bitops
floating-point
union_find
min_heap
Low level entry and exit
========================

300
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@ -0,0 +1,300 @@
.. SPDX-License-Identifier: GPL-2.0
============
Min Heap API
============
Introduction
============
The Min Heap API provides a set of functions and macros for managing min-heaps
in the Linux kernel. A min-heap is a binary tree structure where the value of
each node is less than or equal to the values of its children, ensuring that
the smallest element is always at the root.
This document provides a guide to the Min Heap API, detailing how to define and
use min-heaps. Users should not directly call functions with **__min_heap_*()**
prefixes, but should instead use the provided macro wrappers.
In addition to the standard version of the functions, the API also includes a
set of inline versions for performance-critical scenarios. These inline
functions have the same names as their non-inline counterparts but include an
**_inline** suffix. For example, **__min_heap_init_inline** and its
corresponding macro wrapper **min_heap_init_inline**. The inline versions allow
custom comparison and swap functions to be called directly, rather than through
indirect function calls. This can significantly reduce overhead, especially
when CONFIG_MITIGATION_RETPOLINE is enabled, as indirect function calls become
more expensive. As with the non-inline versions, it is important to use the
macro wrappers for inline functions instead of directly calling the functions
themselves.
Data Structures
===============
Min-Heap Definition
-------------------
The core data structure for representing a min-heap is defined using the
**MIN_HEAP_PREALLOCATED** and **DEFINE_MIN_HEAP** macros. These macros allow
you to define a min-heap with a preallocated buffer or dynamically allocated
memory.
Example:
.. code-block:: c
#define MIN_HEAP_PREALLOCATED(_type, _name, _nr)
struct _name {
int nr; /* Number of elements in the heap */
int size; /* Maximum number of elements that can be held */
_type *data; /* Pointer to the heap data */
_type preallocated[_nr]; /* Static preallocated array */
}
#define DEFINE_MIN_HEAP(_type, _name) MIN_HEAP_PREALLOCATED(_type, _name, 0)
A typical heap structure will include a counter for the number of elements
(`nr`), the maximum capacity of the heap (`size`), and a pointer to an array of
elements (`data`). Optionally, you can specify a static array for preallocated
heap storage using **MIN_HEAP_PREALLOCATED**.
Min Heap Callbacks
------------------
The **struct min_heap_callbacks** provides customization options for ordering
elements in the heap and swapping them. It contains two function pointers:
.. code-block:: c
struct min_heap_callbacks {
bool (*less)(const void *lhs, const void *rhs, void *args);
void (*swp)(void *lhs, void *rhs, void *args);
};
- **less** is the comparison function used to establish the order of elements.
- **swp** is a function for swapping elements in the heap. If swp is set to
NULL, the default swap function will be used, which swaps the elements based on their size
Macro Wrappers
==============
The following macro wrappers are provided for interacting with the heap in a
user-friendly manner. Each macro corresponds to a function that operates on the
heap, and they abstract away direct calls to internal functions.
Each macro accepts various parameters that are detailed below.
Heap Initialization
--------------------
.. code-block:: c
min_heap_init(heap, data, size);
- **heap**: A pointer to the min-heap structure to be initialized.
- **data**: A pointer to the buffer where the heap elements will be stored. If
`NULL`, the preallocated buffer within the heap structure will be used.
- **size**: The maximum number of elements the heap can hold.
This macro initializes the heap, setting its initial state. If `data` is
`NULL`, the preallocated memory inside the heap structure will be used for
storage. Otherwise, the user-provided buffer is used. The operation is **O(1)**.
**Inline Version:** min_heap_init_inline(heap, data, size)
Accessing the Top Element
-------------------------
.. code-block:: c
element = min_heap_peek(heap);
- **heap**: A pointer to the min-heap from which to retrieve the smallest
element.
This macro returns a pointer to the smallest element (the root) of the heap, or
`NULL` if the heap is empty. The operation is **O(1)**.
**Inline Version:** min_heap_peek_inline(heap)
Heap Insertion
--------------
.. code-block:: c
success = min_heap_push(heap, element, callbacks, args);
- **heap**: A pointer to the min-heap into which the element should be inserted.
- **element**: A pointer to the element to be inserted into the heap.
- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
`less` and `swp` functions.
- **args**: Optional arguments passed to the `less` and `swp` functions.
This macro inserts an element into the heap. It returns `true` if the insertion
was successful and `false` if the heap is full. The operation is **O(log n)**.
**Inline Version:** min_heap_push_inline(heap, element, callbacks, args)
Heap Removal
------------
.. code-block:: c
success = min_heap_pop(heap, callbacks, args);
- **heap**: A pointer to the min-heap from which to remove the smallest element.
- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
`less` and `swp` functions.
- **args**: Optional arguments passed to the `less` and `swp` functions.
This macro removes the smallest element (the root) from the heap. It returns
`true` if the element was successfully removed, or `false` if the heap is
empty. The operation is **O(log n)**.
**Inline Version:** min_heap_pop_inline(heap, callbacks, args)
Heap Maintenance
----------------
You can use the following macros to maintain the heap's structure:
.. code-block:: c
min_heap_sift_down(heap, pos, callbacks, args);
- **heap**: A pointer to the min-heap.
- **pos**: The index from which to start sifting down.
- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
`less` and `swp` functions.
- **args**: Optional arguments passed to the `less` and `swp` functions.
This macro restores the heap property by moving the element at the specified
index (`pos`) down the heap until it is in the correct position. The operation
is **O(log n)**.
**Inline Version:** min_heap_sift_down_inline(heap, pos, callbacks, args)
.. code-block:: c
min_heap_sift_up(heap, idx, callbacks, args);
- **heap**: A pointer to the min-heap.
- **idx**: The index of the element to sift up.
- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
`less` and `swp` functions.
- **args**: Optional arguments passed to the `less` and `swp` functions.
This macro restores the heap property by moving the element at the specified
index (`idx`) up the heap. The operation is **O(log n)**.
**Inline Version:** min_heap_sift_up_inline(heap, idx, callbacks, args)
.. code-block:: c
min_heapify_all(heap, callbacks, args);
- **heap**: A pointer to the min-heap.
- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
`less` and `swp` functions.
- **args**: Optional arguments passed to the `less` and `swp` functions.
This macro ensures that the entire heap satisfies the heap property. It is
called when the heap is built from scratch or after many modifications. The
operation is **O(n)**.
**Inline Version:** min_heapify_all_inline(heap, callbacks, args)
Removing Specific Elements
--------------------------
.. code-block:: c
success = min_heap_del(heap, idx, callbacks, args);
- **heap**: A pointer to the min-heap.
- **idx**: The index of the element to delete.
- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
`less` and `swp` functions.
- **args**: Optional arguments passed to the `less` and `swp` functions.
This macro removes an element at the specified index (`idx`) from the heap and
restores the heap property. The operation is **O(log n)**.
**Inline Version:** min_heap_del_inline(heap, idx, callbacks, args)
Other Utilities
===============
- **min_heap_full(heap)**: Checks whether the heap is full.
Complexity: **O(1)**.
.. code-block:: c
bool full = min_heap_full(heap);
- `heap`: A pointer to the min-heap to check.
This macro returns `true` if the heap is full, otherwise `false`.
**Inline Version:** min_heap_full_inline(heap)
- **min_heap_empty(heap)**: Checks whether the heap is empty.
Complexity: **O(1)**.
.. code-block:: c
bool empty = min_heap_empty(heap);
- `heap`: A pointer to the min-heap to check.
This macro returns `true` if the heap is empty, otherwise `false`.
**Inline Version:** min_heap_empty_inline(heap)
Example Usage
=============
An example usage of the min-heap API would involve defining a heap structure,
initializing it, and inserting and removing elements as needed.
.. code-block:: c
#include <linux/min_heap.h>
int my_less_function(const void *lhs, const void *rhs, void *args) {
return (*(int *)lhs < *(int *)rhs);
}
struct min_heap_callbacks heap_cb = {
.less = my_less_function, /* Comparison function for heap order */
.swp = NULL, /* Use default swap function */
};
void example_usage(void) {
/* Pre-populate the buffer with elements */
int buffer[5] = {5, 2, 8, 1, 3};
/* Declare a min-heap */
DEFINE_MIN_HEAP(int, my_heap);
/* Initialize the heap with preallocated buffer and size */
min_heap_init(&my_heap, buffer, 5);
/* Build the heap using min_heapify_all */
my_heap.nr = 5; /* Set the number of elements in the heap */
min_heapify_all(&my_heap, &heap_cb, NULL);
/* Peek at the top element (should be 1 in this case) */
int *top = min_heap_peek(&my_heap);
pr_info("Top element: %d\n", *top);
/* Pop the top element (1) and get the new top (2) */
min_heap_pop(&my_heap, &heap_cb, NULL);
top = min_heap_peek(&my_heap);
pr_info("New top element: %d\n", *top);
/* Insert a new element (0) and recheck the top */
int new_element = 0;
min_heap_push(&my_heap, &new_element, &heap_cb, NULL);
top = min_heap_peek(&my_heap);
pr_info("Top element after insertion: %d\n", *top);
}

8
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@ -46,7 +46,7 @@ Please note that due to macro expansion that argument needs to be a
preprocessor symbol. E.g. to export the symbol ``usb_stor_suspend`` into the
namespace ``USB_STORAGE``, use::
EXPORT_SYMBOL_NS(usb_stor_suspend, USB_STORAGE);
EXPORT_SYMBOL_NS(usb_stor_suspend, "USB_STORAGE");
The corresponding ksymtab entry struct ``kernel_symbol`` will have the member
``namespace`` set accordingly. A symbol that is exported without a namespace will
@ -68,7 +68,7 @@ is to define the default namespace in the ``Makefile`` of the subsystem. E.g. to
export all symbols defined in usb-common into the namespace USB_COMMON, add a
line like this to drivers/usb/common/Makefile::
ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=USB_COMMON
ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE='"USB_COMMON"'
That will affect all EXPORT_SYMBOL() and EXPORT_SYMBOL_GPL() statements. A
symbol exported with EXPORT_SYMBOL_NS() while this definition is present, will
@ -79,7 +79,7 @@ A second option to define the default namespace is directly in the compilation
unit as preprocessor statement. The above example would then read::
#undef DEFAULT_SYMBOL_NAMESPACE
#define DEFAULT_SYMBOL_NAMESPACE USB_COMMON
#define DEFAULT_SYMBOL_NAMESPACE "USB_COMMON"
within the corresponding compilation unit before any EXPORT_SYMBOL macro is
used.
@ -94,7 +94,7 @@ for the namespaces it uses symbols from. E.g. a module using the
usb_stor_suspend symbol from above, needs to import the namespace USB_STORAGE
using a statement like::
MODULE_IMPORT_NS(USB_STORAGE);
MODULE_IMPORT_NS("USB_STORAGE");
This will create a ``modinfo`` tag in the module for each imported namespace.
This has the side effect, that the imported namespaces of a module can be

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@ -0,0 +1,168 @@
.. SPDX-License-Identifier: GPL-2.0
===================================
Using AutoFDO with the Linux kernel
===================================
This enables AutoFDO build support for the kernel when using
the Clang compiler. AutoFDO (Auto-Feedback-Directed Optimization)
is a type of profile-guided optimization (PGO) used to enhance the
performance of binary executables. It gathers information about the
frequency of execution of various code paths within a binary using
hardware sampling. This data is then used to guide the compiler's
optimization decisions, resulting in a more efficient binary. AutoFDO
is a powerful optimization technique, and data indicates that it can
significantly improve kernel performance. It's especially beneficial
for workloads affected by front-end stalls.
For AutoFDO builds, unlike non-FDO builds, the user must supply a
profile. Acquiring an AutoFDO profile can be done in several ways.
AutoFDO profiles are created by converting hardware sampling using
the "perf" tool. It is crucial that the workload used to create these
perf files is representative; they must exhibit runtime
characteristics similar to the workloads that are intended to be
optimized. Failure to do so will result in the compiler optimizing
for the wrong objective.
The AutoFDO profile often encapsulates the program's behavior. If the
performance-critical codes are architecture-independent, the profile
can be applied across platforms to achieve performance gains. For
instance, using the profile generated on Intel architecture to build
a kernel for AMD architecture can also yield performance improvements.
There are two methods for acquiring a representative profile:
(1) Sample real workloads using a production environment.
(2) Generate the profile using a representative load test.
When enabling the AutoFDO build configuration without providing an
AutoFDO profile, the compiler only modifies the dwarf information in
the kernel without impacting runtime performance. It's advisable to
use a kernel binary built with the same AutoFDO configuration to
collect the perf profile. While it's possible to use a kernel built
with different options, it may result in inferior performance.
One can collect profiles using AutoFDO build for the previous kernel.
AutoFDO employs relative line numbers to match the profiles, offering
some tolerance for source changes. This mode is commonly used in a
production environment for profile collection.
In a profile collection based on a load test, the AutoFDO collection
process consists of the following steps:
#. Initial build: The kernel is built with AutoFDO options
without a profile.
#. Profiling: The above kernel is then run with a representative
workload to gather execution frequency data. This data is
collected using hardware sampling, via perf. AutoFDO is most
effective on platforms supporting advanced PMU features like
LBR on Intel machines.
#. AutoFDO profile generation: Perf output file is converted to
the AutoFDO profile via offline tools.
The support requires a Clang compiler LLVM 17 or later.
Preparation
===========
Configure the kernel with::
CONFIG_AUTOFDO_CLANG=y
Customization
=============
The default CONFIG_AUTOFDO_CLANG setting covers kernel space objects for
AutoFDO builds. One can, however, enable or disable AutoFDO build for
individual files and directories by adding a line similar to the following
to the respective kernel Makefile:
- For enabling a single file (e.g. foo.o) ::
AUTOFDO_PROFILE_foo.o := y
- For enabling all files in one directory ::
AUTOFDO_PROFILE := y
- For disabling one file ::
AUTOFDO_PROFILE_foo.o := n
- For disabling all files in one directory ::
AUTOFDO_PROFILE := n
Workflow
========
Here is an example workflow for AutoFDO kernel:
1) Build the kernel on the host machine with LLVM enabled,
for example, ::
$ make menuconfig LLVM=1
Turn on AutoFDO build config::
CONFIG_AUTOFDO_CLANG=y
With a configuration that with LLVM enabled, use the following command::
$ scripts/config -e AUTOFDO_CLANG
After getting the config, build with ::
$ make LLVM=1
2) Install the kernel on the test machine.
3) Run the load tests. The '-c' option in perf specifies the sample
event period. We suggest using a suitable prime number, like 500009,
for this purpose.
- For Intel platforms::
$ perf record -e BR_INST_RETIRED.NEAR_TAKEN:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
- For AMD platforms:
The supported systems are: Zen3 with BRS, or Zen4 with amd_lbr_v2. To check,
For Zen3::
$ cat proc/cpuinfo | grep " brs"
For Zen4::
$ cat proc/cpuinfo | grep amd_lbr_v2
The following command generated the perf data file::
$ perf record --pfm-events RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
4) (Optional) Download the raw perf file to the host machine.
5) To generate an AutoFDO profile, two offline tools are available:
create_llvm_prof and llvm_profgen. The create_llvm_prof tool is part
of the AutoFDO project and can be found on GitHub
(https://github.com/google/autofdo), version v0.30.1 or later.
The llvm_profgen tool is included in the LLVM compiler itself. It's
important to note that the version of llvm_profgen doesn't need to match
the version of Clang. It needs to be the LLVM 19 release of Clang
or later, or just from the LLVM trunk. ::
$ llvm-profgen --kernel --binary=<vmlinux> --perfdata=<perf_file> -o <profile_file>
or ::
$ create_llvm_prof --binary=<vmlinux> --profile=<perf_file> --format=extbinary --out=<profile_file>
Note that multiple AutoFDO profile files can be merged into one via::
$ llvm-profdata merge -o <profile_file> <profile_1> <profile_2> ... <profile_n>
6) Rebuild the kernel using the AutoFDO profile file with the same config as step 1,
(Note CONFIG_AUTOFDO_CLANG needs to be enabled)::
$ make LLVM=1 CLANG_AUTOFDO_PROFILE=<profile_file>

20
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@ -250,25 +250,17 @@ variables for .cocciconfig is as follows:
- Your directory from which spatch is called is processed next
- The directory provided with the ``--dir`` option is processed last, if used
Since coccicheck runs through make, it naturally runs from the kernel
proper dir; as such the second rule above would be implied for picking up a
.cocciconfig when using ``make coccicheck``.
``make coccicheck`` also supports using M= targets. If you do not supply
any M= target, it is assumed you want to target the entire kernel.
The kernel coccicheck script has::
if [ "$KBUILD_EXTMOD" = "" ] ; then
OPTIONS="--dir $srctree $COCCIINCLUDE"
else
OPTIONS="--dir $KBUILD_EXTMOD $COCCIINCLUDE"
fi
OPTIONS="--dir $srcroot $COCCIINCLUDE"
KBUILD_EXTMOD is set when an explicit target with M= is used. For both cases
the spatch ``--dir`` argument is used, as such third rule applies when whether
M= is used or not, and when M= is used the target directory can have its own
.cocciconfig file. When M= is not passed as an argument to coccicheck the
target directory is the same as the directory from where spatch was called.
Here, $srcroot refers to the source directory of the target: it points to the
external module's source directory when M= used, and otherwise, to the kernel
source directory. The third rule ensures the spatch reads the .cocciconfig from
the target directory, allowing external modules to have their own .cocciconfig
file.
If not using the kernel's coccicheck target, keep the above precedence
order logic of .cocciconfig reading. If using the kernel's coccicheck target,

2
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@ -34,6 +34,8 @@ Documentation/dev-tools/testing-overview.rst
ktap
checkuapi
gpio-sloppy-logic-analyzer
autofdo
propeller
.. only:: subproject and html

162
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@ -0,0 +1,162 @@
.. SPDX-License-Identifier: GPL-2.0
=====================================
Using Propeller with the Linux kernel
=====================================
This enables Propeller build support for the kernel when using Clang
compiler. Propeller is a profile-guided optimization (PGO) method used
to optimize binary executables. Like AutoFDO, it utilizes hardware
sampling to gather information about the frequency of execution of
different code paths within a binary. Unlike AutoFDO, this information
is then used right before linking phase to optimize (among others)
block layout within and across functions.
A few important notes about adopting Propeller optimization:
#. Although it can be used as a standalone optimization step, it is
strongly recommended to apply Propeller on top of AutoFDO,
AutoFDO+ThinLTO or Instrument FDO. The rest of this document
assumes this paradigm.
#. Propeller uses another round of profiling on top of
AutoFDO/AutoFDO+ThinLTO/iFDO. The whole build process involves
"build-afdo - train-afdo - build-propeller - train-propeller -
build-optimized".
#. Propeller requires LLVM 19 release or later for Clang/Clang++
and the linker(ld.lld).
#. In addition to LLVM toolchain, Propeller requires a profiling
conversion tool: https://github.com/google/autofdo with a release
after v0.30.1: https://github.com/google/autofdo/releases/tag/v0.30.1.
The Propeller optimization process involves the following steps:
#. Initial building: Build the AutoFDO or AutoFDO+ThinLTO binary as
you would normally do, but with a set of compile-time / link-time
flags, so that a special metadata section is created within the
kernel binary. The special section is only intend to be used by the
profiling tool, it is not part of the runtime image, nor does it
change kernel run time text sections.
#. Profiling: The above kernel is then run with a representative
workload to gather execution frequency data. This data is collected
using hardware sampling, via perf. Propeller is most effective on
platforms supporting advanced PMU features like LBR on Intel
machines. This step is the same as profiling the kernel for AutoFDO
(the exact perf parameters can be different).
#. Propeller profile generation: Perf output file is converted to a
pair of Propeller profiles via an offline tool.
#. Optimized build: Build the AutoFDO or AutoFDO+ThinLTO optimized
binary as you would normally do, but with a compile-time /
link-time flag to pick up the Propeller compile time and link time
profiles. This build step uses 3 profiles - the AutoFDO profile,
the Propeller compile-time profile and the Propeller link-time
profile.
#. Deployment: The optimized kernel binary is deployed and used
in production environments, providing improved performance
and reduced latency.
Preparation
===========
Configure the kernel with::
CONFIG_AUTOFDO_CLANG=y
CONFIG_PROPELLER_CLANG=y
Customization
=============
The default CONFIG_PROPELLER_CLANG setting covers kernel space objects
for Propeller builds. One can, however, enable or disable Propeller build
for individual files and directories by adding a line similar to the
following to the respective kernel Makefile:
- For enabling a single file (e.g. foo.o)::
PROPELLER_PROFILE_foo.o := y
- For enabling all files in one directory::
PROPELLER_PROFILE := y
- For disabling one file::
PROPELLER_PROFILE_foo.o := n
- For disabling all files in one directory::
PROPELLER__PROFILE := n
Workflow
========
Here is an example workflow for building an AutoFDO+Propeller kernel:
1) Assuming an AutoFDO profile is already collected following
instructions in the AutoFDO document, build the kernel on the host
machine, with AutoFDO and Propeller build configs ::
CONFIG_AUTOFDO_CLANG=y
CONFIG_PROPELLER_CLANG=y
and ::
$ make LLVM=1 CLANG_AUTOFDO_PROFILE=<autofdo-profile-name>
2) Install the kernel on the test machine.
3) Run the load tests. The '-c' option in perf specifies the sample
event period. We suggest using a suitable prime number, like 500009,
for this purpose.
- For Intel platforms::
$ perf record -e BR_INST_RETIRED.NEAR_TAKEN:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
- For AMD platforms::
$ perf record --pfm-event RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
Note you can repeat the above steps to collect multiple <perf_file>s.
4) (Optional) Download the raw perf file(s) to the host machine.
5) Use the create_llvm_prof tool (https://github.com/google/autofdo) to
generate Propeller profile. ::
$ create_llvm_prof --binary=<vmlinux> --profile=<perf_file>
--format=propeller --propeller_output_module_name
--out=<propeller_profile_prefix>_cc_profile.txt
--propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
"<propeller_profile_prefix>" can be something like "/home/user/dir/any_string".
This command generates a pair of Propeller profiles:
"<propeller_profile_prefix>_cc_profile.txt" and
"<propeller_profile_prefix>_ld_profile.txt".
If there are more than 1 perf_file collected in the previous step,
you can create a temp list file "<perf_file_list>" with each line
containing one perf file name and run::
$ create_llvm_prof --binary=<vmlinux> --profile=@<perf_file_list>
--format=propeller --propeller_output_module_name
--out=<propeller_profile_prefix>_cc_profile.txt
--propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
6) Rebuild the kernel using the AutoFDO and Propeller
profiles. ::
CONFIG_AUTOFDO_CLANG=y
CONFIG_PROPELLER_CLANG=y
and ::
$ make LLVM=1 CLANG_AUTOFDO_PROFILE=<profile_file> CLANG_PROPELLER_PROFILE_PREFIX=<propeller_profile_prefix>

42
Documentation/devicetree/bindings/arm/airoha,en7581-chip-scu.yaml Normal file
View File

@ -0,0 +1,42 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/airoha,en7581-chip-scu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Airoha Chip SCU Controller for EN7581 SoC
maintainers:
- Lorenzo Bianconi <lorenzo@kernel.org>
description:
The airoha chip-scu block provides a configuration interface for clock,
io-muxing and other functionalities used by multiple controllers (e.g. clock,
pinctrl, ecc) on EN7581 SoC.
properties:
compatible:
items:
- enum:
- airoha,en7581-chip-scu
- const: syscon
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
soc {
#address-cells = <2>;
#size-cells = <2>;
syscon@1fa20000 {
compatible = "airoha,en7581-chip-scu", "syscon";
reg = <0x0 0x1fa20000 0x0 0x388>;
};
};

46
Documentation/devicetree/bindings/connector/usb-connector.yaml
View File

@ -253,6 +253,46 @@ properties:
additionalProperties: false
sink-wait-cap-time-ms:
description: Represents the max time in ms that USB Type-C port (in sink
role) should wait for the port partner (source role) to send source caps.
SinkWaitCap timer starts when port in sink role attaches to the source.
This timer will stop when sink receives PD source cap advertisement before
timeout in which case it'll move to capability negotiation stage. A
timeout leads to a hard reset message by the port.
minimum: 310
maximum: 620
default: 310
ps-source-off-time-ms:
description: Represents the max time in ms that a DRP in source role should
take to turn off power after the PsSourceOff timer starts. PsSourceOff
timer starts when a sink's PHY layer receives EOP of the GoodCRC message
(corresponding to an Accept message sent in response to a PR_Swap or a
FR_Swap request). This timer stops when last bit of GoodCRC EOP
corresponding to the received PS_RDY message is transmitted by the PHY
layer. A timeout shall lead to error recovery in the type-c port.
minimum: 750
maximum: 920
default: 920
cc-debounce-time-ms:
description: Represents the max time in ms that a port shall wait to
determine if it's attached to a partner.
minimum: 100
maximum: 200
default: 200
sink-bc12-completion-time-ms:
description: Represents the max time in ms that a port in sink role takes
to complete Battery Charger (BC1.2) Detection. BC1.2 detection is a
hardware mechanism, which in some TCPC implementations, can run in
parallel once the Type-C connection state machine reaches the "potential
connect as sink" state. In TCPCs where this causes delays to respond to
the incoming PD messages, sink-bc12-completion-time-ms is used to delay
PD negotiation till BC1.2 detection completes.
default: 0
dependencies:
sink-vdos-v1: [ sink-vdos ]
sink-vdos: [ sink-vdos-v1 ]
@ -380,7 +420,7 @@ examples:
};
# USB-C connector attached to a typec port controller(ptn5110), which has
# power delivery support and enables drp.
# power delivery support, explicitly defines time properties and enables drp.
- |
#include <dt-bindings/usb/pd.h>
typec: ptn5110 {
@ -393,6 +433,10 @@ examples:
sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)
PDO_VAR(5000, 12000, 2000)>;
op-sink-microwatt = <10000000>;
sink-wait-cap-time-ms = <465>;
ps-source-off-time-ms = <835>;
cc-debounce-time-ms = <101>;
sink-bc12-completion-time-ms = <500>;
};
};

1
Documentation/devicetree/bindings/dma/qcom,gpi.yaml
View File

@ -26,6 +26,7 @@ properties:
- enum:
- qcom,qcm2290-gpi-dma
- qcom,qdu1000-gpi-dma
- qcom,sar2130p-gpi-dma
- qcom,sc7280-gpi-dma
- qcom,sdx75-gpi-dma
- qcom,sm6115-gpi-dma

29
Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
View File

@ -4,18 +4,16 @@
$id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller
title: Renesas RZ DMA Controller
maintainers:
- Biju Das <biju.das.jz@bp.renesas.com>
allOf:
- $ref: dma-controller.yaml#
properties:
compatible:
items:
- enum:
- renesas,r7s72100-dmac # RZ/A1H
- renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
- renesas,r9a07g044-dmac # RZ/G2{L,LC}
- renesas,r9a07g054-dmac # RZ/V2L
@ -93,13 +91,26 @@ required:
- reg
- interrupts
- interrupt-names
- clocks
- clock-names
- '#dma-cells'
- dma-channels
- power-domains
- resets
- reset-names
allOf:
- $ref: dma-controller.yaml#
- if:
not:
properties:
compatible:
contains:
enum:
- renesas,r7s72100-dmac
then:
required:
- clocks
- clock-names
- power-domains
- resets
- reset-names
additionalProperties: false

15
Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
View File

@ -27,11 +27,16 @@ allOf:
properties:
compatible:
items:
- enum:
- microchip,mpfs-pdma
- sifive,fu540-c000-pdma
- const: sifive,pdma0
oneOf:
- items:
- const: microchip,pic64gx-pdma
- const: microchip,mpfs-pdma
- const: sifive,pdma0
- items:
- enum:
- microchip,mpfs-pdma
- sifive,fu540-c000-pdma
- const: sifive,pdma0
description:
Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
Supported compatible strings are -

6
Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml
View File

@ -96,6 +96,12 @@ properties:
including the update of the LLI if any
0x3: at channel level, the transfer complete event is generated at the
end of the last LLI
-bit 16: Prevent packing/unpacking mode
0x0: pack/unpack enabled when source data width/burst != destination data width/burst
0x1: memory data width/burst forced to peripheral data width/burst to prevent pack/unpack
-bit 17: Prevent additional transfers due to linked-list refactoring
0x0: don't prevent additional transfers for optimal performance
0x1: prevent additional transfer to accommodate user constraints such as single transfer
required:
- compatible

1
Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
View File

@ -33,6 +33,7 @@ properties:
- allwinner,sun50i-a100-i2c
- allwinner,sun50i-h616-i2c
- allwinner,sun50i-r329-i2c
- allwinner,sun55i-a523-i2c
- const: allwinner,sun8i-v536-i2c
- const: allwinner,sun6i-a31-i2c
- const: marvell,mv64xxx-i2c

18
Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
View File

@ -97,6 +97,22 @@ properties:
- const: tx
- const: rx
snps,bus-capacitance-pf:
$ref: /schemas/types.yaml#/definitions/uint32
description:
This property indicates the bus capacitance in picofarads (pF).
This value is used to compute the tHIGH and tLOW periods for high speed
mode.
enum: [100, 400]
default: 100
snps,clk-freq-optimized:
description:
This property indicates whether the hardware reduce its clock frequency
by reducing the internal latency required to generate the high period and
low period of SCL line.
type: boolean
unevaluatedProperties: false
required:
@ -121,6 +137,8 @@ examples:
i2c-sda-hold-time-ns = <300>;
i2c-sda-falling-time-ns = <300>;
i2c-scl-falling-time-ns = <300>;
snps,bus-capacitance-pf = <400>;
snps,clk-freq-optimized;
};
- |
i2c@2000 {

13
Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml
View File

@ -22,6 +22,7 @@ select:
enum:
- st,nomadik-i2c
- mobileye,eyeq5-i2c
- mobileye,eyeq6h-i2c
required:
- compatible
@ -29,15 +30,15 @@ properties:
compatible:
oneOf:
- items:
- const: st,nomadik-i2c
- enum:
- st,nomadik-i2c
- mobileye,eyeq5-i2c
- mobileye,eyeq6h-i2c
- const: arm,primecell
- items:
- const: stericsson,db8500-i2c
- const: st,nomadik-i2c
- const: arm,primecell
- items:
- const: mobileye,eyeq5-i2c
- const: arm,primecell
reg:
maxItems: 1
@ -54,7 +55,7 @@ properties:
- items:
- const: mclk
- const: apb_pclk
# Clock name in DB8500 or EyeQ5
# Clock name in DB8500 or EyeQ
- items:
- const: i2cclk
- const: apb_pclk
@ -67,7 +68,7 @@ properties:
clock-frequency:
minimum: 1
maximum: 400000
maximum: 3400000
mobileye,olb:
$ref: /schemas/types.yaml#/definitions/phandle-array

4
Documentation/devicetree/bindings/iio/adc/adc.yaml
View File

@ -37,6 +37,10 @@ properties:
to both the positive and negative inputs of a differential ADC.
The first value specifies the positive input pin, the second
specifies the negative input pin.
There are also some ADCs, where the differential channel has dedicated
positive and negative inputs which can be used to measure differential
voltage levels. For those setups, this property can be configured with
the 'reg' property for both inputs (i.e. diff-channels = <reg reg>).
single-channel:
$ref: /schemas/types.yaml#/definitions/uint32

3
Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml
View File

@ -28,6 +28,7 @@ description: |
Datasheets for supported chips:
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4111.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4112.pdf
<AD4113: not released yet>
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4114.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4115.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4116.pdf
@ -44,6 +45,7 @@ properties:
enum:
- adi,ad4111
- adi,ad4112
- adi,ad4113
- adi,ad4114
- adi,ad4115
- adi,ad4116
@ -331,6 +333,7 @@ allOf:
enum:
- adi,ad4111
- adi,ad4112
- adi,ad4113
- adi,ad4114
- adi,ad4115
- adi,ad4116

120
Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
View File

@ -25,6 +25,8 @@ description: |
* https://www.analog.com/en/products/ad7386-4.html
* https://www.analog.com/en/products/ad7387-4.html
* https://www.analog.com/en/products/ad7388-4.html
* https://www.analog.com/en/products/adaq4370-4.html
* https://www.analog.com/en/products/adaq4380-4.html
$ref: /schemas/spi/spi-peripheral-props.yaml#
@ -46,6 +48,8 @@ properties:
- adi,ad7386-4
- adi,ad7387-4
- adi,ad7388-4
- adi,adaq4370-4
- adi,adaq4380-4
reg:
maxItems: 1
@ -70,6 +74,20 @@ properties:
refin-supply:
description:
A 2.5V to 3.3V supply for external reference voltage, for ad7380-4 only.
For adaq devices, a 5V supply voltage. A 3.3V internal reference is
derived from it. Connect to vs-p-supply for normal operation.
vs-p-supply:
description:
Amplifiers positive supply.
vs-n-supply:
description:
Amplifiers negative supply.
ldo-supply:
description:
LDO supply. Connect to vs-p-supply or a 3.6 to 5.5 V supply.
aina-supply:
description:
@ -97,12 +115,45 @@ properties:
specify the ALERT interrupt.
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 0
required:
- compatible
- reg
- vcc-supply
- vlogic-supply
patternProperties:
"^channel@[0-3]$":
$ref: adc.yaml
type: object
properties:
reg:
description:
The channel number. From 0 to 3 corresponding to channels A,B,C,D
minimum: 0
maximum: 3
adi,gain-milli:
description:
The hardware gain applied to the ADC input (in milli units).
If not present, default to 1000 (no actual gain applied).
Refer to the typical connection diagrams section of the datasheet for
pin wiring.
$ref: /schemas/types.yaml#/definitions/uint16
enum: [300, 600, 1000, 1600]
default: 1000
required:
- reg
additionalProperties: false
unevaluatedProperties: false
allOf:
@ -140,6 +191,7 @@ allOf:
aind-supply: false
# ad7380-4 uses refin-supply as external reference.
# adaq devices use internal reference only, derived from refin-supply
# All other chips from ad738x family use refio as optional external reference.
# When refio-supply is omitted, internal reference is used.
- if:
@ -147,6 +199,8 @@ allOf:
compatible:
enum:
- adi,ad7380-4
- adi,adaq4370-4
- adi,adaq4380-4
then:
properties:
refio-supply: false
@ -156,6 +210,27 @@ allOf:
properties:
refin-supply: false
# adaq devices need more supplies and using channel to declare gain property
# only applies to adaq devices
- if:
properties:
compatible:
enum:
- adi,adaq4370-4
- adi,adaq4380-4
then:
required:
- vs-p-supply
- vs-n-supply
- ldo-supply
else:
properties:
vs-p-supply: false
vs-n-supply: false
ldo-supply: false
patternProperties:
"^channel@[0-3]$": false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
@ -180,3 +255,48 @@ examples:
refio-supply = <&supply_2_5V>;
};
};
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,adaq4380-4";
reg = <0>;
spi-cpol;
spi-cpha;
spi-max-frequency = <80000000>;
interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio0>;
vcc-supply = <&supply_3_3V>;
vlogic-supply = <&supply_3_3V>;
refin-supply = <&supply_5V>;
vs-p-supply = <&supply_5V>;
vs-n-supply = <&supply_0V>;
ldo-supply = <&supply_5V>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
adi,gain-milli = /bits/ 16 <300>;
};
channel@2 {
reg = <2>;
adi,gain-milli = /bits/ 16 <600>;
};
channel@3 {
reg = <3>;
adi,gain-milli = /bits/ 16 <1000>;
};
};
};

199
Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml
View File

@ -14,6 +14,11 @@ description: |
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-16.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-18.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7607.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7608.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7609.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
properties:
@ -24,11 +29,27 @@ properties:
- adi,ad7606-6
- adi,ad7606-8 # Referred to as AD7606 (without -8) in the datasheet
- adi,ad7606b
- adi,ad7606c-16
- adi,ad7606c-18
- adi,ad7607
- adi,ad7608
- adi,ad7609
- adi,ad7616
reg:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 0
# According to the datasheet, "Data is clocked in from SDI on the falling
# edge of SCLK, while data is clocked out on DOUTA on the rising edge of
# SCLK". Also, even if not stated textually in the datasheet, it is made
# clear on the diagrams that sclk idles at high. Subsequently, in case SPI
# interface is used, the correct way is to only set spi-cpol.
spi-cpha: true
spi-cpol: true
@ -114,18 +135,91 @@ properties:
assumed that the pins are hardwired to VDD.
type: boolean
pwms:
description:
In case the conversion is triggered by a PWM instead of a GPIO plugged to
the CONVST pin, the PWM must be referenced.
The first is the PWM connected to CONVST or CONVST1 for the chips with the
2nd PWM connected to CONVST2, if CONVST2 is available and not shorted to
CONVST1.
minItems: 1
maxItems: 2
pwm-names:
items:
- const: convst1
- const: convst2
io-backends:
description:
A reference to the iio-backend, which is responsible handling the BUSY
pin's falling edge and communication.
An example of backend can be found at
http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html
patternProperties:
"^channel@[1-8]$":
type: object
$ref: adc.yaml
unevaluatedProperties: false
properties:
reg:
description:
The channel number, as specified in the datasheet (from 1 to 8).
minimum: 1
maximum: 8
diff-channels:
description:
Each channel can be configured as a bipolar differential channel.
The ADC uses the same positive and negative inputs for this.
This property must be specified as 'reg' (or the channel number) for
both positive and negative inputs (i.e. diff-channels = <reg reg>).
Since the configuration is bipolar differential, the 'bipolar'
property is required.
items:
minimum: 1
maximum: 8
bipolar:
description:
The ADC channels can be configured as
* Bipolar single-ended
* Unipolar single-ended
* Bipolar differential
Therefore in the DT, if no channel node is specified, it is considered
'unipolar single-ended'. So for the other configurations the 'bipolar'
property must be specified. If 'diff-channels' is specified, it is
considered a bipolar differential channel. Otherwise it is bipolar
single-ended.
required:
- reg
- bipolar
required:
- compatible
- reg
- spi-cpha
- avcc-supply
- vdrive-supply
- interrupts
- adi,conversion-start-gpios
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- oneOf:
- required:
- adi,conversion-start-gpios
- required:
- pwms
- oneOf:
- required:
- interrupts
- required:
- io-backends
- if:
properties:
compatible:
@ -162,17 +256,66 @@ allOf:
- adi,ad7606-4
- adi,ad7606-6
- adi,ad7606-8
- adi,ad7607
- adi,ad7608
- adi,ad7609
then:
properties:
adi,sw-mode: false
else:
properties:
pwms:
maxItems: 1
pwm-names:
maxItems: 1
adi,conversion-start-gpios:
maxItems: 1
- if:
not:
required:
- adi,sw-mode
then:
patternProperties:
"^channel@[1-8]$": false
- if:
not:
properties:
compatible:
enum:
- adi,ad7606c-16
- adi,ad7606c-18
then:
patternProperties:
"^channel@[1-8]$": false
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
iio-backend {
#address-cells = <1>;
#size-cells = <0>;
adi_adc@0 {
compatible = "adi,ad7606b";
reg = <0>;
pwms = <&axi_pwm_gen 0 0>;
avcc-supply = <&adc_vref>;
vdrive-supply = <&vdd_supply>;
reset-gpios = <&gpio0 91 GPIO_ACTIVE_HIGH>;
standby-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>;
adi,range-gpios = <&gpio0 89 GPIO_ACTIVE_HIGH>;
adi,oversampling-ratio-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH
&gpio0 87 GPIO_ACTIVE_HIGH
&gpio0 86 GPIO_ACTIVE_HIGH>;
io-backends = <&iio_backend>;
};
};
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
@ -185,7 +328,6 @@ examples:
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
spi-cpha;
avcc-supply = <&adc_vref>;
vdrive-supply = <&vdd_supply>;
@ -202,4 +344,53 @@ examples:
standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
};
};
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad7606c-18";
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
avcc-supply = <&adc_vref>;
vdrive-supply = <&vdd_supply>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio>;
adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
adi,first-data-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
adi,sw-mode;
channel@1 {
reg = <1>;
diff-channels = <1 1>;
bipolar;
};
channel@3 {
reg = <3>;
bipolar;
};
channel@8 {
reg = <8>;
diff-channels = <8 8>;
bipolar;
};
};
};
...

176
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@ -0,0 +1,176 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad7625.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices Fast PulSAR Analog to Digital Converters
maintainers:
- Michael Hennerich <Michael.Hennerich@analog.com>
- Nuno Sá <nuno.sa@analog.com>
description: |
A family of single channel differential analog to digital converters.
* https://www.analog.com/en/products/ad7625.html
* https://www.analog.com/en/products/ad7626.html
* https://www.analog.com/en/products/ad7960.html
* https://www.analog.com/en/products/ad7961.html
properties:
compatible:
enum:
- adi,ad7625
- adi,ad7626
- adi,ad7960
- adi,ad7961
vdd1-supply: true
vdd2-supply: true
vio-supply: true
ref-supply:
description:
Voltage regulator for the external reference voltage (REF).
refin-supply:
description:
Voltage regulator for the reference buffer input (REFIN).
clocks:
description:
The clock connected to the CLK pins, gated by the clk_gate PWM.
maxItems: 1
pwms:
items:
- description: PWM connected to the CNV input on the ADC.
- description: PWM that gates the clock connected to the ADC's CLK input.
pwm-names:
items:
- const: cnv
- const: clk_gate
io-backends:
description:
The AXI ADC IP block connected to the D+/- and DCO+/- lines of the
ADC. An example backend can be found at
http://analogdevicesinc.github.io/hdl/projects/pulsar_lvds/index.html.
maxItems: 1
adi,no-dco:
$ref: /schemas/types.yaml#/definitions/flag
description:
Indicates the wiring of the DCO+/- lines. If true, then they are
grounded and the device is in self-clocked mode. If this is not
present, then the device is in echoed clock mode.
adi,en0-always-on:
$ref: /schemas/types.yaml#/definitions/flag
description:
Indicates if EN0 is hard-wired to the high state. If neither this
nor en0-gpios are present, then EN0 is hard-wired low.
adi,en1-always-on:
$ref: /schemas/types.yaml#/definitions/flag
description:
Indicates if EN1 is hard-wired to the high state. If neither this
nor en1-gpios are present, then EN1 is hard-wired low.
adi,en2-always-on:
$ref: /schemas/types.yaml#/definitions/flag
description:
Indicates if EN2 is hard-wired to the high state. If neither this
nor en2-gpios are present, then EN2 is hard-wired low.
adi,en3-always-on:
$ref: /schemas/types.yaml#/definitions/flag
description:
Indicates if EN3 is hard-wired to the high state. If neither this
nor en3-gpios are present, then EN3 is hard-wired low.
en0-gpios:
description:
Configurable EN0 pin.
en1-gpios:
description:
Configurable EN1 pin.
en2-gpios:
description:
Configurable EN2 pin.
en3-gpios:
description:
Configurable EN3 pin.
required:
- compatible
- vdd1-supply
- vdd2-supply
- vio-supply
- clocks
- pwms
- pwm-names
- io-backends
allOf:
- if:
required:
- ref-supply
then:
properties:
refin-supply: false
- if:
required:
- refin-supply
then:
properties:
ref-supply: false
- if:
properties:
compatible:
contains:
enum:
- adi,ad7625
- adi,ad7626
then:
properties:
en2-gpios: false
en3-gpios: false
adi,en2-always-on: false
adi,en3-always-on: false
- if:
properties:
compatible:
contains:
enum:
- adi,ad7960
- adi,ad7961
then:
# ad796x parts must have one of the two supplies
oneOf:
- required: [ref-supply]
- required: [refin-supply]
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
adc {
compatible = "adi,ad7625";
vdd1-supply = <&supply_5V>;
vdd2-supply = <&supply_2_5V>;
vio-supply = <&supply_2_5V>;
io-backends = <&axi_adc>;
clocks = <&ref_clk>;
pwms = <&axi_pwm_gen 0 0>, <&axi_pwm_gen 1 0>;
pwm-names = "cnv", "clk_gate";
en0-gpios = <&gpio0 86 GPIO_ACTIVE_HIGH>;
en1-gpios = <&gpio0 87 GPIO_ACTIVE_HIGH>;
};

110
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@ -0,0 +1,110 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad7779.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD777X family 8-Channel, 24-Bit, Simultaneous Sampling ADCs
maintainers:
- Ramona Nechita <ramona.nechita@analog.com>
description: |
The AD777X family consist of 8-channel, simultaneous sampling analog-to-
digital converter (ADC). Eight full Σ-Δ ADCs are on-chip. The
AD7771 provides an ultralow input current to allow direct sensor
connection. Each input channel has a programmable gain stage
allowing gains of 1, 2, 4, and 8 to map lower amplitude sensor
outputs into the full-scale ADC input range, maximizing the
dynamic range of the signal chain.
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7770.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7771.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7779.pdf
$ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
enum:
- adi,ad7770
- adi,ad7771
- adi,ad7779
reg:
maxItems: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
clocks:
maxItems: 1
avdd1-supply:
description: Front-End analog supply AVDD1. Can be used as conversion ref.
avdd2-supply:
description: AVDD2 Analog Supply from 2.2 V to 3.6 V.
avdd4-supply:
description: AVDD4 SAR Analog Supply and Reference Source.
interrupts:
minItems: 1
items:
- description: |
adc_rdy: Interrupt line for DRDY signal which indicates the end of
conversion independently of the interface selected to read back the
Σ-∆ conversion.
- description: |
Alert: The chip includes self diagnostic features to guarantee the
correct operation. If an error is detected, the ALERT pin is pulled
high to generate an external interruption to the controller.
interrupt-names:
minItems: 1
maxItems: 2
items:
enum:
- adc_rdy
- alert
start-gpios:
description:
Pin that controls start synchronization pulse.
maxItems: 1
reset-gpios:
maxItems: 1
required:
- compatible
- reg
- clocks
- interrupts
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad7779";
reg = <0>;
start-gpios = <&gpio0 87 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio0 93 GPIO_ACTIVE_LOW>;
interrupt-parent = <&intc>;
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "adc_rdy";
clocks = <&adc_clk>;
};
};
...

1
Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml
View File

@ -98,6 +98,7 @@ allOf:
compatible:
contains:
enum:
- amlogic,meson8-saradc
- amlogic,meson8b-saradc
- amlogic,meson8m2-saradc
then:

86
Documentation/devicetree/bindings/iio/adc/gehc,pmc-adc.yaml Normal file
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@ -0,0 +1,86 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/gehc,pmc-adc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: GE HealthCare PMC Analog to Digital Converter (ADC)
maintainers:
- Herve Codina <herve.codina@bootlin.com>
description:
The GE HealthCare PMC ADC is a 16-Channel (voltage and current), 16-Bit ADC
with an I2C Interface.
properties:
compatible:
const: gehc,pmc-adc
reg:
maxItems: 1
vdd-supply:
description:
Regulator for the VDD power supply.
vdda-supply:
description:
Regulator for the VDD analog (VDDA) power supply.
vddio-supply:
description:
Regulator for the VDD IO (VDDIO) power supply.
vref-supply:
description:
Regulator for the voltage reference power supply.
clocks:
maxItems: 1
description:
The component uses an external oscillator (osc) if an external oscillator
is connected to its clock pins. Otherwise, it uses an internal reference
clock.
clock-names:
items:
- const: osc
"#io-channel-cells":
const: 2
description: |
The first cell is the channel type (dt-bindings/iio/adc/gehc,pmc-adc.h
defines these values):
- 0: voltage
- 1: current
The second cell is the channel number from 0 to 15.
required:
- compatible
- reg
- vdd-supply
- vdda-supply
- vddio-supply
- vref-supply
- '#io-channel-cells'
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
adc@14 {
compatible = "gehc,pmc-adc";
reg = <0x14>;
vdd-supply = <&reg_vdd>;
vdda-supply = <&reg_vdda>;
vddio-supply = <&reg_vddio>;
vref-supply = <&reg_vref>;
#io-channel-cells = <2>;
};
};
...

9
Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
View File

@ -30,7 +30,7 @@ properties:
maxItems: 1
spi-max-frequency:
maximum: 30000000
maximum: 66000000
reset-gpios:
maxItems: 1
@ -60,6 +60,12 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3]
io-backends:
description: The iio backend reference.
Device can be optionally connected to the "axi-ad3552r IP" fpga-based
QSPI + DDR (Double Data Rate) controller to reach high speed transfers.
maxItems: 1
'#address-cells':
const: 1
@ -128,6 +134,7 @@ patternProperties:
- custom-output-range-config
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- if:
properties:
compatible:

39
Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml
View File

@ -26,16 +26,47 @@ properties:
vdd-supply: true
vss-supply: true
vcc-supply:
description:
Supply that powers the chip.
iovcc-supply:
description:
Supply for the digital interface.
vrefp-supply:
description:
Positive referance input voltage range. From 5v to (vdd - 2.5)
vrefn-supply:
description:
Negative referance input voltage range. From (vss + 2.5) to 0.
adi,rbuf-gain2-en:
description: Specify to allow an external amplifier to be connected in a
gain of two configuration.
type: boolean
reset-gpios:
maxItems: 1
clear-gpios:
maxItems: 1
ldac-gpios:
description:
LDAC pin to be used as a hardware trigger to update the DAC channels.
maxItems: 1
required:
- compatible
- reg
- vdd-supply
- vss-supply
- vcc-supply
- iovcc-supply
- vrefp-supply
- vrefn-supply
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
@ -44,6 +75,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
@ -53,6 +85,13 @@ examples:
reg = <0>;
vss-supply = <&dac_vss>;
vdd-supply = <&dac_vdd>;
vcc-supply = <&dac_vcc>;
iovcc-supply = <&dac_iovcc>;
vrefp-supply = <&dac_vrefp>;
vrefn-supply = <&dac_vrefn>;
reset-gpios = <&gpio_bd 16 GPIO_ACTIVE_LOW>;
clear-gpios = <&gpio_bd 17 GPIO_ACTIVE_LOW>;
ldac-gpios = <&gpio_bd 18 GPIO_ACTIVE_HIGH>;
};
};
...

164
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@ -0,0 +1,164 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2024 Analog Devices Inc.
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/dac/adi,ad8460.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD8460 DAC
maintainers:
- Mariel Tinaco <mariel.tinaco@analog.com>
description: |
Analog Devices AD8460 110 V High Voltage, 1 A High Current,
Arbitrary Waveform Generator with Integrated 14-Bit High Speed DAC
https://www.analog.com/media/en/technical-documentation/data-sheets/ad8460.pdf
properties:
compatible:
enum:
- adi,ad8460
reg:
maxItems: 1
clocks:
maxItems: 1
dmas:
maxItems: 1
dma-names:
items:
- const: tx
spi-max-frequency:
maximum: 20000000
hvcc-supply:
description: Positive high voltage power supply line
hvee-supply:
description: Negative high voltage power supply line
vcc-5v-supply:
description: Low voltage power supply
vref-5v-supply:
description: Reference voltage for analog low voltage
dvdd-3p3v-supply:
description: Digital supply bypass
avdd-3p3v-supply:
description: Analog supply bypass
refio-1p2v-supply:
description: Drive voltage in the range of 1.2V maximum to as low as
low as 0.12V through the REF_IO pin to adjust full scale output span
adi,external-resistor-ohms:
description: Specify value of external resistor connected to FS_ADJ pin
to establish internal HVDAC's reference current I_REF
minimum: 2000
maximum: 20000
default: 2000
adi,range-microvolt:
description: Voltage output range specified as <minimum, maximum>
items:
- minimum: -55000000
maximum: 0
default: 0
- minimum: 0
maximum: 55000000
default: 0
adi,range-microamp:
description: Current output range specified as <minimum, maximum>
items:
- minimum: -1000000
maximum: 0
default: 0
- minimum: 0
maximum: 1000000
default: 0
adi,max-millicelsius:
description: Overtemperature threshold
minimum: 0
maximum: 150000
default: 0
shutdown-reset-gpios:
description: Corresponds to SDN_RESET pin. To exit shutdown
or sleep mode, pulse SDN_RESET HIGH, then leave LOW.
maxItems: 1
reset-gpios:
description: Manual Power On Reset (POR). Pull this GPIO pin
LOW and then HIGH to reset all digital registers to default
maxItems: 1
shutdown-gpios:
description: Corresponds to SDN_IO pin. Shutdown may be
initiated by the user, by pulsing SDN_IO high. To exit shutdown,
pulse SDN_IO low, then float.
maxItems: 1
required:
- compatible
- reg
- clocks
- hvcc-supply
- hvee-supply
- vcc-5v-supply
- vref-5v-supply
- dvdd-3p3v-supply
- avdd-3p3v-supply
- refio-1p2v-supply
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
dac@0 {
compatible = "adi,ad8460";
reg = <0>;
spi-max-frequency = <8000000>;
dmas = <&tx_dma 0>;
dma-names = "tx";
shutdown-reset-gpios = <&gpio 86 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio 91 GPIO_ACTIVE_LOW>;
shutdown-gpios = <&gpio 88 GPIO_ACTIVE_HIGH>;
clocks = <&sync_ext_clk>;
hvcc-supply = <&hvcc>;
hvee-supply = <&hvee>;
vcc-5v-supply = <&vcc_5>;
vref-5v-supply = <&vref_5>;
dvdd-3p3v-supply = <&dvdd_3_3>;
avdd-3p3v-supply = <&avdd_3_3>;
refio-1p2v-supply = <&refio_1_2>;
adi,external-resistor-ohms = <2000>;
adi,range-microvolt = <(-40000000) 40000000>;
adi,range-microamp = <0 50000>;
adi,max-millicelsius = <50000>;
};
};
...

69
Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml
View File

@ -19,11 +19,13 @@ description: |
memory via DMA into the DAC.
https://wiki.analog.com/resources/fpga/docs/axi_dac_ip
https://analogdevicesinc.github.io/hdl/library/axi_ad3552r/index.html
properties:
compatible:
enum:
- adi,axi-dac-9.1.b
- adi,axi-ad3552r
reg:
maxItems: 1
@ -36,7 +38,14 @@ properties:
- const: tx
clocks:
maxItems: 1
minItems: 1
maxItems: 2
clock-names:
items:
- const: s_axi_aclk
- const: dac_clk
minItems: 1
'#io-backend-cells':
const: 0
@ -47,7 +56,29 @@ required:
- reg
- clocks
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
const: adi,axi-ad3552r
then:
$ref: /schemas/spi/spi-controller.yaml#
properties:
clocks:
minItems: 2
clock-names:
minItems: 2
required:
- clock-names
else:
properties:
clocks:
maxItems: 1
clock-names:
maxItems: 1
unevaluatedProperties: false
examples:
- |
@ -57,6 +88,38 @@ examples:
dmas = <&tx_dma 0>;
dma-names = "tx";
#io-backend-cells = <0>;
clocks = <&axi_clk>;
clocks = <&clkc 15>;
clock-names = "s_axi_aclk";
};
- |
#include <dt-bindings/gpio/gpio.h>
axi_dac: spi@44a70000 {
compatible = "adi,axi-ad3552r";
reg = <0x44a70000 0x1000>;
dmas = <&dac_tx_dma 0>;
dma-names = "tx";
#io-backend-cells = <0>;
clocks = <&clkc 15>, <&ref_clk>;
clock-names = "s_axi_aclk", "dac_clk";
#address-cells = <1>;
#size-cells = <0>;
dac@0 {
compatible = "adi,ad3552r";
reg = <0>;
reset-gpios = <&gpio0 92 GPIO_ACTIVE_HIGH>;
io-backends = <&axi_dac>;
spi-max-frequency = <20000000>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
adi,output-range-microvolt = <(-10000000) (10000000)>;
};
};
};
...

79
Documentation/devicetree/bindings/iio/imu/bosch,bmi270.yaml Normal file
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@ -0,0 +1,79 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/imu/bosch,bmi270.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Bosch BMI270 6-Axis IMU
maintainers:
- Alex Lanzano <lanzano.alex@gmail.com>
description: |
BMI270 is a 6-axis inertial measurement unit that can measure acceleration and
angular velocity. The sensor also supports configurable interrupt events such
as motion, step counter, and wrist motion gestures. The sensor can communicate
I2C or SPI.
https://www.bosch-sensortec.com/products/motion-sensors/imus/bmi270/
properties:
compatible:
enum:
- bosch,bmi260
- bosch,bmi270
reg:
maxItems: 1
vdd-supply: true
vddio-supply: true
interrupts:
minItems: 1
maxItems: 2
interrupt-names:
minItems: 1
maxItems: 2
items:
enum:
- INT1
- INT2
drive-open-drain:
description:
set if the specified interrupt pins should be configured as
open drain. If not set, defaults to push-pull.
mount-matrix:
description:
an optional 3x3 mounting rotation matrix.
required:
- compatible
- reg
- vdd-supply
- vddio-supply
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
imu@68 {
compatible = "bosch,bmi270";
reg = <0x68>;
vdd-supply = <&vdd>;
vddio-supply = <&vddio>;
interrupt-parent = <&gpio1>;
interrupts = <16 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT1";
};
};

51
Documentation/devicetree/bindings/iio/imu/bosch,smi240.yaml Normal file
View File

@ -0,0 +1,51 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/imu/bosch,smi240.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Bosch smi240 imu
maintainers:
- Jianping Shen <Jianping.Shen@de.bosch.com>
description:
Inertial Measurement Unit with Accelerometer and Gyroscope
with a measurement range of +/-300°/s and up to 16g.
https://www.bosch-semiconductors.com/mems-sensors/highly-automated-driving/smi240/
properties:
compatible:
const: bosch,smi240
reg:
maxItems: 1
vdd-supply: true
vddio-supply: true
required:
- compatible
- reg
- vdd-supply
- vddio-supply
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
imu@0 {
compatible = "bosch,smi240";
reg = <0>;
vdd-supply = <&vdd>;
vddio-supply = <&vddio>;
spi-max-frequency = <10000000>;
};
};

2
Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: InvenSense ICM-426xx Inertial Measurement Unit
maintainers:
- Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
- Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
description: |
6-axis MotionTracking device that combines a 3-axis gyroscope and a 3-axis

7
Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: InvenSense MPU-6050 Six-Axis (Gyro + Accelerometer) MEMS MotionTracking Device
maintainers:
- Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
- Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
description: |
These devices support both I2C and SPI bus interfaces.
@ -36,6 +36,11 @@ properties:
- items:
- const: invensense,icm20608d
- const: invensense,icm20608
- items:
- enum:
- invensense,iam20680hp
- invensense,iam20680ht
- const: invensense,iam20680
reg:
maxItems: 1

4
Documentation/devicetree/bindings/iio/light/ti,opt3001.yaml
View File

@ -15,7 +15,9 @@ description: |
properties:
compatible:
const: ti,opt3001
enum:
- ti,opt3001
- ti,opt3002
reg:
maxItems: 1

64
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@ -1,64 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/light/veml6030.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: VEML6030 Ambient Light Sensor (ALS)
maintainers:
- Rishi Gupta <gupt21@gmail.com>
description: |
Bindings for the ambient light sensor veml6030 from Vishay
Semiconductors over an i2c interface.
Irrespective of whether interrupt is used or not, application
can get the ALS and White channel reading from IIO raw interface.
If the interrupts are used, application will receive an IIO event
whenever configured threshold is crossed.
Specifications about the sensor can be found at:
https://www.vishay.com/docs/84366/veml6030.pdf
properties:
compatible:
enum:
- vishay,veml6030
reg:
description:
I2C address of the device.
enum:
- 0x10 # ADDR pin pulled down
- 0x48 # ADDR pin pulled up
interrupts:
description:
interrupt mapping for IRQ. Configure with IRQ_TYPE_LEVEL_LOW.
Refer to interrupt-controller/interrupts.txt for generic
interrupt client node bindings.
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
light-sensor@10 {
compatible = "vishay,veml6030";
reg = <0x10>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
};
};
...

107
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@ -0,0 +1,107 @@
# SPDX-License-Identifier: GPL-2.0+
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/light/vishay,veml6030.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: VEML3235, VEML6030, VEML6035 and VEML7700 Ambient Light Sensors (ALS)
maintainers:
- Rishi Gupta <gupt21@gmail.com>
description: |
Bindings for the ambient light sensors veml6030 and veml6035 from
Vishay Semiconductors over an i2c interface.
Irrespective of whether interrupt is used or not, application
can get the ALS and White channel reading from IIO raw interface.
If the interrupts are used, application will receive an IIO event
whenever configured threshold is crossed.
Specifications about the sensors can be found at:
https://www.vishay.com/docs/80131/veml3235.pdf
https://www.vishay.com/docs/84366/veml6030.pdf
https://www.vishay.com/docs/84889/veml6035.pdf
https://www.vishay.com/docs/84286/veml7700.pdf
properties:
compatible:
enum:
- vishay,veml3235
- vishay,veml6030
- vishay,veml6035
- vishay,veml7700
reg:
maxItems: 1
interrupts:
description:
interrupt mapping for IRQ. Configure with IRQ_TYPE_LEVEL_LOW.
Refer to interrupt-controller/interrupts.txt for generic
interrupt client node bindings.
maxItems: 1
vdd-supply: true
required:
- compatible
- reg
- vdd-supply
allOf:
- if:
properties:
compatible:
enum:
- vishay,veml6030
then:
properties:
reg:
enum:
- 0x10 # ADDR pin pulled down
- 0x48 # ADDR pin pulled up
- if:
properties:
compatible:
enum:
- vishay,veml6035
then:
properties:
reg:
enum:
- 0x29
- if:
properties:
compatible:
enum:
- vishay,veml3235
- vishay,veml7700
then:
properties:
reg:
enum:
- 0x10
interrupts: false
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
light-sensor@10 {
compatible = "vishay,veml6030";
reg = <0x10>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vdd>;
};
};
...

21
Documentation/devicetree/bindings/iio/light/vishay,veml6075.yaml
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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/iio/light/vishay,veml6075.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Vishay VEML6075 UVA/B and VEML6040 RGBW sensors
title: Vishay VEML6070 UVA, VEML6075 UVA/B and VEML6040 RGBW sensors
maintainers:
- Javier Carrasco <javier.carrasco.cruz@gmail.com>
@ -16,11 +16,19 @@ properties:
compatible:
enum:
- vishay,veml6040
- vishay,veml6070
- vishay,veml6075
reg:
maxItems: 1
vishay,rset-ohms:
description:
Resistor used to select the integration time.
default: 270000
minimum: 75000
maximum: 1200000
vdd-supply: true
required:
@ -28,6 +36,17 @@ required:
- reg
- vdd-supply
allOf:
- if:
properties:
compatible:
enum:
- vishay,veml6040
- vishay,veml6075
then:
properties:
vishay,rset-ohms: false
additionalProperties: false
examples:

46
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@ -0,0 +1,46 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/magnetometer/allegromicro,als31300.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allegro MicroSystems ALS31300 3-D Linear Hall Effect sensor
maintainers:
- Neil Armstrong <neil.armstrong@linaro.org>
properties:
$nodename:
pattern: '^magnetometer@[0-9a-f]+$'
compatible:
enum:
- allegromicro,als31300-500 # Factory configured at 500 Gauss input range
- allegromicro,als31300-1000 # Factory configured at 1000 Gauss input range
- allegromicro,als31300-2000 # Factory configured at 2000 Gauss input range
reg:
maxItems: 1
vcc-supply:
description: 5.5V supply
interrupts:
maxItems: 1
required:
- compatible
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
magnetometer@61 {
compatible = "allegromicro,als31300-500";
reg = <0x61>;
vcc-supply = <&hall_vcc>;
};
};

22
Documentation/devicetree/bindings/iio/pressure/bmp085.yaml
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@ -47,15 +47,33 @@ properties:
maxItems: 1
interrupts:
description:
interrupt mapping for IRQ (BMP085 only)
maxItems: 1
drive-open-drain:
description:
set if the interrupt pin should be configured as open drain.
If not set, defaults to push-pull configuration.
type: boolean
required:
- compatible
- vddd-supply
- vdda-supply
allOf:
- if:
properties:
compatible:
not:
contains:
enum:
- bosch,bmp085
- bosch,bmp380
- bosch,bmp580
then:
properties:
interrupts: false
additionalProperties: false
examples:

6
Documentation/devicetree/bindings/iio/temperature/ti,tmp006.yaml
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@ -23,6 +23,9 @@ properties:
vdd-supply:
description: provide VDD power to the sensor.
interrupts:
maxItems: 1
required:
- compatible
- reg
@ -31,6 +34,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
@ -38,5 +42,7 @@ examples:
compatible = "ti,tmp006";
reg = <0x40>;
vdd-supply = <&ldo4_reg>;
interrupt-parent = <&gpio1>;
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
};
};

1
Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml
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@ -28,6 +28,7 @@ properties:
- mediatek,mt6331-keys
- mediatek,mt6357-keys
- mediatek,mt6358-keys
- mediatek,mt6359-keys
- mediatek,mt6397-keys
power-off-time-sec: true

2
Documentation/devicetree/bindings/input/rotary-encoder.yaml
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@ -41,7 +41,7 @@ properties:
device, hence no steps need to be passed.
rotary-encoder,rollover:
$ref: /schemas/types.yaml#/definitions/int32
$ref: /schemas/types.yaml#/definitions/flag
description:
Automatic rollover when the rotary value becomes
greater than the specified steps or smaller than 0. For absolute axis only.

62
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@ -0,0 +1,62 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/input/touchscreen/novatek,nvt-ts.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Novatek NVT Touchscreen Controller
maintainers:
- Hans de Goede <hdegoede@redhat.com>
allOf:
- $ref: touchscreen.yaml#
properties:
compatible:
enum:
- novatek,nt11205-ts
- novatek,nt36672a-ts
reg:
maxItems: 1
interrupts:
maxItems: 1
reset-gpios:
maxItems: 1
vcc-supply: true
iovcc-supply: true
required:
- compatible
- reg
- interrupts
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
touchscreen@1 {
compatible = "novatek,nt36672a-ts";
reg = <0x01>;
interrupts-extended = <&tlmm 31 IRQ_TYPE_EDGE_RISING>;
reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l22a_2p85>;
iovcc-supply = <&vreg_l14a_1p8>;
pinctrl-0 = <&ts_int_default &ts_reset_default>;
pinctrl-1 = <&ts_int_sleep &ts_reset_sleep>;
pinctrl-names = "default", "sleep";
touchscreen-size-x = <1080>;
touchscreen-size-y = <2246>;
};
};
...

2
Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
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@ -26,6 +26,7 @@ properties:
- items:
- enum:
- qcom,qcm2290-cpu-bwmon
- qcom,qcs8300-cpu-bwmon
- qcom,sa8775p-cpu-bwmon
- qcom,sc7180-cpu-bwmon
- qcom,sc7280-cpu-bwmon
@ -40,6 +41,7 @@ properties:
- const: qcom,sdm845-bwmon # BWMON v4, unified register space
- items:
- enum:
- qcom,qcs8300-llcc-bwmon
- qcom,sa8775p-llcc-bwmon
- qcom,sc7180-llcc-bwmon
- qcom,sc8280xp-llcc-bwmon

73
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@ -0,0 +1,73 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,qcs615-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on QCS615
maintainers:
- Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
able to communicate with the BCM through the Resource State Coordinator (RSC)
associated with each execution environment. Provider nodes must point to at
least one RPMh device child node pertaining to their RSC and each provider
can map to multiple RPMh resources.
See also: include/dt-bindings/interconnect/qcom,qcs615-rpmh.h
properties:
compatible:
enum:
- qcom,qcs615-aggre1-noc
- qcom,qcs615-camnoc-virt
- qcom,qcs615-config-noc
- qcom,qcs615-dc-noc
- qcom,qcs615-gem-noc
- qcom,qcs615-ipa-virt
- qcom,qcs615-mc-virt
- qcom,qcs615-mmss-noc
- qcom,qcs615-system-noc
reg:
maxItems: 1
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,qcs615-camnoc-virt
- qcom,qcs615-ipa-virt
- qcom,qcs615-mc-virt
then:
properties:
reg: false
else:
required:
- reg
unevaluatedProperties: false
examples:
- |
gem_noc: interconnect@9680000 {
compatible = "qcom,qcs615-gem-noc";
reg = <0x9680000 0x3e200>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mc_virt: interconnect-2 {
compatible = "qcom,qcs615-mc-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};

72
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@ -0,0 +1,72 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,qcs8300-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on QCS8300
maintainers:
- Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM).
See also: include/dt-bindings/interconnect/qcom,qcs8300-rpmh.h
properties:
compatible:
enum:
- qcom,qcs8300-aggre1-noc
- qcom,qcs8300-aggre2-noc
- qcom,qcs8300-clk-virt
- qcom,qcs8300-config-noc
- qcom,qcs8300-dc-noc
- qcom,qcs8300-gem-noc
- qcom,qcs8300-gpdsp-anoc
- qcom,qcs8300-lpass-ag-noc
- qcom,qcs8300-mc-virt
- qcom,qcs8300-mmss-noc
- qcom,qcs8300-nspa-noc
- qcom,qcs8300-pcie-anoc
- qcom,qcs8300-system-noc
reg:
maxItems: 1
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,qcs8300-clk-virt
- qcom,qcs8300-mc-virt
then:
properties:
reg: false
else:
required:
- reg
unevaluatedProperties: false
examples:
- |
gem_noc: interconnect@9100000 {
compatible = "qcom,qcs8300-gem-noc";
reg = <0x9100000 0xf7080>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
clk_virt: interconnect-0 {
compatible = "qcom,qcs8300-clk-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};

117
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@ -0,0 +1,117 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sar2130p-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on SAR2130P
maintainers:
- Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
- Georgi Djakov <djakov@kernel.org>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
able to communicate with the BCM through the Resource State Coordinator (RSC)
associated with each execution environment. Provider nodes must point to at
least one RPMh device child node pertaining to their RSC and each provider
can map to multiple RPMh resources.
See also:: include/dt-bindings/interconnect/qcom,sar2130p-rpmh.h
properties:
compatible:
enum:
- qcom,sar2130p-clk-virt
- qcom,sar2130p-config-noc
- qcom,sar2130p-gem-noc
- qcom,sar2130p-lpass-ag-noc
- qcom,sar2130p-mc-virt
- qcom,sar2130p-mmss-noc
- qcom,sar2130p-nsp-noc
- qcom,sar2130p-pcie-anoc
- qcom,sar2130p-system-noc
reg:
maxItems: 1
clocks:
minItems: 1
maxItems: 2
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,sar2130p-clk-virt
- qcom,sar2130p-mc-virt
then:
properties:
reg: false
else:
required:
- reg
- if:
properties:
compatible:
contains:
enum:
- qcom,sar2130p-pcie-anoc
then:
properties:
clocks:
items:
- description: aggre-NOC PCIe AXI clock
- description: cfg-NOC PCIe a-NOC AHB clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sar2130p-system-noc
then:
properties:
clocks:
items:
- description: aggre USB3 PRIM AXI clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sar2130p-system-noc
- qcom,sar2130p-pcie-anoc
then:
required:
- clocks
else:
properties:
clocks: false
unevaluatedProperties: false
examples:
- |
clk_virt: interconnect-0 {
compatible = "qcom,sar2130p-clk-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@1680000 {
compatible = "qcom,sar2130p-system-noc";
reg = <0x01680000 0x29080>;
#interconnect-cells = <2>;
clocks = <&gcc_prim_axi_clk>;
qcom,bcm-voters = <&apps_bcm_voter>;
};

13
Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
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@ -15,6 +15,8 @@ properties:
reg:
oneOf:
- items:
- description: mailbox data registers
- items:
- description: mailbox control & data registers
- description: mailbox interrupt registers
@ -23,6 +25,7 @@ properties:
- description: mailbox control registers
- description: mailbox interrupt registers
- description: mailbox data registers
deprecated: true
interrupts:
maxItems: 1
@ -41,12 +44,12 @@ additionalProperties: false
examples:
- |
soc {
#address-cells = <2>;
#size-cells = <2>;
mbox: mailbox@37020000 {
#address-cells = <1>;
#size-cells = <1>;
mailbox@37020800 {
compatible = "microchip,mpfs-mailbox";
reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>,
<0x0 0x37020800 0x0 0x100>;
reg = <0x37020800 0x100>;
interrupt-parent = <&L1>;
interrupts = <96>;
#mbox-cells = <1>;

13
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
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@ -165,12 +165,13 @@ allOf:
- if:
properties:
compatible:
enum:
- qcom,msm8953-apcs-kpss-global
- qcom,msm8994-apcs-kpss-global
- qcom,msm8996-apcs-hmss-global
- qcom,qcm2290-apcs-hmss-global
- qcom,sdm845-apss-shared
contains:
enum:
- qcom,msm8953-apcs-kpss-global
- qcom,msm8994-apcs-kpss-global
- qcom,msm8996-apcs-hmss-global
- qcom,qcm2290-apcs-hmss-global
- qcom,sdm845-apss-shared
then:
properties:
clocks: false

2
Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
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@ -28,6 +28,7 @@ properties:
- qcom,qdu1000-ipcc
- qcom,sa8255p-ipcc
- qcom,sa8775p-ipcc
- qcom,sar2130p-ipcc
- qcom,sc7280-ipcc
- qcom,sc8280xp-ipcc
- qcom,sdx75-ipcc
@ -38,6 +39,7 @@ properties:
- qcom,sm8450-ipcc
- qcom,sm8550-ipcc
- qcom,sm8650-ipcc
- qcom,sm8750-ipcc
- qcom,x1e80100-ipcc
- const: qcom,ipcc

89
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@ -0,0 +1,89 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mailbox/thead,th1520-mbox.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: T-head TH1520 Mailbox Controller
description:
The T-head mailbox controller enables communication and coordination between
cores within the SoC by passing messages (e.g., data, status, and control)
through mailbox channels. It also allows one core to signal another processor
using interrupts via the Interrupt Controller Unit (ICU).
maintainers:
- Michal Wilczynski <m.wilczynski@samsung.com>
properties:
compatible:
const: thead,th1520-mbox
clocks:
items:
- description: Clock for the local mailbox
- description: Clock for remote ICU 0
- description: Clock for remote ICU 1
- description: Clock for remote ICU 2
clock-names:
items:
- const: clk-local
- const: clk-remote-icu0
- const: clk-remote-icu1
- const: clk-remote-icu2
reg:
items:
- description: Mailbox local base address
- description: Remote ICU 0 base address
- description: Remote ICU 1 base address
- description: Remote ICU 2 base address
reg-names:
items:
- const: local
- const: remote-icu0
- const: remote-icu1
- const: remote-icu2
interrupts:
maxItems: 1
'#mbox-cells':
const: 1
description:
The one and only cell describes destination CPU ID.
required:
- compatible
- clocks
- clock-names
- reg
- reg-names
- interrupts
- '#mbox-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/thead,th1520-clk-ap.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
mailbox@ffffc38000 {
compatible = "thead,th1520-mbox";
reg = <0xff 0xffc38000 0x0 0x4000>,
<0xff 0xffc44000 0x0 0x1000>,
<0xff 0xffc4c000 0x0 0x1000>,
<0xff 0xffc54000 0x0 0x1000>;
reg-names = "local", "remote-icu0", "remote-icu1", "remote-icu2";
clocks = <&clk CLK_MBOX0>, <&clk CLK_MBOX1>, <&clk CLK_MBOX2>,
<&clk CLK_MBOX3>;
clock-names = "clk-local", "clk-remote-icu0", "clk-remote-icu1",
"clk-remote-icu2";
interrupts = <28>;
#mbox-cells = <1>;
};
};

90
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@ -0,0 +1,90 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/airoha,en7581-gpio-sysctl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Airoha EN7581 GPIO System Controller
maintainers:
- Christian Marangi <ansuelsmth@gmail.com>
- Lorenzo Bianconi <lorenzo@kernel.org>
description:
Airoha EN7581 SoC GPIO system controller which provided a register map
for controlling the GPIO, pins and PWM of the SoC.
properties:
compatible:
items:
- const: airoha,en7581-gpio-sysctl
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
pinctrl:
type: object
$ref: /schemas/pinctrl/airoha,en7581-pinctrl.yaml
description:
Child node definition for EN7581 Pin controller
pwm:
type: object
$ref: /schemas/pwm/airoha,en7581-pwm.yaml
description:
Child node definition for EN7581 PWM controller
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
system-controller@1fbf0200 {
compatible = "airoha,en7581-gpio-sysctl", "syscon", "simple-mfd";
reg = <0x1fbf0200 0xc0>;
pinctrl {
compatible = "airoha,en7581-pinctrl";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
mmc-pins {
mux {
function = "emmc";
groups = "emmc";
};
};
mdio-pins {
mux {
function = "mdio";
groups = "mdio";
};
conf {
pins = "gpio2";
output-enable;
};
};
};
pwm {
compatible = "airoha,en7581-pwm";
#pwm-cells = <3>;
};
};

33
Documentation/devicetree/bindings/fuse/renesas,rcar-efuse.yaml → Documentation/devicetree/bindings/nvmem/renesas,rcar-efuse.yaml
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fuse/renesas,rcar-efuse.yaml#
$id: http://devicetree.org/schemas/nvmem/renesas,rcar-efuse.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: R-Car E-FUSE connected to PFC
@ -13,6 +13,9 @@ description:
The E-FUSE is a type of non-volatile memory, which is accessible through the
Pin Function Controller (PFC) on some R-Car Gen4 SoCs.
allOf:
- $ref: nvmem.yaml#
properties:
compatible:
enum:
@ -39,17 +42,27 @@ required:
- power-domains
- resets
additionalProperties: false
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
#include <dt-bindings/power/r8a779a0-sysc.h>
#include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
#include <dt-bindings/power/r8a779f0-sysc.h>
fuse: fuse@e6078800 {
compatible = "renesas,r8a779a0-efuse";
reg = <0xe6078800 0x100>;
clocks = <&cpg CPG_MOD 916>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 916>;
fuse@e6078800 {
compatible = "renesas,r8a779f0-efuse";
reg = <0xe6078800 0x200>;
clocks = <&cpg CPG_MOD 915>;
power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
resets = <&cpg 915>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
calib@144 {
reg = <0x144 0x08>;
};
};
};

17
Documentation/devicetree/bindings/fuse/renesas,rcar-otp.yaml → Documentation/devicetree/bindings/nvmem/renesas,rcar-otp.yaml
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fuse/renesas,rcar-otp.yaml#
$id: http://devicetree.org/schemas/nvmem/renesas,rcar-otp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: R-Car E-FUSE connected to OTP_MEM
@ -13,6 +13,9 @@ description:
The E-FUSE is a type of non-volatile memory, which is accessible through the
One-Time Programmable Memory (OTP_MEM) module on some R-Car Gen4 SoCs.
allOf:
- $ref: nvmem.yaml#
properties:
compatible:
enum:
@ -22,17 +25,19 @@ properties:
reg:
items:
- description: OTP_MEM_0
- description: OTP_MEM_1
- description: OTP_MEM_1.
The addresses of cells defined under the optional nvmem-layout
subnode are relative to this register bank.
required:
- compatible
- reg
additionalProperties: false
unevaluatedProperties: false
examples:
- |
otp: otp@e61be000 {
compatible = "renesas,r8a779g0-otp";
reg = <0xe61be000 0x1000>, <0xe61bf000 0x1000>;
otp@e61be000 {
compatible = "renesas,r8a779g0-otp";
reg = <0xe61be000 0x1000>, <0xe61bf000 0x1000>;
};

52
Documentation/devicetree/bindings/nvmem/sc27xx-efuse.txt
View File

@ -1,52 +0,0 @@
= Spreadtrum SC27XX PMIC eFuse device tree bindings =
Required properties:
- compatible: Should be one of the following.
"sprd,sc2720-efuse"
"sprd,sc2721-efuse"
"sprd,sc2723-efuse"
"sprd,sc2730-efuse"
"sprd,sc2731-efuse"
- reg: Specify the address offset of efuse controller.
- hwlocks: Reference to a phandle of a hwlock provider node.
= Data cells =
Are child nodes of eFuse, bindings of which as described in
bindings/nvmem/nvmem.txt
Example:
sc2731_pmic: pmic@0 {
compatible = "sprd,sc2731";
reg = <0>;
spi-max-frequency = <26000000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
efuse@380 {
compatible = "sprd,sc2731-efuse";
reg = <0x380>;
#address-cells = <1>;
#size-cells = <1>;
hwlocks = <&hwlock 12>;
/* Data cells */
thermal_calib: calib@10 {
reg = <0x10 0x2>;
};
};
};
= Data consumers =
Are device nodes which consume nvmem data cells.
Example:
thermal {
...
nvmem-cells = <&thermal_calib>;
nvmem-cell-names = "calibration";
};

68
Documentation/devicetree/bindings/nvmem/sprd,sc2731-efuse.yaml Normal file
View File

@ -0,0 +1,68 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/sprd,sc2731-efuse.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Spreadtrum SC27XX PMIC eFuse
maintainers:
- Orson Zhai <orsonzhai@gmail.com>
- Baolin Wang <baolin.wang7@gmail.com>
- Chunyan Zhang <zhang.lyra@gmail.com>
properties:
compatible:
enum:
- sprd,sc2720-efuse
- sprd,sc2721-efuse
- sprd,sc2723-efuse
- sprd,sc2730-efuse
- sprd,sc2731-efuse
reg:
maxItems: 1
hwlocks:
maxItems: 1
required:
- compatible
- reg
- hwlocks
allOf:
- $ref: nvmem.yaml#
- $ref: nvmem-deprecated-cells.yaml#
unevaluatedProperties: false
examples:
- |
pmic {
#address-cells = <1>;
#size-cells = <0>;
efuse@380 {
compatible = "sprd,sc2731-efuse";
reg = <0x380>;
hwlocks = <&hwlock 12>;
#address-cells = <1>;
#size-cells = <1>;
/* Data cells */
fgu_calib: calib@6 {
reg = <0x6 0x2>;
bits = <0 9>;
};
adc_big_scale: calib@24 {
reg = <0x24 0x2>;
};
adc_small_scale: calib@26 {
reg = <0x26 0x2>;
};
};
};
...

61
Documentation/devicetree/bindings/nvmem/sprd,ums312-efuse.yaml Normal file
View File

@ -0,0 +1,61 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/sprd,ums312-efuse.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Spreadtrum UMS312 eFuse
maintainers:
- Orson Zhai <orsonzhai@gmail.com>
- Baolin Wang <baolin.wang7@gmail.com>
- Chunyan Zhang <zhang.lyra@gmail.com>
properties:
compatible:
const: sprd,ums312-efuse
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: enable
hwlocks:
maxItems: 1
required:
- compatible
- reg
- clocks
- clock-names
- hwlocks
allOf:
- $ref: nvmem.yaml#
- $ref: nvmem-deprecated-cells.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/sprd,ums512-clk.h>
efuse@32240000 {
compatible = "sprd,ums312-efuse";
reg = <0x32240000 0x10000>;
clocks = <&aonapb_gate CLK_EFUSE_EB>;
clock-names = "enable";
hwlocks = <&hwlock 8>;
#address-cells = <1>;
#size-cells = <1>;
/* Data cells */
thermal_calib: calib@10 {
reg = <0x10 0x2>;
};
};
...

39
Documentation/devicetree/bindings/nvmem/sprd-efuse.txt
View File

@ -1,39 +0,0 @@
= Spreadtrum eFuse device tree bindings =
Required properties:
- compatible: Should be "sprd,ums312-efuse".
- reg: Specify the address offset of efuse controller.
- clock-names: Should be "enable".
- clocks: The phandle and specifier referencing the controller's clock.
- hwlocks: Reference to a phandle of a hwlock provider node.
= Data cells =
Are child nodes of eFuse, bindings of which as described in
bindings/nvmem/nvmem.txt
Example:
ap_efuse: efuse@32240000 {
compatible = "sprd,ums312-efuse";
reg = <0 0x32240000 0 0x10000>;
clock-names = "enable";
hwlocks = <&hwlock 8>;
clocks = <&aonapb_gate CLK_EFUSE_EB>;
/* Data cells */
thermal_calib: calib@10 {
reg = <0x10 0x2>;
};
};
= Data consumers =
Are device nodes which consume nvmem data cells.
Example:
thermal {
...
nvmem-cells = <&thermal_calib>;
nvmem-cell-names = "calibration";
};

40
Documentation/devicetree/bindings/nvmem/zii,rave-sp-eeprom.txt
View File

@ -1,40 +0,0 @@
Zodiac Inflight Innovations RAVE EEPROM Bindings
RAVE SP EEPROM device is a "MFD cell" device exposing physical EEPROM
attached to RAVE Supervisory Processor. It is expected that its Device
Tree node is specified as a child of the node corresponding to the
parent RAVE SP device (as documented in
Documentation/devicetree/bindings/mfd/zii,rave-sp.txt)
Required properties:
- compatible: Should be "zii,rave-sp-eeprom"
Optional properties:
- zii,eeprom-name: Unique EEPROM identifier describing its function in the
system. Will be used as created NVMEM deivce's name.
Data cells:
Data cells are child nodes of eerpom node, bindings for which are
documented in Documentation/devicetree/bindings/nvmem/nvmem.txt
Example:
rave-sp {
compatible = "zii,rave-sp-rdu1";
current-speed = <38400>;
eeprom@a4 {
compatible = "zii,rave-sp-eeprom";
reg = <0xa4 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
zii,eeprom-name = "main-eeprom";
wdt_timeout: wdt-timeout@81 {
reg = <0x81 2>;
};
};
}

54
Documentation/devicetree/bindings/nvmem/zii,rave-sp-eeprom.yaml Normal file
View File

@ -0,0 +1,54 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/zii,rave-sp-eeprom.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Zodiac Inflight Innovations RAVE EEPROM
maintainers:
- Frank Li <Frank.Li@nxp.com>
description:
RAVE SP EEPROM device is a "MFD cell" device exposing physical EEPROM
attached to RAVE Supervisory Processor. It is expected that its Device
Tree node is specified as a child of the node corresponding to the
parent RAVE SP device (as documented in
Documentation/devicetree/bindings/mfd/zii,rave-sp.yaml)
properties:
compatible:
const: zii,rave-sp-eeprom
reg:
maxItems: 1
zii,eeprom-name:
$ref: /schemas/types.yaml#/definitions/string
description:
Unique EEPROM identifier describing its function in the
system. Will be used as created NVMEM deivce's name.
required:
- compatible
allOf:
- $ref: nvmem.yaml#
- $ref: nvmem-deprecated-cells.yaml#
unevaluatedProperties: false
examples:
- |
eeprom@a4 {
compatible = "zii,rave-sp-eeprom";
reg = <0xa4 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
zii,eeprom-name = "main-eeprom";
wdt-timeout@81 {
reg = <0x81 2>;
};
};

20
Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
View File

@ -45,7 +45,25 @@ patternProperties:
clock-latency-ns: true
opp-hz: true
opp-microvolt: true
opp-supported-hw: true
opp-supported-hw:
items:
items:
- description:
The revision of the SoC the OPP is supported by.
This can be easily obtained from the datasheet of the
part being ordered/used. For example, it will be 0x01 for SR1.0
- description:
The eFuse bits that indicate the particular OPP is available.
The device datasheet has a table talking about Device Speed Grades.
This table is to be sorted with only the unique elements of the
MAXIMUM OPERATING FREQUENCY starting from the first row which
tells the lowest OPP, to the highest. The corresponding bits
need to be set based on N elements of speed grade the device supports.
So, if there are 3 possible unique MAXIMUM OPERATING FREQUENCY
in the table, then BIT(0) | (1) | (2) will be set, which means
the value shall be 0x7.
opp-suspend: true
turbo-mode: true

5
Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
View File

@ -149,7 +149,7 @@ allOf:
then:
properties:
clocks:
minItems: 4
minItems: 6
clock-names:
items:
@ -178,7 +178,7 @@ allOf:
then:
properties:
clocks:
minItems: 4
minItems: 6
clock-names:
items:
@ -207,6 +207,7 @@ allOf:
properties:
clocks:
minItems: 4
maxItems: 4
clock-names:
items:

11
Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
View File

@ -17,6 +17,12 @@ properties:
compatible:
const: microchip,pcie-host-1.0 # PolarFire
reg:
minItems: 3
reg-names:
minItems: 3
clocks:
description:
Fabric Interface Controllers, FICs, are the interface between the FPGA
@ -62,8 +68,9 @@ examples:
pcie0: pcie@2030000000 {
compatible = "microchip,pcie-host-1.0";
reg = <0x0 0x70000000 0x0 0x08000000>,
<0x0 0x43000000 0x0 0x00010000>;
reg-names = "cfg", "apb";
<0x0 0x43008000 0x0 0x00002000>,
<0x0 0x4300a000 0x0 0x00002000>;
reg-names = "cfg", "bridge", "ctrl";
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;

14
Documentation/devicetree/bindings/pci/plda,xpressrich3-axi-common.yaml
View File

@ -18,12 +18,18 @@ allOf:
properties:
reg:
maxItems: 2
maxItems: 3
minItems: 2
reg-names:
items:
- const: cfg
- const: apb
oneOf:
- items:
- const: cfg
- const: apb
- items:
- const: cfg
- const: bridge
- const: ctrl
interrupts:
minItems: 1

4
Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml
View File

@ -81,6 +81,10 @@ properties:
vddpe-3v3-supply:
description: PCIe endpoint power supply
operating-points-v2: true
opp-table:
type: object
required:
- reg
- reg-names

4
Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml
View File

@ -70,10 +70,6 @@ properties:
- const: msi7
- const: global
operating-points-v2: true
opp-table:
type: object
resets:
maxItems: 1

4
Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml
View File

@ -20,6 +20,7 @@ properties:
- const: qcom,pcie-sm8550
- items:
- enum:
- qcom,sar2130p-pcie
- qcom,pcie-sm8650
- const: qcom,pcie-sm8550
@ -39,7 +40,7 @@ properties:
clocks:
minItems: 7
maxItems: 8
maxItems: 9
clock-names:
minItems: 7
@ -52,6 +53,7 @@ properties:
- const: ddrss_sf_tbu # PCIe SF TBU clock
- const: noc_aggr # Aggre NoC PCIe AXI clock
- const: cnoc_sf_axi # Config NoC PCIe1 AXI clock
- const: qmip_pcie_ahb # QMIP PCIe AHB clock
interrupts:
minItems: 8

9
Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
View File

@ -47,9 +47,10 @@ properties:
interrupts:
minItems: 8
maxItems: 8
maxItems: 9
interrupt-names:
minItems: 8
items:
- const: msi0
- const: msi1
@ -59,6 +60,7 @@ properties:
- const: msi5
- const: msi6
- const: msi7
- const: global
resets:
minItems: 1
@ -130,9 +132,10 @@ examples:
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi0", "msi1", "msi2", "msi3",
"msi4", "msi5", "msi6", "msi7";
"msi4", "msi5", "msi6", "msi7", "global";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */

50
Documentation/devicetree/bindings/pci/qcom,pcie.yaml
View File

@ -26,6 +26,7 @@ properties:
- qcom,pcie-ipq8064-v2
- qcom,pcie-ipq8074
- qcom,pcie-ipq8074-gen3
- qcom,pcie-ipq9574
- qcom,pcie-msm8996
- qcom,pcie-qcs404
- qcom,pcie-sdm845
@ -164,6 +165,7 @@ allOf:
enum:
- qcom,pcie-ipq6018
- qcom,pcie-ipq8074-gen3
- qcom,pcie-ipq9574
then:
properties:
reg:
@ -400,6 +402,53 @@ allOf:
- const: axi_m_sticky # AXI Master Sticky reset
- const: axi_s_sticky # AXI Slave Sticky reset
- if:
properties:
compatible:
contains:
enum:
- qcom,pcie-ipq9574
then:
properties:
clocks:
minItems: 6
maxItems: 6
clock-names:
items:
- const: axi_m # AXI Master clock
- const: axi_s # AXI Slave clock
- const: axi_bridge
- const: rchng
- const: ahb
- const: aux
resets:
minItems: 8
maxItems: 8
reset-names:
items:
- const: pipe # PIPE reset
- const: sticky # Core Sticky reset
- const: axi_s_sticky # AXI Slave Sticky reset
- const: axi_s # AXI Slave reset
- const: axi_m_sticky # AXI Master Sticky reset
- const: axi_m # AXI Master reset
- const: aux # AUX Reset
- const: ahb # AHB Reset
interrupts:
minItems: 8
interrupt-names:
items:
- const: msi0
- const: msi1
- const: msi2
- const: msi3
- const: msi4
- const: msi5
- const: msi6
- const: msi7
- if:
properties:
compatible:
@ -510,6 +559,7 @@ allOf:
- qcom,pcie-ipq8064v2
- qcom,pcie-ipq8074
- qcom,pcie-ipq8074-gen3
- qcom,pcie-ipq9574
- qcom,pcie-qcs404
then:
required:

1
Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
View File

@ -230,7 +230,6 @@ examples:
interrupts = <25>, <24>;
interrupt-names = "msi", "hp";
#interrupt-cells = <1>;
reset-gpios = <&port0 0 1>;

7
Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
View File

@ -16,6 +16,13 @@ properties:
compatible:
const: starfive,jh7110-pcie
reg:
maxItems: 2
reg-names:
maxItems: 2
clocks:
items:
- description: NOC bus clock

19
Documentation/devicetree/bindings/phy/bcm-ns-usb2-phy.yaml
View File

@ -18,16 +18,8 @@ properties:
const: brcm,ns-usb2-phy
reg:
anyOf:
- maxItems: 1
description: PHY control register
- maxItems: 1
description: iomem address range of DMU (Device Management Unit)
deprecated: true
reg-names:
items:
- const: dmu
maxItems: 1
description: PHY control register
brcm,syscon-clkset:
description: phandle to syscon for clkset register
@ -50,12 +42,7 @@ required:
- clocks
- clock-names
- "#phy-cells"
oneOf:
- required:
- brcm,syscon-clkset
- required:
- reg-names
- brcm,syscon-clkset
additionalProperties: false

42
Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml
View File

@ -11,12 +11,17 @@ maintainers:
properties:
compatible:
enum:
- fsl,imx8mq-usb-phy
- fsl,imx8mp-usb-phy
oneOf:
- enum:
- fsl,imx8mq-usb-phy
- fsl,imx8mp-usb-phy
- items:
- const: fsl,imx95-usb-phy
- const: fsl,imx8mp-usb-phy
reg:
maxItems: 1
minItems: 1
maxItems: 2
"#phy-cells":
const: 0
@ -89,7 +94,34 @@ required:
- clocks
- clock-names
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- fsl,imx95-usb-phy
then:
properties:
reg:
items:
- description: USB PHY Control range
- description: USB PHY TCA Block range
else:
properties:
reg:
maxItems: 1
- if:
properties:
compatible:
contains:
enum:
- fsl,imx95-usb-phy
then:
$ref: /schemas/usb/usb-switch.yaml#
unevaluatedProperties: false
examples:
- |

1
Documentation/devicetree/bindings/phy/fsl,mxs-usbphy.yaml
View File

@ -32,6 +32,7 @@ properties:
- enum:
- fsl,imx8dxl-usbphy
- fsl,imx8qm-usbphy
- fsl,imx8qxp-usbphy
- fsl,imx8ulp-usbphy
- const: fsl,imx7ulp-usbphy

10
Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
View File

@ -125,6 +125,16 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
default: 28
power-domains:
description:
The TPHY of MediaTek should exist within a power domain. The
developer should be aware that the hardware design of MediaTek TPHY
does not require the addition of MTCMOS. If the power to the TPHY
is turned off, it will impact other functions. From the current
perspective of USB hardware design, even if MTCMOS is added to the
TPHY, it should remain always on.
maxItems: 1
# Required child node:
patternProperties:
"^(usb|pcie|sata)-phy@[0-9a-f]+$":

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