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iommu/mediatek: Support for multi domains
Some HW IP(ex: CCU) require the special iova range. That means the iova got from dma_alloc_attrs for that devices must locate in his special range. In this patch, we prepare a iommu group(domain) for each a iova range requirement. Meanwhile we still use one pagetable which support 16GB iova. After this patch, If the iova range of a master is over 4G, the master should: a) Declare its special dma-ranges in its dtsi node. For example, If we preassign the iova 4G-8G for vcodec, then the vcodec dtsi node should add this: /* * iova start at 0x1_0000_0000, pa still start at 0x4000_0000 * size is 0x1_0000_0000. */ dma-ranges = <0x1 0x0 0x0 0x40000000 0x1 0x0>; /* 4G ~ 8G */ Note: we don't have a actual bus concept here. the master doesn't have its special parent node, thus this dma-ranges can only be put in the master's node. b) Update the dma_mask: dma_set_mask_and_coherent(dev, DMA_BIT_MASK(33)); Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Tomasz Figa <tfiga@chromium.org> Link: https://lore.kernel.org/r/20210111111914.22211-29-yong.wu@mediatek.com Signed-off-by: Will Deacon <will@kernel.org>
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@ -369,8 +369,19 @@ static void mtk_iommu_config(struct mtk_iommu_data *data,
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}
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static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom,
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struct mtk_iommu_data *data)
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struct mtk_iommu_data *data,
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unsigned int domid)
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{
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const struct mtk_iommu_iova_region *region;
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/* Use the exist domain as there is only one pgtable here. */
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if (data->m4u_dom) {
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dom->iop = data->m4u_dom->iop;
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dom->cfg = data->m4u_dom->cfg;
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dom->domain.pgsize_bitmap = data->m4u_dom->cfg.pgsize_bitmap;
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goto update_iova_region;
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}
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dom->cfg = (struct io_pgtable_cfg) {
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.quirks = IO_PGTABLE_QUIRK_ARM_NS |
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IO_PGTABLE_QUIRK_NO_PERMS |
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@ -394,8 +405,11 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom,
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/* Update our support page sizes bitmap */
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dom->domain.pgsize_bitmap = dom->cfg.pgsize_bitmap;
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dom->domain.geometry.aperture_start = 0;
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dom->domain.geometry.aperture_end = DMA_BIT_MASK(32);
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update_iova_region:
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/* Update the iova region for this domain */
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region = data->plat_data->iova_region + domid;
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dom->domain.geometry.aperture_start = region->iova_base;
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dom->domain.geometry.aperture_end = region->iova_base + region->size - 1;
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dom->domain.geometry.force_aperture = true;
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return 0;
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}
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@ -441,7 +455,7 @@ static int mtk_iommu_attach_device(struct iommu_domain *domain,
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return domid;
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if (!dom->data) {
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if (mtk_iommu_domain_finalise(dom, data))
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if (mtk_iommu_domain_finalise(dom, data, domid))
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return -ENODEV;
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dom->data = data;
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}
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@ -569,6 +583,7 @@ static void mtk_iommu_release_device(struct device *dev)
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static struct iommu_group *mtk_iommu_device_group(struct device *dev)
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{
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struct mtk_iommu_data *data = mtk_iommu_get_m4u_data();
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struct iommu_group *group;
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int domid;
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if (!data)
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@ -578,15 +593,15 @@ static struct iommu_group *mtk_iommu_device_group(struct device *dev)
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if (domid < 0)
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return ERR_PTR(domid);
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/* All the client devices are in the same m4u iommu-group */
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if (!data->m4u_group) {
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data->m4u_group = iommu_group_alloc();
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if (IS_ERR(data->m4u_group))
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dev_err(dev, "Failed to allocate M4U IOMMU group\n");
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group = data->m4u_group[domid];
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if (!group) {
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group = iommu_group_alloc();
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if (!IS_ERR(group))
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data->m4u_group[domid] = group;
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} else {
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iommu_group_ref_get(data->m4u_group);
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iommu_group_ref_get(group);
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}
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return data->m4u_group;
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return group;
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}
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static int mtk_iommu_of_xlate(struct device *dev, struct of_phandle_args *args)
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@ -22,6 +22,8 @@
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#define MTK_LARB_COM_MAX 8
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#define MTK_LARB_SUBCOM_MAX 4
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#define MTK_IOMMU_GROUP_MAX 8
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struct mtk_iommu_suspend_reg {
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union {
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u32 standard_axi_mode;/* v1 */
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@ -67,7 +69,7 @@ struct mtk_iommu_data {
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phys_addr_t protect_base; /* protect memory base */
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struct mtk_iommu_suspend_reg reg;
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struct mtk_iommu_domain *m4u_dom;
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struct iommu_group *m4u_group;
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struct iommu_group *m4u_group[MTK_IOMMU_GROUP_MAX];
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bool enable_4GB;
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spinlock_t tlb_lock; /* lock for tlb range flush */
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