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net: phy: introduce PHY_INTERFACE_MODE_REVRMII
The "reverse RMII" protocol name is a personal invention, derived from "reverse MII". Just like MII, RMII is an asymmetric protocol in that a PHY behaves differently than a MAC. In the case of RMII, for example: - the 50 MHz clock signals are either driven by the MAC or by an external oscillator (but never by the PHY). - the PHY can transmit extra in-band control symbols via RXD[1:0] which the MAC is supposed to understand, but a PHY isn't. The "reverse MII" protocol is not standardized either, except for this web document: https://www.eetimes.com/reverse-media-independent-interface-revmii-block-architecture/# In short, it means that the Ethernet controller speaks the 4-bit data parallel protocol from the perspective of a PHY (it acts like a PHY). This might mean that it implements clause 22 compatible registers, although that is optional - the important bit is that its pins can be connected to an MII MAC and it will 'just work'. In this discussion thread: https://lore.kernel.org/netdev/20210201214515.cx6ivvme2tlquge2@skbuf/ we agreed that it would be an abuse of terms to use the "RevMII" name for anything than the 4-bit parallel MII protocol. But since all the same concepts can be applied to the 2-bit Reduced MII protocol as well, here we are introducing a "Reverse RMII" protocol. This means: "behave like an RMII PHY". Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -68,6 +68,7 @@ properties:
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- tbi
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- rev-mii
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- rmii
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- rev-rmii
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# RX and TX delays are added by the MAC when required
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- rgmii
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@ -93,6 +93,7 @@ extern const int phy_10gbit_features_array[1];
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* @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
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* @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
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* @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
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* @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
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* @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
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* @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
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* @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
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@ -126,6 +127,7 @@ typedef enum {
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PHY_INTERFACE_MODE_TBI,
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PHY_INTERFACE_MODE_REVMII,
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PHY_INTERFACE_MODE_RMII,
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PHY_INTERFACE_MODE_REVRMII,
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PHY_INTERFACE_MODE_RGMII,
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PHY_INTERFACE_MODE_RGMII_ID,
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PHY_INTERFACE_MODE_RGMII_RXID,
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@ -185,6 +187,8 @@ static inline const char *phy_modes(phy_interface_t interface)
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return "rev-mii";
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case PHY_INTERFACE_MODE_RMII:
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return "rmii";
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case PHY_INTERFACE_MODE_REVRMII:
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return "rev-rmii";
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case PHY_INTERFACE_MODE_RGMII:
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return "rgmii";
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case PHY_INTERFACE_MODE_RGMII_ID:
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