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PHYLIB: Add 1000Base-X support for Broadcom bcm5482
Configure the BCM5482S secondary SerDes for 1000Base-X mode when the appropriate dev_flags are passed in to phy_connect(). This is needed when the PHY is used for fiber and backplane connections. Signed-off-by: Nate Case <ncase@xes-inc.com> Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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@ -24,6 +24,12 @@
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#define MII_BCM54XX_ESR 0x11 /* BCM54xx extended status register */
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#define MII_BCM54XX_ESR_IS 0x1000 /* Interrupt status */
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#define MII_BCM54XX_EXP_DATA 0x15 /* Expansion register data */
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#define MII_BCM54XX_EXP_SEL 0x17 /* Expansion register select */
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#define MII_BCM54XX_EXP_SEL_SSD 0x0e00 /* Secondary SerDes select */
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#define MII_BCM54XX_EXP_SEL_ER 0x0f00 /* Expansion register select */
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#define MII_BCM54XX_AUX_CTL 0x18 /* Auxiliary control register */
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#define MII_BCM54XX_ISR 0x1a /* BCM54xx interrupt status register */
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#define MII_BCM54XX_IMR 0x1b /* BCM54xx interrupt mask register */
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#define MII_BCM54XX_INT_CRCERR 0x0001 /* CRC error */
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@ -42,10 +48,120 @@
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#define MII_BCM54XX_INT_MDIX 0x2000 /* MDIX status change */
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#define MII_BCM54XX_INT_PSERR 0x4000 /* Pair swap error */
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#define MII_BCM54XX_SHD 0x1c /* 0x1c shadow registers */
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#define MII_BCM54XX_SHD_WRITE 0x8000
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#define MII_BCM54XX_SHD_VAL(x) ((x & 0x1f) << 10)
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#define MII_BCM54XX_SHD_DATA(x) ((x & 0x3ff) << 0)
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/*
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* Broadcom LED source encodings. These are used in BCM5461, BCM5481,
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* BCM5482, and possibly some others.
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*/
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#define BCM_LED_SRC_LINKSPD1 0x0
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#define BCM_LED_SRC_LINKSPD2 0x1
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#define BCM_LED_SRC_XMITLED 0x2
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#define BCM_LED_SRC_ACTIVITYLED 0x3
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#define BCM_LED_SRC_FDXLED 0x4
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#define BCM_LED_SRC_SLAVE 0x5
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#define BCM_LED_SRC_INTR 0x6
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#define BCM_LED_SRC_QUALITY 0x7
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#define BCM_LED_SRC_RCVLED 0x8
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#define BCM_LED_SRC_MULTICOLOR1 0xa
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#define BCM_LED_SRC_OPENSHORT 0xb
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#define BCM_LED_SRC_OFF 0xe /* Tied high */
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#define BCM_LED_SRC_ON 0xf /* Tied low */
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/*
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* BCM5482: Shadow registers
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* Shadow values go into bits [14:10] of register 0x1c to select a shadow
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* register to access.
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*/
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#define BCM5482_SHD_LEDS1 0x0d /* 01101: LED Selector 1 */
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/* LED3 / ~LINKSPD[2] selector */
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#define BCM5482_SHD_LEDS1_LED3(src) ((src & 0xf) << 4)
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/* LED1 / ~LINKSPD[1] selector */
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#define BCM5482_SHD_LEDS1_LED1(src) ((src & 0xf) << 0)
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#define BCM5482_SHD_SSD 0x14 /* 10100: Secondary SerDes control */
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#define BCM5482_SHD_SSD_LEDM 0x0008 /* SSD LED Mode enable */
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#define BCM5482_SHD_SSD_EN 0x0001 /* SSD enable */
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#define BCM5482_SHD_MODE 0x1f /* 11111: Mode Control Register */
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#define BCM5482_SHD_MODE_1000BX 0x0001 /* Enable 1000BASE-X registers */
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/*
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* BCM5482: Secondary SerDes registers
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*/
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#define BCM5482_SSD_1000BX_CTL 0x00 /* 1000BASE-X Control */
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#define BCM5482_SSD_1000BX_CTL_PWRDOWN 0x0800 /* Power-down SSD */
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#define BCM5482_SSD_SGMII_SLAVE 0x15 /* SGMII Slave Register */
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#define BCM5482_SSD_SGMII_SLAVE_EN 0x0002 /* Slave mode enable */
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#define BCM5482_SSD_SGMII_SLAVE_AD 0x0001 /* Slave auto-detection */
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/*
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* Device flags for PHYs that can be configured for different operating
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* modes.
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*/
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#define PHY_BCM_FLAGS_VALID 0x80000000
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#define PHY_BCM_FLAGS_INTF_XAUI 0x00000020
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#define PHY_BCM_FLAGS_INTF_SGMII 0x00000010
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#define PHY_BCM_FLAGS_MODE_1000BX 0x00000002
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#define PHY_BCM_FLAGS_MODE_COPPER 0x00000001
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MODULE_DESCRIPTION("Broadcom PHY driver");
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MODULE_AUTHOR("Maciej W. Rozycki");
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MODULE_LICENSE("GPL");
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/*
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* Indirect register access functions for the 1000BASE-T/100BASE-TX/10BASE-T
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* 0x1c shadow registers.
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*/
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static int bcm54xx_shadow_read(struct phy_device *phydev, u16 shadow)
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{
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phy_write(phydev, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow));
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return MII_BCM54XX_SHD_DATA(phy_read(phydev, MII_BCM54XX_SHD));
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}
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static int bcm54xx_shadow_write(struct phy_device *phydev, u16 shadow, u16 val)
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{
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return phy_write(phydev, MII_BCM54XX_SHD,
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MII_BCM54XX_SHD_WRITE |
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MII_BCM54XX_SHD_VAL(shadow) |
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MII_BCM54XX_SHD_DATA(val));
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}
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/*
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* Indirect register access functions for the Expansion Registers
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* and Secondary SerDes registers (when sec_serdes=1).
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*/
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static int bcm54xx_exp_read(struct phy_device *phydev,
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int sec_serdes, u8 regnum)
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{
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int val;
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phy_write(phydev, MII_BCM54XX_EXP_SEL,
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(sec_serdes ? MII_BCM54XX_EXP_SEL_SSD :
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MII_BCM54XX_EXP_SEL_ER) |
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regnum);
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val = phy_read(phydev, MII_BCM54XX_EXP_DATA);
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phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
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return val;
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}
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static int bcm54xx_exp_write(struct phy_device *phydev,
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int sec_serdes, u8 regnum, u16 val)
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{
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int ret;
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phy_write(phydev, MII_BCM54XX_EXP_SEL,
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(sec_serdes ? MII_BCM54XX_EXP_SEL_SSD :
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MII_BCM54XX_EXP_SEL_ER) |
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regnum);
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ret = phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
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phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
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return ret;
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}
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static int bcm54xx_config_init(struct phy_device *phydev)
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{
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int reg, err;
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@ -70,6 +186,87 @@ static int bcm54xx_config_init(struct phy_device *phydev)
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return 0;
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}
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static int bcm5482_config_init(struct phy_device *phydev)
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{
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int err, reg;
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err = bcm54xx_config_init(phydev);
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if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) {
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/*
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* Enable secondary SerDes and its use as an LED source
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*/
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reg = bcm54xx_shadow_read(phydev, BCM5482_SHD_SSD);
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bcm54xx_shadow_write(phydev, BCM5482_SHD_SSD,
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reg |
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BCM5482_SHD_SSD_LEDM |
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BCM5482_SHD_SSD_EN);
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/*
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* Enable SGMII slave mode and auto-detection
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*/
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reg = bcm54xx_exp_read(phydev, 1, BCM5482_SSD_SGMII_SLAVE);
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bcm54xx_exp_write(phydev, 1, BCM5482_SSD_SGMII_SLAVE,
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reg |
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BCM5482_SSD_SGMII_SLAVE_EN |
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BCM5482_SSD_SGMII_SLAVE_AD);
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/*
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* Disable secondary SerDes powerdown
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*/
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reg = bcm54xx_exp_read(phydev, 1, BCM5482_SSD_1000BX_CTL);
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bcm54xx_exp_write(phydev, 1, BCM5482_SSD_1000BX_CTL,
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reg & ~BCM5482_SSD_1000BX_CTL_PWRDOWN);
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/*
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* Select 1000BASE-X register set (primary SerDes)
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*/
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reg = bcm54xx_shadow_read(phydev, BCM5482_SHD_MODE);
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bcm54xx_shadow_write(phydev, BCM5482_SHD_MODE,
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reg | BCM5482_SHD_MODE_1000BX);
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/*
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* LED1=ACTIVITYLED, LED3=LINKSPD[2]
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* (Use LED1 as secondary SerDes ACTIVITY LED)
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*/
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bcm54xx_shadow_write(phydev, BCM5482_SHD_LEDS1,
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BCM5482_SHD_LEDS1_LED1(BCM_LED_SRC_ACTIVITYLED) |
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BCM5482_SHD_LEDS1_LED3(BCM_LED_SRC_LINKSPD2));
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/*
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* Auto-negotiation doesn't seem to work quite right
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* in this mode, so we disable it and force it to the
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* right speed/duplex setting. Only 'link status'
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* is important.
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*/
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phydev->autoneg = AUTONEG_DISABLE;
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phydev->speed = SPEED_1000;
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phydev->duplex = DUPLEX_FULL;
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}
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return err;
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}
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static int bcm5482_read_status(struct phy_device *phydev)
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{
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int err;
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err = genphy_read_status(phydev);
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if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) {
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/*
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* Only link status matters for 1000Base-X mode, so force
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* 1000 Mbit/s full-duplex status
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*/
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if (phydev->link) {
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phydev->speed = SPEED_1000;
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phydev->duplex = DUPLEX_FULL;
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}
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}
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return err;
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}
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static int bcm54xx_ack_interrupt(struct phy_device *phydev)
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{
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int reg;
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@ -210,9 +407,9 @@ static struct phy_driver bcm5482_driver = {
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.name = "Broadcom BCM5482",
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
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.config_init = bcm54xx_config_init,
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.config_init = bcm5482_config_init,
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.config_aneg = genphy_config_aneg,
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.read_status = genphy_read_status,
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.read_status = bcm5482_read_status,
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.ack_interrupt = bcm54xx_ack_interrupt,
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.config_intr = bcm54xx_config_intr,
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.driver = { .owner = THIS_MODULE },
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