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ARM: pxa: remove unused board files

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The majority of all pxa board files has not been touched in a long time,
and no users have spoken up in favor of keeping them around. This leaves
only support for the platforms that were already converted to DT, as
well as the gumstix and spitz/akita/borzoi machines that work in qemu
and can still be converted to DT later.

Cc: Ales Bardorfer <ales@i-tech.si>
Cc: Ales Snuparek <snuparek@atlas.cz>
Cc: Alex Osborne <ato@meshy.org>
Cc: Alex Osborne <bobofdoom@gmail.com>
Cc: Dirk Opfer <dirk@opfer-online.de>
Cc: Ian Molton <spyro@f2s.com>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Michael Petchkovsky <mkpetch@internode.on.net>
Cc: Nick Bane <nick@cecomputing.co.uk>
Cc: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Sergey Lapin <slapin@ossfans.org>
Cc: Tomas Cech <sleep_walker@suse.cz>
Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-09-29 15:24:20 +02:00
parent eede0a75b9
commit d6df7df7ae
131 changed files with 2 additions and 33910 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

99
MAINTAINERS
View File

@ -2114,10 +2114,6 @@ F: tools/perf/arch/arm/util/pmu.c
F: tools/perf/util/cs-etm-decoder/*
F: tools/perf/util/cs-etm.*
ARM/CORGI MACHINE SUPPORT
M: Richard Purdie <rpurdie@rpsys.net>
S: Maintained
ARM/CORTINA SYSTEMS GEMINI ARM ARCHITECTURE
M: Hans Ulli Kroll <ulli.kroll@googlemail.com>
M: Linus Walleij <linus.walleij@linaro.org>
@ -2157,12 +2153,6 @@ F: include/dt-bindings/bus/moxtet.h
F: include/linux/armada-37xx-rwtm-mailbox.h
F: include/linux/moxtet.h
ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6)
M: Robert Jarzmik <robert.jarzmik@free.fr>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-pxa/ezx.c
ARM/FARADAY FA526 PORT
M: Hans Ulli Kroll <ulli.kroll@googlemail.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@ -2212,25 +2202,11 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
F: arch/arm/boot/dts/vf*
F: arch/arm/mach-imx/*vf610*
ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
M: Lennert Buytenhek <kernel@wantstofly.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
ARM/GUMSTIX MACHINE SUPPORT
M: Steve Sakoman <sakoman@gmail.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
ARM/H4700 (HP IPAQ HX4700) MACHINE SUPPORT
M: Philipp Zabel <philipp.zabel@gmail.com>
M: Paul Parsons <lost.distance@yahoo.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-pxa/hx4700.c
F: arch/arm/mach-pxa/include/mach/hx4700.h
F: sound/soc/pxa/hx4700.c
ARM/HISILICON SOC SUPPORT
M: Wei Xu <xuwei5@hisilicon.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@ -2273,12 +2249,6 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/boot/dts/omap3-igep*
ARM/INCOME PXA270 SUPPORT
M: Marek Vasut <marek.vasut@gmail.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-pxa/colibri-pxa270-income.c
ARM/INTEL IXP4XX ARM ARCHITECTURE
M: Linus Walleij <linusw@kernel.org>
M: Imre Kaloz <kaloz@openwrt.org>
@ -2311,22 +2281,12 @@ M: Lennert Buytenhek <kernel@wantstofly.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
ARM/IP FABRICS DOUBLE ESPRESSO MACHINE SUPPORT
M: Lennert Buytenhek <kernel@wantstofly.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
ARM/LG1K ARCHITECTURE
M: Chanho Min <chanho.min@lge.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm64/boot/dts/lg/
ARM/LOGICPD PXA270 MACHINE SUPPORT
M: Lennert Buytenhek <kernel@wantstofly.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
ARM/LPC18XX ARCHITECTURE
M: Vladimir Zapolskiy <vz@mleia.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@ -2353,10 +2313,6 @@ F: drivers/usb/host/ohci-nxp.c
F: drivers/watchdog/pnx4008_wdt.c
N: lpc32xx
ARM/MAGICIAN MACHINE SUPPORT
M: Philipp Zabel <philipp.zabel@gmail.com>
S: Maintained
ARM/Marvell Dove/MV78xx0/Orion SOC support
M: Andrew Lunn <andrew@lunn.ch>
M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
@ -2485,12 +2441,6 @@ F: arch/arm/boot/dts/milbeaut*
F: arch/arm/mach-milbeaut/
N: milbeaut
ARM/MIOA701 MACHINE SUPPORT
M: Robert Jarzmik <robert.jarzmik@free.fr>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-pxa/mioa701.c
ARM/MStar/Sigmastar Armv7 SoC support
M: Daniel Palmer <daniel@thingy.jp>
M: Romain Perier <romain.perier@gmail.com>
@ -2511,10 +2461,6 @@ F: drivers/watchdog/msc313e_wdt.c
F: include/dt-bindings/clock/mstar-*
F: include/dt-bindings/gpio/msc313-gpio.h
ARM/NEC MOBILEPRO 900/c MACHINE SUPPORT
M: Michael Petchkovsky <mkpetch@internode.on.net>
S: Maintained
ARM/NOMADIK/Ux500 ARCHITECTURES
M: Linus Walleij <linus.walleij@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@ -2600,32 +2546,6 @@ F: arch/arm/mach-oxnas/
F: drivers/power/reset/oxnas-restart.c
N: oxnas
ARM/PALM TREO SUPPORT
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Orphan
F: arch/arm/mach-pxa/palmtreo.*
ARM/PALMTX,PALMT5,PALMLD,PALMTE2,PALMTC SUPPORT
M: Marek Vasut <marek.vasut@gmail.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
W: http://hackndev.com
F: arch/arm/mach-pxa/include/mach/palmld.h
F: arch/arm/mach-pxa/include/mach/palmtc.h
F: arch/arm/mach-pxa/include/mach/palmtx.h
F: arch/arm/mach-pxa/palmld.c
F: arch/arm/mach-pxa/palmt5.*
F: arch/arm/mach-pxa/palmtc.c
F: arch/arm/mach-pxa/palmte2.*
F: arch/arm/mach-pxa/palmtx.c
ARM/PALMZ72 SUPPORT
M: Sergey Lapin <slapin@ossfans.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
W: http://hackndev.com
F: arch/arm/mach-pxa/palmz72.*
ARM/QUALCOMM SUPPORT
M: Andy Gross <agross@kernel.org>
M: Bjorn Andersson <andersson@kernel.org>
@ -2999,11 +2919,6 @@ F: arch/arm64/boot/dts/ti/Makefile
F: arch/arm64/boot/dts/ti/k3-*
F: include/dt-bindings/pinctrl/k3.h
ARM/TOSA MACHINE SUPPORT
M: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
M: Dirk Opfer <dirk@opfer-online.de>
S: Maintained
ARM/TOSHIBA VISCONTI ARCHITECTURE
M: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@ -3073,13 +2988,6 @@ S: Maintained
W: http://www.armlinux.org.uk/
F: arch/arm/vfp/
ARM/VOIPAC PXA270 SUPPORT
M: Marek Vasut <marek.vasut@gmail.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-pxa/include/mach/vpac270.h
F: arch/arm/mach-pxa/vpac270.c
ARM/VT8500 ARM ARCHITECTURE
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Orphan
@ -3097,13 +3005,6 @@ F: drivers/video/fbdev/vt8500lcdfb.*
F: drivers/video/fbdev/wm8505fb*
F: drivers/video/fbdev/wmt_ge_rops.*
ARM/ZIPIT Z2 SUPPORT
M: Marek Vasut <marek.vasut@gmail.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-pxa/include/mach/z2.h
F: arch/arm/mach-pxa/z2.c
ARM/ZYNQ ARCHITECTURE
M: Michal Simek <michal.simek@xilinx.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

163
arch/arm/configs/cm_x300_defconfig
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@ -1,163 +0,0 @@
CONFIG_LOCALVERSION="-cm-x300"
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_NO_HZ_IDLE=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_MACH_CM_X300=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=ubifs console=ttyS2,38400"
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_FPE_NWFPE=y
CONFIG_APM_EMULATION=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_LIB80211=m
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_MARVELL=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_DM9000=y
CONFIG_DM9000_DEBUGLEVEL=0
CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_PXA27x=m
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_TOUCHSCREEN_DA9034 is not set
CONFIG_TOUCHSCREEN_WM97XX=m
# CONFIG_TOUCHSCREEN_WM9705 is not set
# CONFIG_TOUCHSCREEN_WM9713 is not set
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_PXA=y
CONFIG_SPI=y
CONFIG_SPI_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_PCA953X=y
# CONFIG_HWMON is not set
CONFIG_PMIC_DA903X=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_DA903X=y
CONFIG_FB=y
CONFIG_FB_PXA=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_LCD_TDO24M=y
CONFIG_BACKLIGHT_DA903X=m
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_LOGO=y
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
# CONFIG_SND_DRIVERS is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=m
CONFIG_SND_PXA2XX_SOC=m
CONFIG_SND_PXA2XX_SOC_EM_X270=m
CONFIG_HID_DRAGONRISE=y
CONFIG_HID_GYRATION=y
CONFIG_HID_TWINHAN=y
CONFIG_HID_NTRIG=y
CONFIG_HID_PANTHERLORD=y
CONFIG_HID_PETALYNX=y
CONFIG_HID_SAMSUNG=y
CONFIG_HID_SONY=y
CONFIG_HID_SUNPLUS=y
CONFIG_HID_GREENASIA=y
CONFIG_HID_SMARTJOYPLUS=y
CONFIG_HID_TOPSEED=y
CONFIG_HID_THRUSTMASTER=y
CONFIG_HID_ZEROPLUS=y
CONFIG_USB=y
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_MMC=m
CONFIG_MMC_PXA=m
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_V3020=y
CONFIG_RTC_DRV_PXA=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_SUMMARY=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_CIFS=m
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_ISO8859_1=m
CONFIG_CRYPTO_MICHAEL_MIC=m
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_T10DIF=y
CONFIG_FONTS=y
CONFIG_FONT_6x11=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set

157
arch/arm/configs/colibri_pxa270_defconfig
View File

@ -1,157 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_PREEMPT=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_MACH_COLIBRI=y
CONFIG_AEABI=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_FPE_NWFPE=y
CONFIG_PM=y
CONFIG_SLAB=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=m
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IPV6 is not set
CONFIG_NETFILTER=y
CONFIG_VLAN_8021Q=m
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=m
CONFIG_CFG80211=y
CONFIG_CONNECTOR=y
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_LE_BYTE_SWAP=y
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_COMPLEX_MAPPINGS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PXA2XX=y
CONFIG_MTD_BLOCK2MTD=y
CONFIG_MTD_ONENAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_DISKONCHIP=y
CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y
CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0x4000000
CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y
CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_NBD=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=8
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_DM9000=y
CONFIG_PHYLIB=y
CONFIG_HOSTAP=y
CONFIG_HOSTAP_FIRMWARE=y
CONFIG_HOSTAP_FIRMWARE_NVRAM=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_ATKBD=m
# CONFIG_MOUSE_PS2 is not set
CONFIG_MOUSE_SERIAL=m
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_WATCHDOG=y
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
CONFIG_FB_PXA=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_LOGO=y
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_SERIAL=m
CONFIG_USB_GADGET=m
CONFIG_USB_GADGET_DUMMY_HCD=y
CONFIG_MMC=y
CONFIG_NEW_LEDS=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_HCTOSYS is not set
CONFIG_RTC_DRV_PCF8583=m
CONFIG_AUTOFS4_FS=y
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15"
CONFIG_TMPFS=y
CONFIG_CONFIGFS_FS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=1
CONFIG_JFFS2_FS_WBUF_VERIFY=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=y
CONFIG_NFSD_V4=y
CONFIG_NLS_DEFAULT="iso8859-15"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_UTF8=m
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_KEYS=y
CONFIG_SECURITY=y
CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_DEFLATE=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRC_CCITT=y
CONFIG_CRC16=y
CONFIG_LIBCRC32C=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
CONFIG_PRINTK_TIME=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

60
arch/arm/configs/colibri_pxa300_defconfig
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@ -1,60 +0,0 @@
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_MACH_COLIBRI300=y
CONFIG_AEABI=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="console=ttyS0,115200 rw"
CONFIG_CPU_IDLE=y
CONFIG_FPE_NWFPE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_NET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_SYN_COOKIES=y
CONFIG_IPV6=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_AX88796=y
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_MISC=y
CONFIG_INPUT_GPIO_ROTARY_ENCODER=y
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_DEBUG_GPIO=y
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_FB_PXA=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_MON=y
CONFIG_USB_STORAGE=y
CONFIG_MMC=y
CONFIG_MMC_PXA=y
CONFIG_EXT3_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_AES=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y
CONFIG_CRYPTO_ARC4=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

247
arch/arm/configs/corgi_defconfig
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@ -1,247 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_PREEMPT=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
CONFIG_PROFILING=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_PXA_SHARPSL=y
CONFIG_MACH_POODLE=y
CONFIG_MACH_CORGI=y
CONFIG_MACH_SHEPHERD=y
CONFIG_MACH_HUSKY=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="console=ttyS0,115200n8 console=tty1 noinitrd root=/dev/mtdblock2 rootfstype=jffs2 debug"
CONFIG_FPE_NWFPE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_BINFMT_MISC=m
CONFIG_PM=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=m
CONFIG_INET=y
CONFIG_SYN_COOKIES=y
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_TUNNEL=m
CONFIG_NETFILTER=y
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_ADDRTYPE=m
CONFIG_IP_NF_MATCH_ECN=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_LOG=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
CONFIG_IP6_NF_IPTABLES=m
CONFIG_IP6_NF_MATCH_EUI64=m
CONFIG_IP6_NF_MATCH_FRAG=m
CONFIG_IP6_NF_MATCH_OPTS=m
CONFIG_IP6_NF_MATCH_HL=m
CONFIG_IP6_NF_MATCH_IPV6HEADER=m
CONFIG_IP6_NF_MATCH_RT=m
CONFIG_IP6_NF_FILTER=m
CONFIG_IP6_NF_MANGLE=m
CONFIG_IP6_NF_RAW=m
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_BT_HCIBCM203X=m
CONFIG_BT_HCIBPA10X=m
CONFIG_BT_HCIBFUSB=m
CONFIG_BT_HCIDTL1=m
CONFIG_BT_HCIBT3C=m
CONFIG_BT_HCIBLUECARD=m
CONFIG_BT_HCIBTUART=m
CONFIG_BT_HCIVHCI=m
CONFIG_PCCARD=y
CONFIG_PCMCIA_PXA2XX=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_ROM=y
CONFIG_MTD_COMPLEX_MAPPINGS=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_SHARPSL=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=m
CONFIG_CHR_DEV_OSST=m
CONFIG_BLK_DEV_SR=m
CONFIG_CHR_DEV_SG=m
CONFIG_SCSI_MULTI_LUN=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ATA=y
CONFIG_PATA_PCMCIA=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_PCMCIA_PCNET=m
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_ASYNC=m
CONFIG_USB_CATC=m
CONFIG_USB_KAWETH=m
CONFIG_USB_PEGASUS=m
CONFIG_USB_RTL8150=m
CONFIG_USB_USBNET=m
# CONFIG_USB_NET_CDC_SUBSET is not set
CONFIG_NET_PCMCIA=y
CONFIG_INPUT_FF_MEMLESS=m
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=m
CONFIG_SERIAL_8250_CS=m
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_I2C=y
CONFIG_I2C_PXA=y
CONFIG_SPI=y
CONFIG_SPI_PXA2XX=y
CONFIG_FB=y
CONFIG_FB_W100=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_LCD_CORGI=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_SOUND=y
CONFIG_SOUND_PRIME=y
CONFIG_HID_A4TECH=m
CONFIG_HID_APPLE=m
CONFIG_HID_BELKIN=m
CONFIG_HID_CHERRY=m
CONFIG_HID_CHICONY=m
CONFIG_HID_CYPRESS=m
CONFIG_HID_EZKEY=m
CONFIG_HID_GYRATION=m
CONFIG_HID_LOGITECH=m
CONFIG_HID_MICROSOFT=m
CONFIG_HID_MONTEREY=m
CONFIG_HID_PANTHERLORD=m
CONFIG_HID_PETALYNX=m
CONFIG_HID_SAMSUNG=m
CONFIG_HID_SONY=m
CONFIG_HID_SUNPLUS=m
CONFIG_USB_KBD=m
CONFIG_USB_MOUSE=m
CONFIG_USB=m
CONFIG_USB_MON=m
CONFIG_USB_SL811_HCD=m
CONFIG_USB_SL811_CS=m
CONFIG_USB_ACM=m
CONFIG_USB_PRINTER=m
CONFIG_USB_STORAGE=m
CONFIG_USB_MDC800=m
CONFIG_USB_MICROTEK=m
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_BELKIN=m
CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
CONFIG_USB_SERIAL_CYPRESS_M8=m
CONFIG_USB_SERIAL_EMPEG=m
CONFIG_USB_SERIAL_FTDI_SIO=m
CONFIG_USB_SERIAL_VISOR=m
CONFIG_USB_SERIAL_IPAQ=m
CONFIG_USB_SERIAL_IR=m
CONFIG_USB_SERIAL_EDGEPORT=m
CONFIG_USB_SERIAL_EDGEPORT_TI=m
CONFIG_USB_SERIAL_GARMIN=m
CONFIG_USB_SERIAL_IPW=m
CONFIG_USB_SERIAL_KEYSPAN_PDA=m
CONFIG_USB_SERIAL_KEYSPAN=m
CONFIG_USB_SERIAL_KLSI=m
CONFIG_USB_SERIAL_KOBIL_SCT=m
CONFIG_USB_SERIAL_MCT_U232=m
CONFIG_USB_SERIAL_PL2303=m
CONFIG_USB_SERIAL_SAFE=m
CONFIG_USB_SERIAL_TI=m
CONFIG_USB_SERIAL_CYBERJACK=m
CONFIG_USB_SERIAL_OMNINET=m
CONFIG_USB_EMI62=m
CONFIG_USB_EMI26=m
CONFIG_USB_LEGOTOWER=m
CONFIG_USB_LCD=m
CONFIG_USB_CYTHERM=m
CONFIG_USB_IDMOUSE=m
CONFIG_USB_GADGET=y
CONFIG_USB_ZERO=m
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_MMC=y
CONFIG_MMC_PXA=y
CONFIG_EXT2_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_SUMMARY=y
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_JFFS2_RUBIN=y
CONFIG_CRAMFS=m
CONFIG_NFS_FS=m
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
CONFIG_SMB_FS=m
CONFIG_SMB_NLS_DEFAULT=y
CONFIG_NFS_V4=m
CONFIG_NLS_DEFAULT="cp437"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
CONFIG_DEBUG_KERNEL=y
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_TEST=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
CONFIG_CRYPTO_KHAZAD=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_TWOFISH=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRC_CCITT=y
CONFIG_LIBCRC32C=m
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set

97
arch/arm/configs/eseries_pxa_defconfig
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@ -1,97 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
# CONFIG_KALLSYMS is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_ARCH_PXA_ESERIES=y
CONFIG_IWMMXT=y
CONFIG_AEABI=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_KEXEC=y
CONFIG_FPE_NWFPE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_BINFMT_MISC=y
CONFIG_PM=y
CONFIG_SLAB=y
# CONFIG_COMPAT_BRK is not set
CONFIG_NET=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IPV6 is not set
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_MAC80211_RC_PID=y
# CONFIG_MAC80211_RC_MINSTREL is not set
CONFIG_PCCARD=y
CONFIG_PCMCIA=m
CONFIG_PCMCIA_PXA2XX=m
# CONFIG_STANDALONE is not set
CONFIG_MTD=m
CONFIG_MTD_RAW_NAND=m
CONFIG_MTD_NAND_TMIO=m
CONFIG_BLK_DEV_LOOP=m
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=m
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_ATA=m
# CONFIG_SATA_PMP is not set
CONFIG_PATA_PCMCIA=m
CONFIG_NETDEVICES=y
CONFIG_HERMES=m
CONFIG_PCMCIA_HERMES=m
CONFIG_NET_PCMCIA=y
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=m
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=m
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_WM97XX=m
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_PXA=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
CONFIG_MFD_T7L66XB=y
CONFIG_MFD_TC6387XB=y
CONFIG_MFD_TC6393XB=y
CONFIG_FB=y
CONFIG_FB_PXA=y
CONFIG_FB_W100=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_SOUND=y
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
CONFIG_SND_DYNAMIC_MINORS=y
CONFIG_SND_VERBOSE_PRINTK=y
# CONFIG_SND_PCMCIA is not set
CONFIG_SND_SOC=m
CONFIG_SND_PXA2XX_SOC=m
CONFIG_SND_PXA2XX_SOC_E800=m
# CONFIG_USB_SUPPORT is not set
CONFIG_MMC=y
CONFIG_MMC_TMIO=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=m
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_FONTS=y
CONFIG_FONT_MINI_4x6=y

389
arch/arm/configs/ezx_defconfig
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@ -1,389 +0,0 @@
CONFIG_LOCALVERSION="-ezx200910312315"
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
CONFIG_EXPERT=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_PXA_EZX=y
CONFIG_AEABI=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=3 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug"
CONFIG_KEXEC=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=m
CONFIG_CPU_FREQ_GOV_USERSPACE=m
CONFIG_CPU_FREQ_GOV_ONDEMAND=m
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
CONFIG_CPU_IDLE=y
CONFIG_FPE_NWFPE=y
CONFIG_PM=y
CONFIG_APM_EMULATION=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_BINFMT_MISC=m
CONFIG_SLAB=y
# CONFIG_COMPAT_BRK is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_SYN_COOKIES=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_MIP6=m
CONFIG_IPV6_TUNNEL=m
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
CONFIG_NETFILTER=y
CONFIG_NETFILTER_NETLINK_QUEUE=m
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CT_PROTO_SCTP=y
CONFIG_NF_CT_PROTO_UDPLITE=y
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_H323=m
CONFIG_NF_CONNTRACK_IRC=m
CONFIG_NF_CONNTRACK_NETBIOS_NS=m
CONFIG_NF_CONNTRACK_PPTP=m
CONFIG_NF_CONNTRACK_SANE=m
CONFIG_NF_CONNTRACK_SIP=m
CONFIG_NF_CONNTRACK_TFTP=m
CONFIG_NF_CT_NETLINK=m
CONFIG_NF_NAT=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
CONFIG_NETFILTER_XT_TARGET_LED=m
CONFIG_NETFILTER_XT_TARGET_MARK=m
CONFIG_NETFILTER_XT_TARGET_NFLOG=m
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
CONFIG_NETFILTER_XT_MATCH_COMMENT=m
CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
CONFIG_NETFILTER_XT_MATCH_DCCP=m
CONFIG_NETFILTER_XT_MATCH_DSCP=m
CONFIG_NETFILTER_XT_MATCH_ESP=m
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
CONFIG_NETFILTER_XT_MATCH_HELPER=m
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
CONFIG_NETFILTER_XT_MATCH_LIMIT=m
CONFIG_NETFILTER_XT_MATCH_MAC=m
CONFIG_NETFILTER_XT_MATCH_MARK=m
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
CONFIG_NETFILTER_XT_MATCH_POLICY=m
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
CONFIG_NETFILTER_XT_MATCH_QUOTA=m
CONFIG_NETFILTER_XT_MATCH_REALM=m
CONFIG_NETFILTER_XT_MATCH_SCTP=m
CONFIG_NETFILTER_XT_MATCH_STATE=m
CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
CONFIG_NETFILTER_XT_MATCH_STRING=m
CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
CONFIG_NETFILTER_XT_MATCH_TIME=m
CONFIG_NETFILTER_XT_MATCH_U32=m
CONFIG_NF_CONNTRACK_IPV4=m
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_ADDRTYPE=m
CONFIG_IP_NF_MATCH_AH=m
CONFIG_IP_NF_MATCH_ECN=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_TARGET_LOG=m
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_NETMAP=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_NF_NAT_SNMP_BASIC=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_CLUSTERIP=m
CONFIG_IP_NF_TARGET_ECN=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
CONFIG_NF_CONNTRACK_IPV6=m
CONFIG_IP6_NF_IPTABLES=m
CONFIG_IP6_NF_MATCH_AH=m
CONFIG_IP6_NF_MATCH_EUI64=m
CONFIG_IP6_NF_MATCH_FRAG=m
CONFIG_IP6_NF_MATCH_OPTS=m
CONFIG_IP6_NF_MATCH_HL=m
CONFIG_IP6_NF_MATCH_IPV6HEADER=m
CONFIG_IP6_NF_MATCH_MH=m
CONFIG_IP6_NF_MATCH_RT=m
CONFIG_IP6_NF_TARGET_HL=m
CONFIG_IP6_NF_FILTER=m
CONFIG_IP6_NF_TARGET_REJECT=m
CONFIG_IP6_NF_MANGLE=m
CONFIG_IP6_NF_RAW=m
CONFIG_BRIDGE=m
CONFIG_BT=y
CONFIG_BT_RFCOMM=y
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=y
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=y
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIBTSDIO=m
CONFIG_BT_HCIUART=y
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIBCM203X=m
CONFIG_BT_HCIBPA10X=m
CONFIG_BT_HCIBFUSB=m
CONFIG_BT_HCIVHCI=m
CONFIG_BT_MRVL=m
CONFIG_BT_MRVL_SDIO=m
# CONFIG_WIRELESS is not set
CONFIG_FW_LOADER=m
CONFIG_CONNECTOR=m
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
# CONFIG_MTD_CFI_I2 is not set
CONFIG_MTD_OTP=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PXA2XX=y
CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_FILTER=y
CONFIG_PPP_MULTILINK=y
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_WLAN is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_PXA27x=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_PCAP=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_PCAP=y
# CONFIG_SERIO is not set
CONFIG_LEGACY_PTY_COUNT=8
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_PXA=y
CONFIG_SPI=y
CONFIG_SPI_PXA2XX=y
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_SUPPLY=y
# CONFIG_HWMON is not set
CONFIG_EZX_PCAP=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_DEBUG=y
CONFIG_REGULATOR_PCAP=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_VIDEO_DEV=y
CONFIG_MEDIA_TUNER_CUSTOMISE=y
CONFIG_RADIO_TEA5764=y
# CONFIG_MEDIA_TUNER_MC44S803 is not set
# CONFIG_MEDIA_TUNER_MT2060 is not set
# CONFIG_MEDIA_TUNER_MT20XX is not set
# CONFIG_MEDIA_TUNER_MT2131 is not set
# CONFIG_MEDIA_TUNER_MT2266 is not set
# CONFIG_MEDIA_TUNER_MXL5005S is not set
# CONFIG_MEDIA_TUNER_MXL5007T is not set
# CONFIG_MEDIA_TUNER_QT1010 is not set
# CONFIG_MEDIA_TUNER_SIMPLE is not set
# CONFIG_MEDIA_TUNER_TDA18271 is not set
# CONFIG_MEDIA_TUNER_TDA827X is not set
# CONFIG_MEDIA_TUNER_TDA8290 is not set
# CONFIG_MEDIA_TUNER_TDA9887 is not set
# CONFIG_MEDIA_TUNER_TEA5761 is not set
# CONFIG_MEDIA_TUNER_TEA5767 is not set
# CONFIG_MEDIA_TUNER_XC2028 is not set
# CONFIG_MEDIA_TUNER_XC5000 is not set
# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
CONFIG_VIDEO_PXA27x=y
# CONFIG_V4L_USB_DRIVERS is not set
CONFIG_FB=y
CONFIG_FB_PXA=y
CONFIG_FB_PXA_OVERLAY=y
CONFIG_FB_PXA_PARAMETERS=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_MIXER_OSS=y
CONFIG_SND_PCM_OSS=y
# CONFIG_SND_DRIVERS is not set
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=y
CONFIG_SND_PXA2XX_SOC=y
CONFIG_HID_APPLE=m
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_GADGET=y
CONFIG_USB_PXA27X=y
CONFIG_USB_ETH=m
# CONFIG_USB_ETH_RNDIS is not set
CONFIG_MMC=y
CONFIG_SDIO_UART=m
CONFIG_MMC_PXA=y
CONFIG_MMC_SPI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_LP3944=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_PCAP=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=m
CONFIG_REISERFS_FS=m
CONFIG_REISERFS_FS_XATTR=y
CONFIG_REISERFS_FS_POSIX_ACL=y
CONFIG_REISERFS_FS_SECURITY=y
CONFIG_XFS_FS=m
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=m
CONFIG_CUSE=m
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=m
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_JFFS2_LZO=y
CONFIG_JFFS2_RUBIN=y
CONFIG_CRAMFS=m
CONFIG_SQUASHFS=m
CONFIG_ROMFS_FS=m
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFSD=m
CONFIG_NFSD_V3_ACL=y
CONFIG_SMB_FS=m
CONFIG_CIFS=m
CONFIG_CIFS_STATS=y
CONFIG_CIFS_XATTR=y
CONFIG_CIFS_POSIX=y
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_CODEPAGE_737=m
CONFIG_NLS_CODEPAGE_775=m
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_CODEPAGE_852=m
CONFIG_NLS_CODEPAGE_855=m
CONFIG_NLS_CODEPAGE_857=m
CONFIG_NLS_CODEPAGE_860=m
CONFIG_NLS_CODEPAGE_861=m
CONFIG_NLS_CODEPAGE_862=m
CONFIG_NLS_CODEPAGE_863=m
CONFIG_NLS_CODEPAGE_864=m
CONFIG_NLS_CODEPAGE_865=m
CONFIG_NLS_CODEPAGE_866=m
CONFIG_NLS_CODEPAGE_869=m
CONFIG_NLS_CODEPAGE_936=m
CONFIG_NLS_CODEPAGE_950=m
CONFIG_NLS_CODEPAGE_932=m
CONFIG_NLS_CODEPAGE_949=m
CONFIG_NLS_CODEPAGE_874=m
CONFIG_NLS_ISO8859_8=m
CONFIG_NLS_CODEPAGE_1250=m
CONFIG_NLS_CODEPAGE_1251=m
CONFIG_NLS_ASCII=m
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
CONFIG_NLS_ISO8859_4=m
CONFIG_NLS_ISO8859_5=m
CONFIG_NLS_ISO8859_6=m
CONFIG_NLS_ISO8859_7=m
CONFIG_NLS_ISO8859_9=m
CONFIG_NLS_ISO8859_13=m
CONFIG_NLS_ISO8859_14=m
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_KOI8_R=m
CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=m
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_RT_MUTEXES=y
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_CRYPTD=m
CONFIG_CRYPTO_TEST=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_XTS=m
CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_GHASH=m
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
CONFIG_CRYPTO_FCRYPT=m
CONFIG_CRYPTO_KHAZAD=m
CONFIG_CRYPTO_SEED=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_TWOFISH=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_FONTS=y
CONFIG_FONT_MINI_4x6=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
CONFIG_PROVE_LOCKING=y
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y

74
arch/arm/configs/h5000_defconfig
View File

@ -1,74 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
# CONFIG_UID16 is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_MACH_H5000=y
CONFIG_AEABI=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="keepinitrd"
CONFIG_KEXEC=y
CONFIG_FPE_NWFPE=y
CONFIG_PM=y
CONFIG_APM_EMULATION=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_SLAB=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=y
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_LEGACY_PTY_COUNT=32
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_VGA_CONSOLE is not set
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
# CONFIG_USB_ETH_RNDIS is not set
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_SA1100=y
CONFIG_EXT2_FS=y
# CONFIG_PROC_PAGE_MONITOR is not set
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
# CONFIG_NETWORK_FILESYSTEMS is not set
CONFIG_DEBUG_KERNEL=y
CONFIG_CRYPTO=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DEFLATE=y
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_CCITT=y
CONFIG_PRINTK_TIME=y
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_SCHED_DEBUG is not set
# CONFIG_FTRACE is not set

58
arch/arm/configs/lpd270_defconfig
View File

@ -1,58 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_MACH_LOGICPD_PXA270=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M"
CONFIG_FPE_NWFPE=y
CONFIG_MODULES=y
CONFIG_SLAB=y
CONFIG_NET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IPV6=y
# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
# CONFIG_INET6_XFRM_MODE_BEET is not set
# CONFIG_IPV6_SIT is not set
CONFIG_MTD=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_I1 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_BLK_DEV_NBD=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_SMC91X=y
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO_SERPORT is not set
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_FB=y
CONFIG_FB_PXA=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
# CONFIG_SND_SUPPORT_OLD_API is not set
CONFIG_SND_PXA2XX_AC97=y
CONFIG_EXT2_FS=y
CONFIG_MSDOS_FS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

53
arch/arm/configs/lubbock_defconfig
View File

@ -1,53 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_ARCH_LUBBOCK=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M"
CONFIG_FPE_NWFPE=y
CONFIG_MODULES=y
CONFIG_NET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IPV6 is not set
CONFIG_PCCARD=y
CONFIG_PCMCIA_PXA2XX=y
CONFIG_MTD=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_I1 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_NET_PCMCIA=y
CONFIG_PCMCIA_PCNET=y
CONFIG_SMC91X=y
CONFIG_INPUT_EVDEV=y
# CONFIG_SERIO_SERPORT is not set
CONFIG_SERIO_SA1111=y
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_USB_GADGET=y
CONFIG_USB_G_SERIAL=m
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_EXT2_FS=y
CONFIG_MSDOS_FS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

151
arch/arm/configs/magician_defconfig
View File

@ -1,151 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_NO_HZ_IDLE=y
CONFIG_PREEMPT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
# CONFIG_UID16 is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_MACH_H4700=y
CONFIG_MACH_MAGICIAN=y
CONFIG_AEABI=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="keepinitrd"
CONFIG_KEXEC=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_FPE_NWFPE=y
CONFIG_PM=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_SLAB=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=y
CONFIG_NETDEVICES=y
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_MPPE=m
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_PPP_ASYNC=m
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_PXA=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=m
CONFIG_I2C_PXA=y
CONFIG_W1_MASTER_DS1WM=y
CONFIG_HTC_EGPIO=y
CONFIG_POWER_SUPPLY=y
CONFIG_PDA_POWER=y
CONFIG_BATTERY_DS2760=y
# CONFIG_HWMON is not set
CONFIG_MFD_ASIC3=y
CONFIG_HTC_PASIC3=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_GPIO=y
CONFIG_FB=y
CONFIG_FB_PXA=y
CONFIG_FB_PXA_OVERLAY=y
CONFIG_FB_W100=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_SOUND=y
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
# CONFIG_SND_ARM is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=m
CONFIG_SND_PXA2XX_SOC=m
CONFIG_USB=y
CONFIG_USB_MON=m
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_GPIO_VBUS=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_VBUS_DRAW=500
CONFIG_USB_PXA27X=y
CONFIG_USB_ETH=m
# CONFIG_USB_ETH_RNDIS is not set
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_MMC=y
CONFIG_SDIO_UART=m
CONFIG_MMC_PXA=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DEBUG=y
CONFIG_RTC_DRV_PXA=y
CONFIG_EXT2_FS=y
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_JFFS2_LZO=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_DEFAULT="utf8"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_1251=m
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
CONFIG_CRYPTO=y
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_CCITT=y
CONFIG_FONTS=y
CONFIG_FONT_MINI_4x6=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_SCHED_DEBUG is not set
CONFIG_TIMER_STATS=y
# CONFIG_DEBUG_PREEMPT is not set
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

51
arch/arm/configs/mainstone_defconfig
View File

@ -1,51 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_MACH_MAINSTONE=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200 mem=64M"
CONFIG_FPE_NWFPE=y
CONFIG_MODULES=y
CONFIG_NET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IPV6 is not set
CONFIG_MTD=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_I1 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_SMC91X=y
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO_SERPORT is not set
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_FB=y
CONFIG_FB_PXA=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_EXT2_FS=y
CONFIG_MSDOS_FS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

75
arch/arm/configs/palmz72_defconfig
View File

@ -1,75 +0,0 @@
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_PREEMPT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_ARCH_PXA_PALM=y
# CONFIG_MACH_PALMTX is not set
CONFIG_AEABI=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="mem=32M console=tty root=/dev/mmcblk0"
CONFIG_FPE_NWFPE=y
CONFIG_PM=y
CONFIG_APM_EMULATION=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_SLAB=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_IPV6 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_PXA27x=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_PXA=y
CONFIG_SPI=y
CONFIG_SPI_SPIDEV=y
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_SUPPLY=y
CONFIG_PDA_POWER=y
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_FB_PXA=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_USB_SUPPORT is not set
CONFIG_MMC=y
CONFIG_MMC_DEBUG=y
CONFIG_MMC_PXA=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_PXA=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_DNOTIFY is not set
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=866
CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
CONFIG_TMPFS=y
# CONFIG_NETWORK_FILESYSTEMS is not set
CONFIG_NLS_DEFAULT="utf8"
CONFIG_NLS_CODEPAGE_866=y
CONFIG_NLS_UTF8=y
CONFIG_CRC_T10DIF=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_DEBUG_USER=y

90
arch/arm/configs/pcm027_defconfig
View File

@ -1,90 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
# CONFIG_KALLSYMS is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_MACH_PCM027=y
CONFIG_MACH_PCM990_BASEBOARD=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
# CONFIG_SWAP is not set
CONFIG_SLAB=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=y
# CONFIG_BLK_DEV is not set
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_SMC91X=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_PXA=y
# CONFIG_HWMON is not set
# CONFIG_VGA_CONSOLE is not set
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_MIXER_OSS=y
CONFIG_SND_PCM_OSS=y
CONFIG_SND_PXA2XX_AC97=y
CONFIG_USB=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_MMC=y
CONFIG_MMC_PXA=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_PCF8563=m
CONFIG_RTC_DRV_PXA=m
CONFIG_EXT2_FS=m
CONFIG_EXT3_FS=m
# CONFIG_DNOTIFY is not set
CONFIG_VFAT_FS=m
CONFIG_FAT_DEFAULT_CODEPAGE=850
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15"
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_DEFAULT="iso8859-15"
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_15=y
CONFIG_MAGIC_SYSRQ=y

55
arch/arm/configs/pxa255-idp_defconfig
View File

@ -1,55 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_ARCH_PXA_IDP=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="root=/dev/nfs ip=dhcp console=ttyS0,115200 mem=64M"
CONFIG_FPE_NWFPE=y
CONFIG_MODULES=y
CONFIG_NET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IPV6 is not set
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
# CONFIG_MTD_CFI_I1 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_SMC91X=y
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO_SERPORT is not set
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_FB=y
CONFIG_FB_PXA=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_EXT2_FS=y
CONFIG_MSDOS_FS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_ISO8859_1=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

3
arch/arm/configs/pxa_defconfig
View File

@ -19,7 +19,6 @@ CONFIG_ARCH_GUMSTIX=y
CONFIG_PXA_SHARPSL=y
CONFIG_MACH_AKITA=y
CONFIG_MACH_BORZOI=y
CONFIG_PXA_SYSTEMS_CPLDS=y
CONFIG_AEABI=y
CONFIG_ARCH_FORCE_MAX_ORDER=9
CONFIG_CMDLINE="root=/dev/ram0 ro"
@ -397,9 +396,7 @@ CONFIG_FB_VIRTUAL=m
CONFIG_FB_SIMPLE=y
CONFIG_LCD_CORGI=m
CONFIG_LCD_PLATFORM=m
CONFIG_LCD_TOSA=m
CONFIG_BACKLIGHT_PWM=m
CONFIG_BACKLIGHT_TOSA=m
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_LOGO=y

207
arch/arm/configs/trizeps4_defconfig
View File

@ -1,207 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_PREEMPT=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_TRIZEPS_PXA=y
CONFIG_MACH_TRIZEPS4=y
CONFIG_AEABI=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="root=fe01 console=ttyS0,38400n8 loglevel=5"
CONFIG_FPE_NWFPE=y
CONFIG_FPE_NWFPE_XP=y
CONFIG_PM=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_LDM_PARTITION=y
CONFIG_SLAB=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=m
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IPV6 is not set
CONFIG_NETFILTER=y
CONFIG_VLAN_8021Q=m
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=m
CONFIG_CFG80211=y
CONFIG_PCCARD=y
# CONFIG_PCMCIA_LOAD_CIS is not set
CONFIG_PCMCIA_PXA2XX=y
CONFIG_CONNECTOR=y
CONFIG_MTD=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
CONFIG_MTD_REDBOOT_PARTS_READONLY=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_LE_BYTE_SWAP=y
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_COMPLEX_MAPPINGS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_BLOCK2MTD=y
CONFIG_MTD_DOC2000=y
CONFIG_MTD_DOC2001=y
CONFIG_MTD_DOC2001PLUS=y
CONFIG_MTD_DOCPROBE_ADVANCED=y
CONFIG_MTD_DOCPROBE_ADDRESS=0x4000000
CONFIG_MTD_DOCPROBE_HIGH=y
CONFIG_MTD_ONENAND=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_DISKONCHIP=y
CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y
CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0x4000000
CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y
CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_NBD=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=8
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_ATA=m
CONFIG_PATA_PCMCIA=m
CONFIG_PATA_PLATFORM=m
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_DM9000=y
CONFIG_PHYLIB=y
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=m
CONFIG_PPP_MULTILINK=y
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
CONFIG_HOSTAP=y
CONFIG_HOSTAP_FIRMWARE=y
CONFIG_HOSTAP_FIRMWARE_NVRAM=y
CONFIG_HOSTAP_CS=y
CONFIG_HERMES=y
CONFIG_PCMCIA_HERMES=y
CONFIG_PCMCIA_SPECTRUM=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_ATKBD=m
# CONFIG_MOUSE_PS2 is not set
CONFIG_MOUSE_SERIAL=m
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_PXA=y
CONFIG_I2C_PXA_SLAVE=y
CONFIG_WATCHDOG=y
CONFIG_SA1100_WATCHDOG=y
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
CONFIG_FB_PXA=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_MIXER_OSS=y
CONFIG_SND_PCM_OSS=y
CONFIG_SND_VERBOSE_PRINTK=y
CONFIG_SND_DEBUG=y
CONFIG_SND_SEQUENCER=y
CONFIG_SND_PXA2XX_AC97=y
CONFIG_SND_USB_AUDIO=m
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=m
CONFIG_USB_SERIAL=m
CONFIG_USB_GADGET=m
CONFIG_USB_GADGET_DUMMY_HCD=y
CONFIG_MMC=y
CONFIG_MMC_PXA=y
CONFIG_NEW_LEDS=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_HCTOSYS is not set
CONFIG_RTC_DRV_PCF8583=m
CONFIG_RTC_DRV_PXA=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_AUTOFS4_FS=y
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=m
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15"
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=y
CONFIG_NFSD_V4=y
CONFIG_SMB_FS=m
CONFIG_CIFS=m
CONFIG_NLS_DEFAULT="iso8859-15"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_UTF8=m
CONFIG_KEYS=y
CONFIG_SECURITY=y
CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_DEFLATE=m
CONFIG_CRC_CCITT=y
CONFIG_CRC16=y
CONFIG_LIBCRC32C=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_USER=y

160
arch/arm/configs/viper_defconfig
View File

@ -1,160 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=13
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_EXPERT=y
# CONFIG_ELF_CORE is not set
# CONFIG_SHMEM is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_ARCH_VIPER=y
CONFIG_IWMMXT=y
CONFIG_AEABI=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="root=31:02 rootfstype=jffs2 ro console=ttyS0,115200"
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=m
CONFIG_CPU_FREQ_GOV_USERSPACE=m
CONFIG_CPU_FREQ_GOV_ONDEMAND=m
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
CONFIG_FPE_FASTFPE=y
CONFIG_PM=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
# CONFIG_SWAP is not set
CONFIG_SLAB=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_SYN_COOKIES=y
# CONFIG_IPV6 is not set
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_PCCARD=m
CONFIG_PCMCIA_PXA2XX=m
CONFIG_FW_LOADER=m
CONFIG_MTD=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=0
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
# CONFIG_MTD_CFI_I2 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_RAM=y
CONFIG_MTD_COMPLEX_MAPPINGS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PXA2XX=y
CONFIG_BLK_DEV_LOOP=m
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=m
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ATA=m
# CONFIG_SATA_PMP is not set
CONFIG_PATA_PCMCIA=m
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_SMC91X=y
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_ASYNC=m
CONFIG_USB_PEGASUS=m
CONFIG_USB_USBNET=m
# CONFIG_USB_NET_CDC_SUBSET is not set
CONFIG_NET_PCMCIA=y
CONFIG_INPUT_MOUSEDEV=m
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=m
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_FUJITSU=m
CONFIG_TOUCHSCREEN_ELO=m
CONFIG_TOUCHSCREEN_MTOUCH=m
CONFIG_TOUCHSCREEN_INEXIO=m
CONFIG_TOUCHSCREEN_HTCPEN=m
CONFIG_TOUCHSCREEN_PENMOUNT=m
CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
CONFIG_TOUCHSCREEN_TOUCHWIN=m
CONFIG_TOUCHSCREEN_TOUCHIT213=m
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
# CONFIG_CONSOLE_TRANSLATIONS is not set
# CONFIG_VT_CONSOLE is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=m
CONFIG_SERIAL_8250_NR_UARTS=5
CONFIG_SERIAL_8250_RUNTIME_UARTS=5
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_HELPER_AUTO is not set
CONFIG_I2C_PXA=y
CONFIG_GPIO_SYSFS=y
CONFIG_WATCHDOG=y
CONFIG_FB=y
CONFIG_FB_PXA=m
CONFIG_FB_PXA_PARAMETERS=y
CONFIG_BACKLIGHT_PWM=m
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
CONFIG_SND_PXA2XX_AC97=m
CONFIG_USB=m
CONFIG_USB_ISP116X_HCD=m
CONFIG_USB_SL811_HCD=m
CONFIG_USB_R8A66597_HCD=m
CONFIG_USB_ACM=m
CONFIG_USB_STORAGE=m
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_MCT_U232=m
CONFIG_USB_GADGET=m
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_G_PRINTER=m
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_DS1307=m
CONFIG_RTC_DRV_SA1100=m
CONFIG_EXT2_FS=m
CONFIG_EXT3_FS=m
# CONFIG_EXT3_FS_XATTR is not set
# CONFIG_DNOTIFY is not set
CONFIG_VFAT_FS=m
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=m
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_UTF8=m
CONFIG_CRC_T10DIF=m
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_MUTEXES=y
# CONFIG_FTRACE is not set
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_ARC4=m

90
arch/arm/configs/xcep_defconfig
View File

@ -1,90 +0,0 @@
CONFIG_LOCALVERSION=".xcep-itech"
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
# CONFIG_UID16 is not set
# CONFIG_SHMEM is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_MACH_XCEP=y
CONFIG_IWMMXT=y
CONFIG_AEABI=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="root=mtd4 rootfstype=jffs2 ro console=ttyS0,115200"
CONFIG_FPE_NWFPE=y
CONFIG_KPROBES=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLOCK is not set
CONFIG_SLUB=y
CONFIG_SLUB_TINY=y
# CONFIG_COMPAT_BRK is not set
# CONFIG_VM_EVENT_COUNTERS is not set
CONFIG_NET=y
CONFIG_PACKET=m
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FW_LOADER is not set
CONFIG_MTD_COMPLEX_MAPPINGS=y
CONFIG_MTD_PXA2XX=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=m
CONFIG_I2C_CHARDEV=m
CONFIG_I2C_PXA=m
CONFIG_HWMON=m
CONFIG_SENSORS_ADM1021=m
CONFIG_SENSORS_MAX6650=m
# CONFIG_VGA_CONSOLE is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_SA1100=m
CONFIG_DMADEVICES=y
# CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_WBUF_VERIFY=y
CONFIG_NFS_FS=m
CONFIG_NFS_V3=y
CONFIG_NLS=m
CONFIG_NLS_DEFAULT="utf8"
CONFIG_NLS_UTF8=m
# CONFIG_CRYPTO_HW is not set
CONFIG_LIBCRC32C=m
CONFIG_PRINTK_TIME=y
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_FTRACE is not set
# CONFIG_ARM_UNWIND is not set
# CONFIG_CRYPTO_ANSI_CPRNG is not set

173
arch/arm/configs/zeus_defconfig
View File

@ -1,173 +0,0 @@
CONFIG_SYSVIPC=y
CONFIG_TINY_RCU=y
CONFIG_LOG_BUF_SHIFT=13
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_PXA=y
CONFIG_MACH_ARCOM_ZEUS=y
CONFIG_AEABI=y
CONFIG_UNUSED_BOARD_FILES=y
CONFIG_CMDLINE="root=31:02 rootfstype=jffs2 ro console=ttyS0,115200"
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=m
CONFIG_CPU_FREQ_GOV_USERSPACE=m
CONFIG_CPU_FREQ_GOV_ONDEMAND=m
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
CONFIG_FPE_NWFPE=y
CONFIG_PM=y
CONFIG_APM_EMULATION=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_SYN_COOKIES=y
# CONFIG_IPV6 is not set
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_CFG80211=m
CONFIG_LIB80211=m
CONFIG_MAC80211=m
CONFIG_PCCARD=m
CONFIG_PCMCIA_PXA2XX=m
CONFIG_MTD=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_REDBOOT_PARTS_READONLY=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
# CONFIG_MTD_CFI_I2 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_RAM=y
CONFIG_MTD_COMPLEX_MAPPINGS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PXA2XX=y
CONFIG_BLK_DEV_LOOP=m
CONFIG_EEPROM_AT24=m
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=m
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ATA=m
# CONFIG_SATA_PMP is not set
CONFIG_PATA_PCMCIA=m
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_DM9000=y
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_ASYNC=m
CONFIG_HERMES=m
CONFIG_PCMCIA_HERMES=m
CONFIG_RT2X00=m
CONFIG_RT73USB=m
CONFIG_NET_PCMCIA=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=m
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_FUJITSU=m
CONFIG_TOUCHSCREEN_ELO=m
CONFIG_TOUCHSCREEN_MTOUCH=m
CONFIG_TOUCHSCREEN_INEXIO=m
CONFIG_TOUCHSCREEN_HTCPEN=m
CONFIG_TOUCHSCREEN_PENMOUNT=m
CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
CONFIG_TOUCHSCREEN_TOUCHWIN=m
CONFIG_TOUCHSCREEN_TOUCHIT213=m
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=7
CONFIG_SERIAL_8250_RUNTIME_UARTS=7
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_HELPER_AUTO is not set
CONFIG_I2C_GPIO=y
CONFIG_I2C_PXA=y
CONFIG_SPI=y
CONFIG_SPI_PXA2XX=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_PCA953X=y
CONFIG_SENSORS_LM75=m
CONFIG_WATCHDOG=y
CONFIG_FB=y
CONFIG_FB_PXA=m
CONFIG_FB_PXA_PARAMETERS=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
# CONFIG_SND_SUPPORT_OLD_API is not set
CONFIG_SND_PXA2XX_AC97=m
# CONFIG_SND_SPI is not set
# CONFIG_SND_PCMCIA is not set
CONFIG_SND_SOC=m
CONFIG_SND_PXA2XX_SOC=m
CONFIG_USB=m
CONFIG_USB_OHCI_HCD=m
CONFIG_USB_ACM=m
CONFIG_USB_STORAGE=m
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_MCT_U232=m
CONFIG_USB_GADGET=m
CONFIG_USB_PXA27X=y
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_G_PRINTER=m
CONFIG_MMC=y
CONFIG_MMC_PXA=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=m
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=m
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
CONFIG_LEDS_TRIGGER_BACKLIGHT=m
CONFIG_LEDS_TRIGGER_GPIO=m
CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_ISL1208=m
CONFIG_RTC_DRV_PXA=m
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
# CONFIG_DNOTIFY is not set
CONFIG_VFAT_FS=m
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=m
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_UTF8=m
CONFIG_CRC_T10DIF=m
CONFIG_DEBUG_KERNEL=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_MUTEXES=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

555
arch/arm/mach-pxa/Kconfig
View File

@ -16,10 +16,6 @@ menuconfig ARCH_PXA
if ARCH_PXA
menu "Intel PXA2xx/PXA3xx Implementations"
comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
config MACH_PXA25X_DT
bool "Support PXA25x platforms from device tree"
select PINCTRL
@ -58,115 +54,7 @@ config MACH_PXA3XX_DT
if ATAGS
config ARCH_LUBBOCK
bool "Intel DBPXA250 Development Platform (aka Lubbock)"
depends on UNUSED_BOARD_FILES
select GPIO_REG
select PXA25x
select SA1111
config MACH_MAINSTONE
bool "Intel HCDDBBVA0 Development Platform (aka Mainstone)"
depends on UNUSED_BOARD_FILES
select GPIO_REG
select PXA27x
config MACH_ZYLONITE
bool
select PXA3xx
config MACH_ZYLONITE300
bool "PXA3xx Development Platform (aka Zylonite) PXA300/310"
depends on UNUSED_BOARD_FILES
select CPU_PXA300
select CPU_PXA310
select MACH_ZYLONITE
config MACH_ZYLONITE320
bool "PXA3xx Development Platform (aka Zylonite) PXA320"
depends on UNUSED_BOARD_FILES
select CPU_PXA320
select MACH_ZYLONITE
config MACH_LITTLETON
bool "PXA3xx Form Factor Platform (aka Littleton)"
depends on UNUSED_BOARD_FILES
select CPU_PXA300
select CPU_PXA310
select PXA3xx
config MACH_TAVOREVB
bool "PXA930 Evaluation Board (aka TavorEVB)"
depends on UNUSED_BOARD_FILES
select CPU_PXA930
select CPU_PXA935
select PXA3xx
select FB
select FB_PXA
config MACH_SAAR
bool "PXA930 Handheld Platform (aka SAAR)"
depends on UNUSED_BOARD_FILES
select CPU_PXA930
select CPU_PXA935
select PXA3xx
select FB
select FB_PXA
comment "Third Party Dev Platforms (sorted by vendor name)"
config ARCH_PXA_IDP
bool "Accelent Xscale IDP"
depends on UNUSED_BOARD_FILES
select PXA25x
config ARCH_VIPER
bool "Arcom/Eurotech VIPER SBC"
depends on UNUSED_BOARD_FILES
select ARCOM_PCMCIA
select I2C_GPIO if I2C=y
select ISA
select PXA25x
config MACH_ARCOM_ZEUS
bool "Arcom/Eurotech ZEUS SBC"
depends on UNUSED_BOARD_FILES
select ARCOM_PCMCIA
select ISA
select PXA27x
config MACH_BALLOON3
bool "Balloon 3 board"
depends on UNUSED_BOARD_FILES
select IWMMXT
select PXA27x
config MACH_CSB726
bool "Enable Cogent CSB726 System On a Module"
depends on UNUSED_BOARD_FILES
select IWMMXT
select PXA27x
help
Say Y here if you intend to run this kernel on a Cogent
CSB726 System On Module.
config CSB726_CSB701
bool "Enable support for CSB701 baseboard"
depends on UNUSED_BOARD_FILES
depends on MACH_CSB726
config MACH_CM_X300
bool "CompuLab CM-X300 modules"
depends on UNUSED_BOARD_FILES
select CPU_PXA300
select CPU_PXA310
select PXA3xx
config MACH_CAPC7117
bool "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM"
depends on UNUSED_BOARD_FILES
select CPU_PXA320
select PXA3xx
comment "Legacy board files"
config ARCH_GUMSTIX
bool "Gumstix XScale 255 boards"
@ -187,307 +75,6 @@ config GUMSTIX_AM300EPD
endchoice
config MACH_XCEP
bool "Iskratel Electronics XCEP"
depends on UNUSED_BOARD_FILES
select MTD
select MTD_CFI
select MTD_CFI_INTELEXT
select MTD_PHYSMAP
select PXA25x
help
PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash.
Tuned for usage in Libera instruments for particle accelerators.
config TRIZEPS_PXA
bool "PXA based Keith und Koep Trizeps DIMM-Modules"
depends on UNUSED_BOARD_FILES
config MACH_TRIZEPS4
bool "Keith und Koep Trizeps4 DIMM-Module"
depends on TRIZEPS_PXA
select PXA27x
select TRIZEPS_PCMCIA
config MACH_TRIZEPS4WL
bool "Keith und Koep Trizeps4-WL DIMM-Module"
depends on TRIZEPS_PXA
select MACH_TRIZEPS4
select PXA27x
select TRIZEPS_PCMCIA
choice
prompt "Select base board for Trizeps module"
depends on TRIZEPS_PXA
config MACH_TRIZEPS_CONXS
bool "ConXS Eval Board"
config MACH_TRIZEPS_UCONXS
bool "uConXS Eval Board"
config MACH_TRIZEPS_ANY
bool "another Board"
endchoice
config ARCOM_PCMCIA
bool
help
Generic option for Arcom Viper/Zeus PCMCIA
config TRIZEPS_PCMCIA
bool
help
Enable PCMCIA support for Trizeps modules
config MACH_LOGICPD_PXA270
bool "LogicPD PXA270 Card Engine Development Platform"
depends on UNUSED_BOARD_FILES
select PXA27x
config MACH_PCM027
bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
depends on UNUSED_BOARD_FILES
select IWMMXT
select PXA27x
config MACH_PCM990_BASEBOARD
bool "PHYTEC PCM-990 development board"
depends on UNUSED_BOARD_FILES
depends on MACH_PCM027
choice
prompt "display on pcm990"
depends on MACH_PCM990_BASEBOARD
config PCM990_DISPLAY_SHARP
bool "sharp lq084v1dg21 stn display"
config PCM990_DISPLAY_NEC
bool "nec nl6448bc20_18d tft display"
config PCM990_DISPLAY_NONE
bool "no display"
endchoice
config MACH_COLIBRI
bool "Toradex Colibri PXA270"
depends on UNUSED_BOARD_FILES
select PXA27x
config MACH_COLIBRI_PXA270_INCOME
bool "Income s.r.o. PXA270 SBC"
depends on UNUSED_BOARD_FILES
depends on MACH_COLIBRI
select PXA27x
config MACH_COLIBRI300
bool "Toradex Colibri PXA300/310"
depends on UNUSED_BOARD_FILES
select CPU_PXA300
select CPU_PXA310
select PXA3xx
config MACH_COLIBRI320
bool "Toradex Colibri PXA320"
depends on UNUSED_BOARD_FILES
select CPU_PXA320
select PXA3xx
config MACH_COLIBRI_EVALBOARD
bool "Toradex Colibri Evaluation Carrier Board support"
depends on UNUSED_BOARD_FILES
depends on MACH_COLIBRI || MACH_COLIBRI300 || MACH_COLIBRI320
config MACH_VPAC270
bool "Voipac PXA270"
depends on UNUSED_BOARD_FILES
select HAVE_PATA_PLATFORM
select PXA27x
help
PXA270 based Single Board Computer.
comment "End-user Products (sorted by vendor name)"
config MACH_H4700
bool "HP iPAQ hx4700"
depends on UNUSED_BOARD_FILES
select IWMMXT
select PXA27x
config MACH_H5000
bool "HP iPAQ h5000"
depends on UNUSED_BOARD_FILES
select PXA25x
config MACH_HIMALAYA
bool "HTC Himalaya Support"
depends on UNUSED_BOARD_FILES
select CPU_PXA26x
config MACH_MAGICIAN
bool "Enable HTC Magician Support"
depends on UNUSED_BOARD_FILES
select IWMMXT
select PXA27x
config MACH_MIOA701
bool "Mitac Mio A701 Support"
depends on UNUSED_BOARD_FILES
select IWMMXT
select PXA27x
help
Say Y here if you intend to run this kernel on a
MIO A701. Currently there is only basic support
for this PDA.
config PXA_EZX
bool "Motorola EZX Platform"
depends on UNUSED_BOARD_FILES
select IWMMXT
select PXA27x
config MACH_EZX_A780
bool "Motorola EZX A780"
default y
depends on PXA_EZX
config MACH_EZX_E680
bool "Motorola EZX E680"
default y
depends on PXA_EZX
config MACH_EZX_A1200
bool "Motorola EZX A1200"
default y
depends on PXA_EZX
config MACH_EZX_A910
bool "Motorola EZX A910"
default y
depends on PXA_EZX
config MACH_EZX_E6
bool "Motorola EZX E6"
default y
depends on PXA_EZX
config MACH_EZX_E2
bool "Motorola EZX E2"
default y
depends on PXA_EZX
config MACH_MP900C
bool "Nec Mobilepro 900/c"
depends on UNUSED_BOARD_FILES
select PXA25x
config ARCH_PXA_PALM
bool "PXA based Palm PDAs"
depends on UNUSED_BOARD_FILES
config MACH_PALM27X
bool
config MACH_PALMTE2
bool "Palm Tungsten|E2"
depends on UNUSED_BOARD_FILES
default y
depends on ARCH_PXA_PALM
select PXA25x
help
Say Y here if you intend to run this kernel on a Palm Tungsten|E2
handheld computer.
config MACH_PALMTC
bool "Palm Tungsten|C"
default y
depends on ARCH_PXA_PALM
select PXA25x
help
Say Y here if you intend to run this kernel on a Palm Tungsten|C
handheld computer.
config MACH_PALMT5
bool "Palm Tungsten|T5"
depends on UNUSED_BOARD_FILES
default y
depends on ARCH_PXA_PALM
select IWMMXT
select MACH_PALM27X
select PXA27x
help
Say Y here if you intend to run this kernel on a Palm Tungsten|T5
handheld computer.
config MACH_PALMTX
bool "Palm T|X"
depends on UNUSED_BOARD_FILES
default y
depends on ARCH_PXA_PALM
select IWMMXT
select MACH_PALM27X
select PXA27x
help
Say Y here if you intend to run this kernel on a Palm T|X
handheld computer.
config MACH_PALMZ72
bool "Palm Zire 72"
depends on UNUSED_BOARD_FILES
default y
depends on ARCH_PXA_PALM
select IWMMXT
select MACH_PALM27X
select PXA27x
help
Say Y here if you intend to run this kernel on Palm Zire 72
handheld computer.
config MACH_PALMLD
bool "Palm LifeDrive"
depends on UNUSED_BOARD_FILES
default y
depends on ARCH_PXA_PALM
select IWMMXT
select MACH_PALM27X
select PXA27x
help
Say Y here if you intend to run this kernel on a Palm LifeDrive
handheld computer.
config PALM_TREO
bool
depends on ARCH_PXA_PALM
config MACH_CENTRO
bool "Palm Centro 685 (GSM)"
depends on UNUSED_BOARD_FILES
default y
depends on ARCH_PXA_PALM
select IWMMXT
select MACH_PALM27X
select PALM_TREO
select PXA27x
help
Say Y here if you intend to run this kernel on Palm Centro 685 (GSM)
smartphone.
config MACH_TREO680
bool "Palm Treo 680"
depends on UNUSED_BOARD_FILES
default y
depends on ARCH_PXA_PALM
select IWMMXT
select MACH_PALM27X
select PALM_TREO
select PXA27x
help
Say Y here if you intend to run this kernel on Palm Treo 680
smartphone.
config PXA_SHARPSL
bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models"
select SHARP_PARAM
@ -507,34 +94,6 @@ config PXA_SHARPSL_DETECT_MACH_ID
the Zaurus machine ID at run-time. For latest kexec-based
boot loader, this is not necessary.
config MACH_POODLE
bool "Enable Sharp SL-5600 (Poodle) Support"
depends on PXA_SHARPSL
depends on UNUSED_BOARD_FILES
select PXA25x
select SHARP_LOCOMO
config MACH_CORGI
bool "Enable Sharp SL-C700 (Corgi) Support"
depends on PXA_SHARPSL
depends on UNUSED_BOARD_FILES
select PXA25x
select PXA_SHARP_C7xx
config MACH_SHEPHERD
bool "Enable Sharp SL-C750 (Shepherd) Support"
depends on PXA_SHARPSL
depends on UNUSED_BOARD_FILES
select PXA25x
select PXA_SHARP_C7xx
config MACH_HUSKY
bool "Enable Sharp SL-C760 (Husky) Support"
depends on PXA_SHARPSL
depends on UNUSED_BOARD_FILES
select PXA25x
select PXA_SHARP_C7xx
config MACH_AKITA
bool "Enable Sharp SL-1000 (Akita) Support"
depends on PXA_SHARPSL
@ -556,98 +115,7 @@ config MACH_BORZOI
select PXA27x
select PXA_SHARP_Cxx00
config MACH_TOSA
bool "Enable Sharp SL-6000x (Tosa) Support"
depends on UNUSED_BOARD_FILES
depends on PXA_SHARPSL
select PXA25x
config TOSA_BT
tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
depends on MACH_TOSA && NET
select RFKILL
help
This is a simple driver that is able to control
the state of built in bluetooth chip on tosa.
config TOSA_USE_EXT_KEYCODES
bool "Tosa keyboard: use extended keycodes"
depends on MACH_TOSA
help
Say Y here to enable the tosa keyboard driver to generate extended
(>= 127) keycodes. Be aware, that they can't be correctly interpreted
by either console keyboard driver or by Kdrive keybd driver.
Say Y only if you know, what you are doing!
config MACH_ICONTROL
bool "TMT iControl/SafeTCam based on the MXM-8x10 CoM"
depends on UNUSED_BOARD_FILES
select CPU_PXA320
select PXA3xx
config ARCH_PXA_ESERIES
bool "PXA based Toshiba e-series PDAs"
depends on UNUSED_BOARD_FILES
select FB_W100
select FB
select PXA25x
config MACH_E330
bool "Toshiba e330"
default y
depends on ARCH_PXA_ESERIES
help
Say Y here if you intend to run this kernel on a Toshiba
e330 family PDA.
config MACH_E350
bool "Toshiba e350"
default y
depends on ARCH_PXA_ESERIES
help
Say Y here if you intend to run this kernel on a Toshiba
e350 family PDA.
config MACH_E740
bool "Toshiba e740"
default y
depends on ARCH_PXA_ESERIES
help
Say Y here if you intend to run this kernel on a Toshiba
e740 family PDA.
config MACH_E750
bool "Toshiba e750"
default y
depends on ARCH_PXA_ESERIES
help
Say Y here if you intend to run this kernel on a Toshiba
e750 family PDA.
config MACH_E400
bool "Toshiba e400"
default y
depends on ARCH_PXA_ESERIES
help
Say Y here if you intend to run this kernel on a Toshiba
e400 family PDA.
config MACH_E800
bool "Toshiba e800"
default y
depends on ARCH_PXA_ESERIES
help
Say Y here if you intend to run this kernel on a Toshiba
e800 family PDA.
config MACH_ZIPIT2
bool "Zipit Z2 Handheld"
depends on UNUSED_BOARD_FILES
select PXA27x
endif # ATAGS
endmenu
config PXA25x
bool
@ -661,12 +129,6 @@ config PXA27x
help
Select code specific to PXA27x variants
config CPU_PXA26x
bool
select PXA25x
help
Select code specific to PXA26x (codename Dalhart)
config PXA3xx
bool
select CPU_XSC3
@ -704,12 +166,6 @@ config CPU_PXA935
help
PXA935 (codename Tavor-P65)
config PXA_SHARP_C7xx
bool
select SHARPSL_PM
help
Enable support for all Sharp C7xx models
config PXA_SHARP_Cxx00
bool
select SHARPSL_PM
@ -731,13 +187,4 @@ config SHARPSL_PM_MAX1111
config PXA310_ULPI
bool
config PXA_SYSTEMS_CPLDS
tristate "Motherboard cplds"
default ARCH_LUBBOCK || MACH_MAINSTONE
help
This driver supports the Lubbock and Mainstone multifunction chip
found on the pxa25x development platform system (Lubbock) and pxa27x
development platform system (Mainstone). This IO board supports the
interrupts handling, ethernet controller, flash chips, etc ...
endif

56
arch/arm/mach-pxa/Makefile
View File

@ -24,66 +24,10 @@ obj-$(CONFIG_MACH_PXA25X_DT) += pxa-dt.o
obj-$(CONFIG_MACH_PXA27X_DT) += pxa-dt.o
obj-$(CONFIG_MACH_PXA3XX_DT) += pxa-dt.o
# Intel/Marvell Dev Platforms
obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
obj-$(CONFIG_MACH_ZYLONITE300) += zylonite.o zylonite_pxa300.o
obj-$(CONFIG_MACH_ZYLONITE320) += zylonite.o zylonite_pxa320.o
obj-$(CONFIG_MACH_LITTLETON) += littleton.o
obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
obj-$(CONFIG_MACH_SAAR) += saar.o
# 3rd Party Dev Platforms
obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
obj-$(CONFIG_ARCH_VIPER) += viper.o
obj-$(CONFIG_MACH_ARCOM_ZEUS) += zeus.o
obj-$(CONFIG_ARCOM_PCMCIA) += viper-pcmcia.o
obj-$(CONFIG_MACH_BALLOON3) += balloon3.o balloon3-pcmcia.o
obj-$(CONFIG_MACH_CSB726) += csb726.o
obj-$(CONFIG_CSB726_CSB701) += csb701.o
obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
obj-$(CONFIG_MACH_CAPC7117) += capc7117.o mxm8x10.o
obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o
obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o
obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o
obj-$(CONFIG_MACH_XCEP) += xcep.o
obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
obj-$(CONFIG_TRIZEPS_PCMCIA) += trizeps4-pcmcia.o
obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
obj-$(CONFIG_MACH_PCM027) += pcm027.o
obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o colibri-pcmcia.o
obj-$(CONFIG_MACH_COLIBRI_EVALBOARD) += colibri-evalboard.o
obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o
obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o
obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o colibri-pcmcia.o
obj-$(CONFIG_MACH_VPAC270) += vpac270.o vpac270-pcmcia.o
# End-user Products
obj-$(CONFIG_MACH_H4700) += hx4700.o
obj-$(CONFIG_MACH_H4700) += hx4700-pcmcia.o
obj-$(CONFIG_MACH_H5000) += h5000.o
obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o
obj-$(CONFIG_MACH_MAGICIAN) += magician.o
obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o
obj-$(CONFIG_PXA_EZX) += ezx.o
obj-$(CONFIG_MACH_MP900C) += mp900.o
obj-$(CONFIG_MACH_PALMTE2) += palmte2.o
obj-$(CONFIG_MACH_PALMTC) += palmtc.o palmtc-pcmcia.o
obj-$(CONFIG_MACH_PALM27X) += palm27x.o
obj-$(CONFIG_MACH_PALMT5) += palmt5.o
obj-$(CONFIG_MACH_PALMTX) += palmtx.o palmtx-pcmcia.o
obj-$(CONFIG_MACH_PALMZ72) += palmz72.o
obj-$(CONFIG_MACH_PALMLD) += palmld.o palmld-pcmcia.o
obj-$(CONFIG_PALM_TREO) += palmtreo.o
obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o
obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o
obj-$(CONFIG_MACH_POODLE) += poodle.o
obj-$(CONFIG_MACH_TOSA) += tosa.o
obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o
obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o
obj-$(CONFIG_MACH_E740) += e740-pcmcia.o
obj-$(CONFIG_MACH_ZIPIT2) += z2.o
obj-$(CONFIG_PXA_SYSTEMS_CPLDS) += pxa_cplds_irqs.o
obj-$(CONFIG_TOSA_BT) += tosa-bt.o

137
arch/arm/mach-pxa/balloon3-pcmcia.c
View File

@ -1,137 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/drivers/pcmcia/pxa2xx_balloon3.c
*
* Balloon3 PCMCIA specific routines.
*
* Author: Nick Bane
* Created: June, 2006
* Copyright: Toby Churchill Ltd
* Derived from pxa2xx_mainstone.c, by Nico Pitre
*
* Various modification by Marek Vasut <marek.vasut@gmail.com>
*/
#include <linux/module.h>
#include <linux/gpio.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
#include <linux/io.h>
#include "balloon3.h"
#include <asm/mach-types.h>
#include <pcmcia/soc_common.h>
static int balloon3_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
{
uint16_t ver;
ver = __raw_readw(BALLOON3_FPGA_VER);
if (ver < 0x4f08)
pr_warn("The FPGA code, version 0x%04x, is too old. "
"PCMCIA/CF support might be broken in this version!",
ver);
skt->socket.pci_irq = BALLOON3_BP_CF_NRDY_IRQ;
skt->stat[SOC_STAT_CD].gpio = BALLOON3_GPIO_S0_CD;
skt->stat[SOC_STAT_CD].name = "PCMCIA0 CD";
skt->stat[SOC_STAT_BVD1].irq = BALLOON3_BP_NSTSCHG_IRQ;
skt->stat[SOC_STAT_BVD1].name = "PCMCIA0 STSCHG";
return 0;
}
static unsigned long balloon3_pcmcia_status[2] = {
BALLOON3_CF_nSTSCHG_BVD1,
BALLOON3_CF_nSTSCHG_BVD1
};
static void balloon3_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
struct pcmcia_state *state)
{
uint16_t status;
int flip;
/* This actually reads the STATUS register */
status = __raw_readw(BALLOON3_CF_STATUS_REG);
flip = (status ^ balloon3_pcmcia_status[skt->nr])
& BALLOON3_CF_nSTSCHG_BVD1;
/*
* Workaround for STSCHG which can't be deasserted:
* We therefore disable/enable corresponding IRQs
* as needed to avoid IRQ locks.
*/
if (flip) {
balloon3_pcmcia_status[skt->nr] = status;
if (status & BALLOON3_CF_nSTSCHG_BVD1)
enable_irq(BALLOON3_BP_NSTSCHG_IRQ);
else
disable_irq(BALLOON3_BP_NSTSCHG_IRQ);
}
state->ready = !!(status & BALLOON3_CF_nIRQ);
state->bvd1 = !!(status & BALLOON3_CF_nSTSCHG_BVD1);
state->bvd2 = 0; /* not available */
state->vs_3v = 1; /* Always true its a CF card */
state->vs_Xv = 0; /* not available */
}
static int balloon3_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
const socket_state_t *state)
{
__raw_writew(BALLOON3_CF_RESET, BALLOON3_CF_CONTROL_REG +
((state->flags & SS_RESET) ?
BALLOON3_FPGA_SETnCLR : 0));
return 0;
}
static struct pcmcia_low_level balloon3_pcmcia_ops = {
.owner = THIS_MODULE,
.hw_init = balloon3_pcmcia_hw_init,
.socket_state = balloon3_pcmcia_socket_state,
.configure_socket = balloon3_pcmcia_configure_socket,
.first = 0,
.nr = 1,
};
static struct platform_device *balloon3_pcmcia_device;
static int __init balloon3_pcmcia_init(void)
{
int ret;
if (!machine_is_balloon3())
return -ENODEV;
balloon3_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
if (!balloon3_pcmcia_device)
return -ENOMEM;
ret = platform_device_add_data(balloon3_pcmcia_device,
&balloon3_pcmcia_ops, sizeof(balloon3_pcmcia_ops));
if (!ret)
ret = platform_device_add(balloon3_pcmcia_device);
if (ret)
platform_device_put(balloon3_pcmcia_device);
return ret;
}
static void __exit balloon3_pcmcia_exit(void)
{
platform_device_unregister(balloon3_pcmcia_device);
}
module_init(balloon3_pcmcia_init);
module_exit(balloon3_pcmcia_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Nick Bane <nick@cecomputing.co.uk>");
MODULE_ALIAS("platform:pxa2xx-pcmcia");
MODULE_DESCRIPTION("Balloon3 board CF/PCMCIA driver");

821
arch/arm/mach-pxa/balloon3.c
View File

@ -1,821 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/balloon3.c
*
* Support for Balloonboard.org Balloon3 board.
*
* Author: Nick Bane, Wookey, Jonathan McDowell
* Created: June, 2006
* Copyright: Toby Churchill Ltd
* Derived from mainstone.c, by Nico Pitre
*/
#include <linux/export.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/leds.h>
#include <linux/sched.h>
#include <linux/bitops.h>
#include <linux/fb.h>
#include <linux/gpio.h>
#include <linux/ioport.h>
#include <linux/ucb1400.h>
#include <linux/mtd/mtd.h>
#include <linux/types.h>
#include <linux/platform_data/pcf857x.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/mtd/platnand.h>
#include <linux/mtd/physmap.h>
#include <linux/regulator/max1586.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <linux/sizes.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/flash.h>
#include "pxa27x.h"
#include "balloon3.h"
#include <linux/platform_data/asoc-pxa.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include "udc.h"
#include "pxa27x-udc.h"
#include <linux/platform_data/irda-pxaficp.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include "generic.h"
#include "devices.h"
/******************************************************************************
* Pin configuration
******************************************************************************/
static unsigned long balloon3_pin_config[] __initdata = {
/* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
/* Reset, configured as GPIO wakeup source */
GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
};
/******************************************************************************
* Compatibility: Parameter parsing
******************************************************************************/
static unsigned long balloon3_irq_enabled;
static unsigned long balloon3_features_present =
(1 << BALLOON3_FEATURE_OHCI) | (1 << BALLOON3_FEATURE_CF) |
(1 << BALLOON3_FEATURE_AUDIO) |
(1 << BALLOON3_FEATURE_TOPPOLY);
int balloon3_has(enum balloon3_features feature)
{
return (balloon3_features_present & (1 << feature)) ? 1 : 0;
}
EXPORT_SYMBOL_GPL(balloon3_has);
int __init parse_balloon3_features(char *arg)
{
if (!arg)
return 0;
return kstrtoul(arg, 0, &balloon3_features_present);
}
early_param("balloon3_features", parse_balloon3_features);
/******************************************************************************
* Compact Flash slot
******************************************************************************/
#if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
static unsigned long balloon3_cf_pin_config[] __initdata = {
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO85_nPCE_1,
GPIO54_nPCE_2,
GPIO79_PSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
};
static void __init balloon3_cf_init(void)
{
if (!balloon3_has(BALLOON3_FEATURE_CF))
return;
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_cf_pin_config));
}
#else
static inline void balloon3_cf_init(void) {}
#endif
/******************************************************************************
* NOR Flash
******************************************************************************/
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct mtd_partition balloon3_nor_partitions[] = {
{
.name = "Flash",
.offset = 0x00000000,
.size = MTDPART_SIZ_FULL,
}
};
static struct physmap_flash_data balloon3_flash_data[] = {
{
.width = 2, /* bankwidth in bytes */
.parts = balloon3_nor_partitions,
.nr_parts = ARRAY_SIZE(balloon3_nor_partitions)
}
};
static struct resource balloon3_flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_64M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device balloon3_flash = {
.name = "physmap-flash",
.id = 0,
.resource = &balloon3_flash_resource,
.num_resources = 1,
.dev = {
.platform_data = balloon3_flash_data,
},
};
static void __init balloon3_nor_init(void)
{
platform_device_register(&balloon3_flash);
}
#else
static inline void balloon3_nor_init(void) {}
#endif
/******************************************************************************
* Audio and Touchscreen
******************************************************************************/
#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
static unsigned long balloon3_ac97_pin_config[] __initdata = {
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO113_AC97_nRESET,
GPIO95_GPIO,
};
static struct ucb1400_pdata vpac270_ucb1400_pdata = {
.irq = PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ),
};
static struct platform_device balloon3_ucb1400_device = {
.name = "ucb1400_core",
.id = -1,
.dev = {
.platform_data = &vpac270_ucb1400_pdata,
},
};
static void __init balloon3_ts_init(void)
{
if (!balloon3_has(BALLOON3_FEATURE_AUDIO))
return;
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ac97_pin_config));
pxa_set_ac97_info(NULL);
platform_device_register(&balloon3_ucb1400_device);
}
#else
static inline void balloon3_ts_init(void) {}
#endif
/******************************************************************************
* Framebuffer
******************************************************************************/
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static unsigned long balloon3_lcd_pin_config[] __initdata = {
GPIOxx_LCD_TFT_16BPP,
GPIO99_GPIO,
};
static struct pxafb_mode_info balloon3_lcd_modes[] = {
{
.pixclock = 38000,
.xres = 480,
.yres = 640,
.bpp = 16,
.hsync_len = 8,
.left_margin = 8,
.right_margin = 8,
.vsync_len = 2,
.upper_margin = 4,
.lower_margin = 5,
.sync = 0,
},
};
static struct pxafb_mach_info balloon3_lcd_screen = {
.modes = balloon3_lcd_modes,
.num_modes = ARRAY_SIZE(balloon3_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
static void balloon3_backlight_power(int on)
{
gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on);
}
static void __init balloon3_lcd_init(void)
{
int ret;
if (!balloon3_has(BALLOON3_FEATURE_TOPPOLY))
return;
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config));
ret = gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT, "BKL-ON");
if (ret) {
pr_err("Requesting BKL-ON GPIO failed!\n");
goto err;
}
ret = gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1);
if (ret) {
pr_err("Setting BKL-ON GPIO direction failed!\n");
goto err2;
}
balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power;
pxa_set_fb_info(NULL, &balloon3_lcd_screen);
return;
err2:
gpio_free(BALLOON3_GPIO_RUN_BACKLIGHT);
err:
return;
}
#else
static inline void balloon3_lcd_init(void) {}
#endif
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
static unsigned long balloon3_mmc_pin_config[] __initdata = {
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
};
static struct pxamci_platform_data balloon3_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.detect_delay_ms = 200,
};
static void __init balloon3_mmc_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_mmc_pin_config));
pxa_set_mci_info(&balloon3_mci_platform_data);
}
#else
static inline void balloon3_mmc_init(void) {}
#endif
/******************************************************************************
* USB Gadget
******************************************************************************/
#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
static void balloon3_udc_command(int cmd)
{
if (cmd == PXA2XX_UDC_CMD_CONNECT)
UP2OCR |= UP2OCR_DPPUE | UP2OCR_DPPUBE;
else if (cmd == PXA2XX_UDC_CMD_DISCONNECT)
UP2OCR &= ~UP2OCR_DPPUE;
}
static int balloon3_udc_is_connected(void)
{
return 1;
}
static struct pxa2xx_udc_mach_info balloon3_udc_info __initdata = {
.udc_command = balloon3_udc_command,
.udc_is_connected = balloon3_udc_is_connected,
.gpio_pullup = -1,
};
static void __init balloon3_udc_init(void)
{
pxa_set_udc_info(&balloon3_udc_info);
}
#else
static inline void balloon3_udc_init(void) {}
#endif
/******************************************************************************
* IrDA
******************************************************************************/
#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
static struct pxaficp_platform_data balloon3_ficp_platform_data = {
.transceiver_cap = IR_FIRMODE | IR_SIRMODE | IR_OFF,
};
static void __init balloon3_irda_init(void)
{
pxa_set_ficp_info(&balloon3_ficp_platform_data);
}
#else
static inline void balloon3_irda_init(void) {}
#endif
/******************************************************************************
* USB Host
******************************************************************************/
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static unsigned long balloon3_uhc_pin_config[] __initdata = {
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
};
static struct pxaohci_platform_data balloon3_ohci_info = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
};
static void __init balloon3_uhc_init(void)
{
if (!balloon3_has(BALLOON3_FEATURE_OHCI))
return;
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_uhc_pin_config));
pxa_set_ohci_info(&balloon3_ohci_info);
}
#else
static inline void balloon3_uhc_init(void) {}
#endif
/******************************************************************************
* LEDs
******************************************************************************/
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
static unsigned long balloon3_led_pin_config[] __initdata = {
GPIO9_GPIO, /* NAND activity LED */
GPIO10_GPIO, /* Heartbeat LED */
};
struct gpio_led balloon3_gpio_leds[] = {
{
.name = "balloon3:green:idle",
.default_trigger = "heartbeat",
.gpio = BALLOON3_GPIO_LED_IDLE,
.active_low = 1,
}, {
.name = "balloon3:green:nand",
.default_trigger = "nand-disk",
.gpio = BALLOON3_GPIO_LED_NAND,
.active_low = 1,
},
};
static struct gpio_led_platform_data balloon3_gpio_led_info = {
.leds = balloon3_gpio_leds,
.num_leds = ARRAY_SIZE(balloon3_gpio_leds),
};
static struct platform_device balloon3_leds = {
.name = "leds-gpio",
.id = 0,
.dev = {
.platform_data = &balloon3_gpio_led_info,
}
};
struct gpio_led balloon3_pcf_gpio_leds[] = {
{
.name = "balloon3:green:led0",
.gpio = BALLOON3_PCF_GPIO_LED0,
.active_low = 1,
}, {
.name = "balloon3:green:led1",
.gpio = BALLOON3_PCF_GPIO_LED1,
.active_low = 1,
}, {
.name = "balloon3:orange:led2",
.gpio = BALLOON3_PCF_GPIO_LED2,
.active_low = 1,
}, {
.name = "balloon3:orange:led3",
.gpio = BALLOON3_PCF_GPIO_LED3,
.active_low = 1,
}, {
.name = "balloon3:orange:led4",
.gpio = BALLOON3_PCF_GPIO_LED4,
.active_low = 1,
}, {
.name = "balloon3:orange:led5",
.gpio = BALLOON3_PCF_GPIO_LED5,
.active_low = 1,
}, {
.name = "balloon3:red:led6",
.gpio = BALLOON3_PCF_GPIO_LED6,
.active_low = 1,
}, {
.name = "balloon3:red:led7",
.gpio = BALLOON3_PCF_GPIO_LED7,
.active_low = 1,
},
};
static struct gpio_led_platform_data balloon3_pcf_gpio_led_info = {
.leds = balloon3_pcf_gpio_leds,
.num_leds = ARRAY_SIZE(balloon3_pcf_gpio_leds),
};
static struct platform_device balloon3_pcf_leds = {
.name = "leds-gpio",
.id = 1,
.dev = {
.platform_data = &balloon3_pcf_gpio_led_info,
}
};
static void __init balloon3_leds_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_led_pin_config));
platform_device_register(&balloon3_leds);
platform_device_register(&balloon3_pcf_leds);
}
#else
static inline void balloon3_leds_init(void) {}
#endif
/******************************************************************************
* FPGA IRQ
******************************************************************************/
static void balloon3_mask_irq(struct irq_data *d)
{
int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
balloon3_irq_enabled &= ~(1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
}
static void balloon3_unmask_irq(struct irq_data *d)
{
int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
balloon3_irq_enabled |= (1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
}
static struct irq_chip balloon3_irq_chip = {
.name = "FPGA",
.irq_ack = balloon3_mask_irq,
.irq_mask = balloon3_mask_irq,
.irq_unmask = balloon3_unmask_irq,
};
static void balloon3_irq_handler(struct irq_desc *desc)
{
unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
balloon3_irq_enabled;
do {
struct irq_data *d = irq_desc_get_irq_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
unsigned int irq;
/* clear useless edge notification */
if (chip->irq_ack)
chip->irq_ack(d);
while (pending) {
irq = BALLOON3_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
pending &= pending - 1;
}
pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
balloon3_irq_enabled;
} while (pending);
}
static void __init balloon3_init_irq(void)
{
int irq;
pxa27x_init_irq();
/* setup extra Balloon3 irqs */
for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) {
irq_set_chip_and_handler(irq, &balloon3_irq_chip,
handle_level_irq);
irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
}
irq_set_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler);
irq_set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING);
pr_debug("%s: chained handler installed - irq %d automatically "
"enabled\n", __func__, BALLOON3_AUX_NIRQ);
}
/******************************************************************************
* GPIO expander
******************************************************************************/
#if defined(CONFIG_GPIO_PCF857X) || defined(CONFIG_GPIO_PCF857X_MODULE)
static struct pcf857x_platform_data balloon3_pcf857x_pdata = {
.gpio_base = BALLOON3_PCF_GPIO_BASE,
.n_latch = 0,
.setup = NULL,
.teardown = NULL,
.context = NULL,
};
static struct i2c_board_info __initdata balloon3_i2c_devs[] = {
{
I2C_BOARD_INFO("pcf8574a", 0x38),
.platform_data = &balloon3_pcf857x_pdata,
},
};
static void __init balloon3_i2c_init(void)
{
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(balloon3_i2c_devs));
}
#else
static inline void balloon3_i2c_init(void) {}
#endif
/******************************************************************************
* NAND
******************************************************************************/
#if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
static void balloon3_nand_cmd_ctl(struct nand_chip *this, int cmd,
unsigned int ctrl)
{
uint8_t balloon3_ctl_set = 0, balloon3_ctl_clr = 0;
if (ctrl & NAND_CTRL_CHANGE) {
if (ctrl & NAND_CLE)
balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLCLE;
else
balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLCLE;
if (ctrl & NAND_ALE)
balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLALE;
else
balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLALE;
if (balloon3_ctl_clr)
__raw_writel(balloon3_ctl_clr,
BALLOON3_NAND_CONTROL_REG);
if (balloon3_ctl_set)
__raw_writel(balloon3_ctl_set,
BALLOON3_NAND_CONTROL_REG +
BALLOON3_FPGA_SETnCLR);
}
if (cmd != NAND_CMD_NONE)
writeb(cmd, this->legacy.IO_ADDR_W);
}
static void balloon3_nand_select_chip(struct nand_chip *this, int chip)
{
if (chip < 0 || chip > 3)
return;
/* Assert all nCE lines */
__raw_writew(
BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3,
BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
/* Deassert correct nCE line */
__raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip,
BALLOON3_NAND_CONTROL_REG);
}
static int balloon3_nand_dev_ready(struct nand_chip *this)
{
return __raw_readl(BALLOON3_NAND_STAT_REG) & BALLOON3_NAND_STAT_RNB;
}
static int balloon3_nand_probe(struct platform_device *pdev)
{
uint16_t ver;
int ret;
__raw_writew(BALLOON3_NAND_CONTROL2_16BIT,
BALLOON3_NAND_CONTROL2_REG + BALLOON3_FPGA_SETnCLR);
ver = __raw_readw(BALLOON3_FPGA_VER);
if (ver < 0x4f08)
pr_warn("The FPGA code, version 0x%04x, is too old. "
"NAND support might be broken in this version!", ver);
/* Power up the NAND chips */
ret = gpio_request(BALLOON3_GPIO_RUN_NAND, "NAND");
if (ret)
goto err1;
ret = gpio_direction_output(BALLOON3_GPIO_RUN_NAND, 1);
if (ret)
goto err2;
gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1);
/* Deassert all nCE lines and write protect line */
__raw_writel(
BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
BALLOON3_NAND_CONTROL_FLWP,
BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
return 0;
err2:
gpio_free(BALLOON3_GPIO_RUN_NAND);
err1:
return ret;
}
static void balloon3_nand_remove(struct platform_device *pdev)
{
/* Power down the NAND chips */
gpio_set_value(BALLOON3_GPIO_RUN_NAND, 0);
gpio_free(BALLOON3_GPIO_RUN_NAND);
}
static struct mtd_partition balloon3_partition_info[] = {
[0] = {
.name = "Boot",
.offset = 0,
.size = SZ_4M,
},
[1] = {
.name = "RootFS",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL
},
};
struct platform_nand_data balloon3_nand_pdata = {
.chip = {
.nr_chips = 4,
.chip_offset = 0,
.nr_partitions = ARRAY_SIZE(balloon3_partition_info),
.partitions = balloon3_partition_info,
.chip_delay = 50,
},
.ctrl = {
.dev_ready = balloon3_nand_dev_ready,
.select_chip = balloon3_nand_select_chip,
.cmd_ctrl = balloon3_nand_cmd_ctl,
.probe = balloon3_nand_probe,
.remove = balloon3_nand_remove,
},
};
static struct resource balloon3_nand_resource[] = {
[0] = {
.start = BALLOON3_NAND_BASE,
.end = BALLOON3_NAND_BASE + 0x4,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device balloon3_nand = {
.name = "gen_nand",
.num_resources = ARRAY_SIZE(balloon3_nand_resource),
.resource = balloon3_nand_resource,
.id = -1,
.dev = {
.platform_data = &balloon3_nand_pdata,
}
};
static void __init balloon3_nand_init(void)
{
platform_device_register(&balloon3_nand);
}
#else
static inline void balloon3_nand_init(void) {}
#endif
/******************************************************************************
* Core power regulator
******************************************************************************/
#if defined(CONFIG_REGULATOR_MAX1586) || \
defined(CONFIG_REGULATOR_MAX1586_MODULE)
static struct regulator_consumer_supply balloon3_max1587a_consumers[] = {
REGULATOR_SUPPLY("vcc_core", NULL),
};
static struct regulator_init_data balloon3_max1587a_v3_info = {
.constraints = {
.name = "vcc_core range",
.min_uV = 900000,
.max_uV = 1705000,
.always_on = 1,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
},
.consumer_supplies = balloon3_max1587a_consumers,
.num_consumer_supplies = ARRAY_SIZE(balloon3_max1587a_consumers),
};
static struct max1586_subdev_data balloon3_max1587a_subdevs[] = {
{
.name = "vcc_core",
.id = MAX1586_V3,
.platform_data = &balloon3_max1587a_v3_info,
}
};
static struct max1586_platform_data balloon3_max1587a_info = {
.subdevs = balloon3_max1587a_subdevs,
.num_subdevs = ARRAY_SIZE(balloon3_max1587a_subdevs),
.v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
};
static struct i2c_board_info __initdata balloon3_pi2c_board_info[] = {
{
I2C_BOARD_INFO("max1586", 0x14),
.platform_data = &balloon3_max1587a_info,
},
};
static void __init balloon3_pmic_init(void)
{
pxa27x_set_i2c_power_info(NULL);
i2c_register_board_info(1, ARRAY_AND_SIZE(balloon3_pi2c_board_info));
}
#else
static inline void balloon3_pmic_init(void) {}
#endif
/******************************************************************************
* Machine init
******************************************************************************/
static void __init balloon3_init(void)
{
ARB_CNTRL = ARB_CORE_PARK | 0x234;
pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
balloon3_i2c_init();
balloon3_irda_init();
balloon3_lcd_init();
balloon3_leds_init();
balloon3_mmc_init();
balloon3_nand_init();
balloon3_nor_init();
balloon3_pmic_init();
balloon3_ts_init();
balloon3_udc_init();
balloon3_uhc_init();
balloon3_cf_init();
}
static struct map_desc balloon3_io_desc[] __initdata = {
{ /* CPLD/FPGA */
.virtual = (unsigned long)BALLOON3_FPGA_VIRT,
.pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS),
.length = BALLOON3_FPGA_LENGTH,
.type = MT_DEVICE,
},
};
static void __init balloon3_map_io(void)
{
pxa27x_map_io();
iotable_init(balloon3_io_desc, ARRAY_SIZE(balloon3_io_desc));
}
MACHINE_START(BALLOON3, "Balloon3")
/* Maintainer: Nick Bane. */
.map_io = balloon3_map_io,
.nr_irqs = BALLOON3_NR_IRQS,
.init_irq = balloon3_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = balloon3_init,
.atag_offset = 0x100,
.restart = pxa_restart,
MACHINE_END

181
arch/arm/mach-pxa/balloon3.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* linux/include/asm-arm/arch-pxa/balloon3.h
*
* Authors: Nick Bane and Wookey
* Created: Oct, 2005
* Copyright: Toby Churchill Ltd
* Cribbed from mainstone.c, by Nicholas Pitre
*/
#ifndef ASM_ARCH_BALLOON3_H
#define ASM_ARCH_BALLOON3_H
#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */
enum balloon3_features {
BALLOON3_FEATURE_OHCI,
BALLOON3_FEATURE_MMC,
BALLOON3_FEATURE_CF,
BALLOON3_FEATURE_AUDIO,
BALLOON3_FEATURE_TOPPOLY,
};
#define BALLOON3_FPGA_PHYS PXA_CS4_PHYS
#define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */
#define BALLOON3_FPGA_LENGTH 0x01000000
#define BALLOON3_FPGA_SETnCLR (0x1000)
/* FPGA / CPLD registers for CF socket */
#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
/* FPGA / CPLD version register */
#define BALLOON3_FPGA_VER (BALLOON3_FPGA_VIRT + 0x00e0001c)
/* FPGA / CPLD registers for NAND flash */
#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000)
#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000)
#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
/* fpga/cpld interrupt control register */
#define BALLOON3_INT_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e0000C)
#define BALLOON3_VERSION_REG (BALLOON3_FPGA_VIRT + 0x00e0001c)
#define BALLOON3_SAMOSA_ADDR_REG (BALLOON3_FPGA_VIRT + 0x00c00000)
#define BALLOON3_SAMOSA_DATA_REG (BALLOON3_FPGA_VIRT + 0x00c00004)
#define BALLOON3_SAMOSA_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00c0001c)
/* CF Status Register bits (read-only) bits */
#define BALLOON3_CF_nIRQ (1 << 0)
#define BALLOON3_CF_nSTSCHG_BVD1 (1 << 1)
/* CF Control Set Register bits / CF Control Clear Register bits (write-only) */
#define BALLOON3_CF_RESET (1 << 0)
#define BALLOON3_CF_ENABLE (1 << 1)
#define BALLOON3_CF_ADD_ENABLE (1 << 2)
/* CF Interrupt sources */
#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
/* NAND Control register */
#define BALLOON3_NAND_CONTROL_FLWP (1 << 7)
#define BALLOON3_NAND_CONTROL_FLSE (1 << 6)
#define BALLOON3_NAND_CONTROL_FLCE3 (1 << 5)
#define BALLOON3_NAND_CONTROL_FLCE2 (1 << 4)
#define BALLOON3_NAND_CONTROL_FLCE1 (1 << 3)
#define BALLOON3_NAND_CONTROL_FLCE0 (1 << 2)
#define BALLOON3_NAND_CONTROL_FLALE (1 << 1)
#define BALLOON3_NAND_CONTROL_FLCLE (1 << 0)
/* NAND Status register */
#define BALLOON3_NAND_STAT_RNB (1 << 0)
/* NAND Control2 register */
#define BALLOON3_NAND_CONTROL2_16BIT (1 << 0)
/* GPIOs for irqs */
#define BALLOON3_GPIO_AUX_NIRQ (94)
#define BALLOON3_GPIO_CODEC_IRQ (95)
/* Timer and Idle LED locations */
#define BALLOON3_GPIO_LED_NAND (9)
#define BALLOON3_GPIO_LED_IDLE (10)
/* backlight control */
#define BALLOON3_GPIO_RUN_BACKLIGHT (99)
#define BALLOON3_GPIO_S0_CD (105)
/* NAND */
#define BALLOON3_GPIO_RUN_NAND (102)
/* PCF8574A Leds */
#define BALLOON3_PCF_GPIO_BASE 160
#define BALLOON3_PCF_GPIO_LED0 (BALLOON3_PCF_GPIO_BASE + 0)
#define BALLOON3_PCF_GPIO_LED1 (BALLOON3_PCF_GPIO_BASE + 1)
#define BALLOON3_PCF_GPIO_LED2 (BALLOON3_PCF_GPIO_BASE + 2)
#define BALLOON3_PCF_GPIO_LED3 (BALLOON3_PCF_GPIO_BASE + 3)
#define BALLOON3_PCF_GPIO_LED4 (BALLOON3_PCF_GPIO_BASE + 4)
#define BALLOON3_PCF_GPIO_LED5 (BALLOON3_PCF_GPIO_BASE + 5)
#define BALLOON3_PCF_GPIO_LED6 (BALLOON3_PCF_GPIO_BASE + 6)
#define BALLOON3_PCF_GPIO_LED7 (BALLOON3_PCF_GPIO_BASE + 7)
/* FPGA Interrupt Mask/Acknowledge Register */
#define BALLOON3_INT_S0_IRQ (1 << 0) /* PCMCIA 0 IRQ */
#define BALLOON3_INT_S0_STSCHG (1 << 1) /* PCMCIA 0 status changed */
/* CPLD (and FPGA) interface definitions */
#define CPLD_LCD0_DATA_SET 0x00
#define CPLD_LCD0_DATA_CLR 0x10
#define CPLD_LCD0_COMMAND_SET 0x01
#define CPLD_LCD0_COMMAND_CLR 0x11
#define CPLD_LCD1_DATA_SET 0x02
#define CPLD_LCD1_DATA_CLR 0x12
#define CPLD_LCD1_COMMAND_SET 0x03
#define CPLD_LCD1_COMMAND_CLR 0x13
#define CPLD_MISC_SET 0x07
#define CPLD_MISC_CLR 0x17
#define CPLD_MISC_LOON_NRESET_BIT 0
#define CPLD_MISC_LOON_UNSUSP_BIT 1
#define CPLD_MISC_RUN_5V_BIT 2
#define CPLD_MISC_CHG_D0_BIT 3
#define CPLD_MISC_CHG_D1_BIT 4
#define CPLD_MISC_DAC_NCS_BIT 5
#define CPLD_LCD_SET 0x08
#define CPLD_LCD_CLR 0x18
#define CPLD_LCD_BACKLIGHT_EN_0_BIT 0
#define CPLD_LCD_BACKLIGHT_EN_1_BIT 1
#define CPLD_LCD_LED_RED_BIT 4
#define CPLD_LCD_LED_GREEN_BIT 5
#define CPLD_LCD_NRESET_BIT 7
#define CPLD_LCD_RO_SET 0x09
#define CPLD_LCD_RO_CLR 0x19
#define CPLD_LCD_RO_LCD0_nWAIT_BIT 0
#define CPLD_LCD_RO_LCD1_nWAIT_BIT 1
#define CPLD_SERIAL_SET 0x0a
#define CPLD_SERIAL_CLR 0x1a
#define CPLD_SERIAL_GSM_RI_BIT 0
#define CPLD_SERIAL_GSM_CTS_BIT 1
#define CPLD_SERIAL_GSM_DTR_BIT 2
#define CPLD_SERIAL_LPR_CTS_BIT 3
#define CPLD_SERIAL_TC232_CTS_BIT 4
#define CPLD_SERIAL_TC232_DSR_BIT 5
#define CPLD_SROUTING_SET 0x0b
#define CPLD_SROUTING_CLR 0x1b
#define CPLD_SROUTING_MSP430_LPR 0
#define CPLD_SROUTING_MSP430_TC232 1
#define CPLD_SROUTING_MSP430_GSM 2
#define CPLD_SROUTING_LOON_LPR (0 << 4)
#define CPLD_SROUTING_LOON_TC232 (1 << 4)
#define CPLD_SROUTING_LOON_GSM (2 << 4)
#define CPLD_AROUTING_SET 0x0c
#define CPLD_AROUTING_CLR 0x1c
#define CPLD_AROUTING_MIC2PHONE_BIT 0
#define CPLD_AROUTING_PHONE2INT_BIT 1
#define CPLD_AROUTING_PHONE2EXT_BIT 2
#define CPLD_AROUTING_LOONL2INT_BIT 3
#define CPLD_AROUTING_LOONL2EXT_BIT 4
#define CPLD_AROUTING_LOONR2PHONE_BIT 5
#define CPLD_AROUTING_LOONR2INT_BIT 6
#define CPLD_AROUTING_LOONR2EXT_BIT 7
/* Balloon3 Interrupts */
#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x))
#define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ)
#define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ)
#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16)
extern int balloon3_has(enum balloon3_features feature);
#endif

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arch/arm/mach-pxa/capc7117.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/capc7117.c
*
* Support for the Embedian CAPC-7117 Evaluation Kit
* based on the Embedian MXM-8x10 Computer on Module
*
* Copyright (C) 2009 Embedian Inc.
* Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
*
* 2007-09-04: eric miao <eric.y.miao@gmail.com>
* rewrite to align with latest kernel
*
* 2010-01-09: Edwin Peer <epeer@tmtservices.co.za>
* Hennie van der Merwe <hvdmerwe@tmtservices.co.za>
* rework for upstream merge
*/
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <linux/serial_8250.h>
#include <linux/gpio.h>
#include <linux/regulator/machine.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "pxa320.h"
#include "mxm8x10.h"
#include "generic.h"
/* IDE (PATA) Support */
static struct pata_platform_info pata_platform_data = {
.ioport_shift = 1
};
static struct resource capc7117_ide_resources[] = {
[0] = {
.start = 0x11000020,
.end = 0x1100003f,
.flags = IORESOURCE_MEM
},
[1] = {
.start = 0x1100001c,
.end = 0x1100001c,
.flags = IORESOURCE_MEM
},
[2] = {
.start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
.end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING
}
};
static struct platform_device capc7117_ide_device = {
.name = "pata_platform",
.num_resources = ARRAY_SIZE(capc7117_ide_resources),
.resource = capc7117_ide_resources,
.dev = {
.platform_data = &pata_platform_data,
.coherent_dma_mask = ~0 /* grumble */
}
};
static void __init capc7117_ide_init(void)
{
platform_device_register(&capc7117_ide_device);
}
/* TI16C752 UART support */
#define TI16C752_FLAGS (UPF_BOOT_AUTOCONF | \
UPF_IOREMAP | \
UPF_BUGGY_UART | \
UPF_SKIP_TEST)
#define TI16C752_UARTCLK (22118400)
static struct plat_serial8250_port ti16c752_platform_data[] = {
[0] = {
.mapbase = 0x14000000,
.irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO78)),
.irqflags = IRQF_TRIGGER_RISING,
.flags = TI16C752_FLAGS,
.iotype = UPIO_MEM,
.regshift = 1,
.uartclk = TI16C752_UARTCLK
},
[1] = {
.mapbase = 0x14000040,
.irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO79)),
.irqflags = IRQF_TRIGGER_RISING,
.flags = TI16C752_FLAGS,
.iotype = UPIO_MEM,
.regshift = 1,
.uartclk = TI16C752_UARTCLK
},
[2] = {
.mapbase = 0x14000080,
.irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO80)),
.irqflags = IRQF_TRIGGER_RISING,
.flags = TI16C752_FLAGS,
.iotype = UPIO_MEM,
.regshift = 1,
.uartclk = TI16C752_UARTCLK
},
[3] = {
.mapbase = 0x140000c0,
.irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO81)),
.irqflags = IRQF_TRIGGER_RISING,
.flags = TI16C752_FLAGS,
.iotype = UPIO_MEM,
.regshift = 1,
.uartclk = TI16C752_UARTCLK
},
[4] = {
/* end of array */
}
};
static struct platform_device ti16c752_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = ti16c752_platform_data
}
};
static void __init capc7117_uarts_init(void)
{
platform_device_register(&ti16c752_device);
}
static void __init capc7117_init(void)
{
/* Init CoM */
mxm_8x10_barebones_init();
/* Init evaluation board peripherals */
mxm_8x10_ac97_init();
mxm_8x10_usb_host_init();
mxm_8x10_mmc_init();
capc7117_uarts_init();
capc7117_ide_init();
regulator_has_full_constraints();
}
MACHINE_START(CAPC7117,
"Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM")
.atag_offset = 0x100,
.map_io = pxa3xx_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa3xx_init_irq,
.handle_irq = pxa3xx_handle_irq,
.init_time = pxa_timer_init,
.init_machine = capc7117_init,
.restart = pxa_restart,
MACHINE_END

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arch/arm/mach-pxa/cm-x300.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/cm-x300.c
*
* Support for the CompuLab CM-X300 modules
*
* Copyright (C) 2008,2009 CompuLab Ltd.
*
* Mike Rapoport <mike@compulab.co.il>
* Igor Grinberg <grinberg@compulab.co.il>
*/
#define pr_fmt(fmt) "%s: " fmt, __func__
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/gpio.h>
#include <linux/gpio/machine.h>
#include <linux/dm9000.h>
#include <linux/leds.h>
#include <linux/platform_data/rtc-v3020.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/i2c.h>
#include <linux/platform_data/pca953x.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/mfd/da903x.h>
#include <linux/regulator/machine.h>
#include <linux/power_supply.h>
#include <linux/apm-emulation.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_gpio.h>
#include <linux/spi/tdo24m.h>
#include <linux/soc/pxa/cpu.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/setup.h>
#include <asm/system_info.h>
#include "pxa300.h"
#include "pxa27x-udc.h"
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#include <linux/platform_data/asoc-pxa.h>
#include <linux/platform_data/usb-pxa3xx-ulpi.h>
#include <asm/mach/map.h>
#include "generic.h"
#include "devices.h"
#define CM_X300_ETH_PHYS 0x08000010
#define GPIO82_MMC_IRQ (82)
#define GPIO85_MMC_WP (85)
#define CM_X300_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ)
#define GPIO95_RTC_CS (95)
#define GPIO96_RTC_WR (96)
#define GPIO97_RTC_RD (97)
#define GPIO98_RTC_IO (98)
#define GPIO_ULPI_PHY_RST (127)
static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = {
/* LCD */
GPIO54_LCD_LDD_0,
GPIO55_LCD_LDD_1,
GPIO56_LCD_LDD_2,
GPIO57_LCD_LDD_3,
GPIO58_LCD_LDD_4,
GPIO59_LCD_LDD_5,
GPIO60_LCD_LDD_6,
GPIO61_LCD_LDD_7,
GPIO62_LCD_LDD_8,
GPIO63_LCD_LDD_9,
GPIO64_LCD_LDD_10,
GPIO65_LCD_LDD_11,
GPIO66_LCD_LDD_12,
GPIO67_LCD_LDD_13,
GPIO68_LCD_LDD_14,
GPIO69_LCD_LDD_15,
GPIO72_LCD_FCLK,
GPIO73_LCD_LCLK,
GPIO74_LCD_PCLK,
GPIO75_LCD_BIAS,
/* BTUART */
GPIO111_UART2_RTS,
GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL,
GPIO113_UART2_TXD,
GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH,
/* STUART */
GPIO109_UART3_TXD,
GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL,
/* AC97 */
GPIO23_AC97_nACRESET,
GPIO24_AC97_SYSCLK,
GPIO29_AC97_BITCLK,
GPIO25_AC97_SDATA_IN_0,
GPIO27_AC97_SDATA_OUT,
GPIO28_AC97_SYNC,
/* Keypad */
GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH,
GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH,
GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH,
GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH,
GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH,
GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH,
GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH,
GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH,
GPIO121_KP_MKOUT_0,
GPIO122_KP_MKOUT_1,
GPIO123_KP_MKOUT_2,
GPIO124_KP_MKOUT_3,
GPIO125_KP_MKOUT_4,
GPIO4_2_KP_MKOUT_5,
/* MMC1 */
GPIO3_MMC1_DAT0,
GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH,
GPIO5_MMC1_DAT2,
GPIO6_MMC1_DAT3,
GPIO7_MMC1_CLK,
GPIO8_MMC1_CMD, /* CMD0 for slot 0 */
/* MMC2 */
GPIO9_MMC2_DAT0,
GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH,
GPIO11_MMC2_DAT2,
GPIO12_MMC2_DAT3,
GPIO13_MMC2_CLK,
GPIO14_MMC2_CMD,
/* FFUART */
GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL,
GPIO31_UART1_TXD,
GPIO32_UART1_CTS,
GPIO37_UART1_RTS,
GPIO33_UART1_DCD,
GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL,
GPIO35_UART1_RI,
GPIO36_UART1_DTR,
/* GPIOs */
GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */
GPIO85_GPIO, /* MMC WP */
GPIO99_GPIO, /* Ethernet IRQ */
/* RTC GPIOs */
GPIO95_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC CS */
GPIO96_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC WR */
GPIO97_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC RD */
GPIO98_GPIO, /* RTC IO */
/* Standard I2C */
GPIO21_I2C_SCL,
GPIO22_I2C_SDA,
/* PWM Backlight */
GPIO19_PWM2_OUT,
};
static mfp_cfg_t cm_x3xx_rev_lt130_mfp_cfg[] __initdata = {
/* GPIOs */
GPIO79_GPIO, /* LED */
GPIO77_GPIO, /* WiFi reset */
GPIO78_GPIO, /* BT reset */
};
static mfp_cfg_t cm_x3xx_rev_ge130_mfp_cfg[] __initdata = {
/* GPIOs */
GPIO76_GPIO, /* LED */
GPIO71_GPIO, /* WiFi reset */
GPIO70_GPIO, /* BT reset */
};
static mfp_cfg_t cm_x310_mfp_cfg[] __initdata = {
/* USB PORT 2 */
ULPI_STP,
ULPI_NXT,
ULPI_DIR,
GPIO30_ULPI_DATA_OUT_0,
GPIO31_ULPI_DATA_OUT_1,
GPIO32_ULPI_DATA_OUT_2,
GPIO33_ULPI_DATA_OUT_3,
GPIO34_ULPI_DATA_OUT_4,
GPIO35_ULPI_DATA_OUT_5,
GPIO36_ULPI_DATA_OUT_6,
GPIO37_ULPI_DATA_OUT_7,
GPIO38_ULPI_CLK,
/* external PHY reset pin */
GPIO127_GPIO,
/* USB PORT 3 */
GPIO77_USB_P3_1,
GPIO78_USB_P3_2,
GPIO79_USB_P3_3,
GPIO80_USB_P3_4,
GPIO81_USB_P3_5,
GPIO82_USB_P3_6,
GPIO0_2_USBH_PEN,
};
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource dm9000_resources[] = {
[0] = {
.start = CM_X300_ETH_PHYS,
.end = CM_X300_ETH_PHYS + 0x3,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = CM_X300_ETH_PHYS + 0x4,
.end = CM_X300_ETH_PHYS + 0x4 + 500,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
.end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
};
static struct dm9000_plat_data cm_x300_dm9000_platdata = {
.flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM,
};
static struct platform_device dm9000_device = {
.name = "dm9000",
.id = 0,
.num_resources = ARRAY_SIZE(dm9000_resources),
.resource = dm9000_resources,
.dev = {
.platform_data = &cm_x300_dm9000_platdata,
}
};
static void __init cm_x300_init_dm9000(void)
{
platform_device_register(&dm9000_device);
}
#else
static inline void cm_x300_init_dm9000(void) {}
#endif
/* LCD */
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static struct pxafb_mode_info cm_x300_lcd_modes[] = {
[0] = {
.pixclock = 38250,
.bpp = 16,
.xres = 480,
.yres = 640,
.hsync_len = 8,
.vsync_len = 2,
.left_margin = 8,
.upper_margin = 2,
.right_margin = 24,
.lower_margin = 4,
.cmap_greyscale = 0,
},
[1] = {
.pixclock = 153800,
.bpp = 16,
.xres = 240,
.yres = 320,
.hsync_len = 8,
.vsync_len = 2,
.left_margin = 8,
.upper_margin = 2,
.right_margin = 88,
.lower_margin = 2,
.cmap_greyscale = 0,
},
};
static struct pxafb_mach_info cm_x300_lcd = {
.modes = cm_x300_lcd_modes,
.num_modes = ARRAY_SIZE(cm_x300_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
static void __init cm_x300_init_lcd(void)
{
pxa_set_fb_info(NULL, &cm_x300_lcd);
}
#else
static inline void cm_x300_init_lcd(void) {}
#endif
#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
static struct pwm_lookup cm_x300_pwm_lookup[] = {
PWM_LOOKUP("pxa27x-pwm.0", 1, "pwm-backlight.0", NULL, 10000,
PWM_POLARITY_NORMAL),
};
static struct platform_pwm_backlight_data cm_x300_backlight_data = {
.max_brightness = 100,
.dft_brightness = 100,
};
static struct platform_device cm_x300_backlight_device = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa27x_device_pwm0.dev,
.platform_data = &cm_x300_backlight_data,
},
};
static void cm_x300_init_bl(void)
{
pwm_add_table(cm_x300_pwm_lookup, ARRAY_SIZE(cm_x300_pwm_lookup));
platform_device_register(&cm_x300_backlight_device);
}
#else
static inline void cm_x300_init_bl(void) {}
#endif
#if defined(CONFIG_SPI_GPIO) || defined(CONFIG_SPI_GPIO_MODULE)
#define GPIO_LCD_BASE (144)
#define GPIO_LCD_DIN (GPIO_LCD_BASE + 8) /* aux_gpio3_0 */
#define GPIO_LCD_DOUT (GPIO_LCD_BASE + 9) /* aux_gpio3_1 */
#define GPIO_LCD_SCL (GPIO_LCD_BASE + 10) /* aux_gpio3_2 */
#define GPIO_LCD_CS (GPIO_LCD_BASE + 11) /* aux_gpio3_3 */
#define LCD_SPI_BUS_NUM (1)
static struct spi_gpio_platform_data cm_x300_spi_gpio_pdata = {
.num_chipselect = 1,
};
static struct platform_device cm_x300_spi_gpio = {
.name = "spi_gpio",
.id = LCD_SPI_BUS_NUM,
.dev = {
.platform_data = &cm_x300_spi_gpio_pdata,
},
};
static struct gpiod_lookup_table cm_x300_spi_gpiod_table = {
.dev_id = "spi_gpio",
.table = {
GPIO_LOOKUP("pca9555.1", GPIO_LCD_SCL - GPIO_LCD_BASE,
"sck", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("pca9555.1", GPIO_LCD_DIN - GPIO_LCD_BASE,
"mosi", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("pca9555.1", GPIO_LCD_DOUT - GPIO_LCD_BASE,
"miso", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("pca9555.1", GPIO_LCD_CS - GPIO_LCD_BASE,
"cs", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct tdo24m_platform_data cm_x300_tdo24m_pdata = {
.model = TDO35S,
};
static struct spi_board_info cm_x300_spi_devices[] __initdata = {
{
.modalias = "tdo24m",
.max_speed_hz = 1000000,
.bus_num = LCD_SPI_BUS_NUM,
.chip_select = 0,
.platform_data = &cm_x300_tdo24m_pdata,
},
};
static void __init cm_x300_init_spi(void)
{
spi_register_board_info(cm_x300_spi_devices,
ARRAY_SIZE(cm_x300_spi_devices));
gpiod_add_lookup_table(&cm_x300_spi_gpiod_table);
platform_device_register(&cm_x300_spi_gpio);
}
#else
static inline void cm_x300_init_spi(void) {}
#endif
#if defined(CONFIG_SND_PXA2XX_LIB_AC97)
static void __init cm_x300_init_ac97(void)
{
pxa_set_ac97_info(NULL);
}
#else
static inline void cm_x300_init_ac97(void) {}
#endif
#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
static struct mtd_partition cm_x300_nand_partitions[] = {
[0] = {
.name = "OBM",
.offset = 0,
.size = SZ_256K,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
[1] = {
.name = "U-Boot",
.offset = MTDPART_OFS_APPEND,
.size = SZ_256K,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
[2] = {
.name = "Environment",
.offset = MTDPART_OFS_APPEND,
.size = SZ_256K,
},
[3] = {
.name = "reserved",
.offset = MTDPART_OFS_APPEND,
.size = SZ_256K + SZ_1M,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
[4] = {
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = SZ_4M,
},
[5] = {
.name = "fs",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct pxa3xx_nand_platform_data cm_x300_nand_info = {
.keep_config = 1,
.parts = cm_x300_nand_partitions,
.nr_parts = ARRAY_SIZE(cm_x300_nand_partitions),
};
static void __init cm_x300_init_nand(void)
{
pxa3xx_set_nand_info(&cm_x300_nand_info);
}
#else
static inline void cm_x300_init_nand(void) {}
#endif
#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
static struct pxamci_platform_data cm_x300_mci_platform_data = {
.detect_delay_ms = 200,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
};
static struct gpiod_lookup_table cm_x300_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
/* Card detect on GPIO 82 */
GPIO_LOOKUP("gpio-pxa", GPIO82_MMC_IRQ, "cd", GPIO_ACTIVE_LOW),
/* Write protect on GPIO 85 */
GPIO_LOOKUP("gpio-pxa", GPIO85_MMC_WP, "wp", GPIO_ACTIVE_LOW),
{ },
},
};
/* The second MMC slot of CM-X300 is hardwired to Libertas card and has
no detection/ro pins */
static int cm_x300_mci2_init(struct device *dev,
irq_handler_t cm_x300_detect_int,
void *data)
{
return 0;
}
static void cm_x300_mci2_exit(struct device *dev, void *data)
{
}
static struct pxamci_platform_data cm_x300_mci2_platform_data = {
.detect_delay_ms = 200,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = cm_x300_mci2_init,
.exit = cm_x300_mci2_exit,
};
static void __init cm_x300_init_mmc(void)
{
gpiod_add_lookup_table(&cm_x300_mci_gpio_table);
pxa_set_mci_info(&cm_x300_mci_platform_data);
pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data);
}
#else
static inline void cm_x300_init_mmc(void) {}
#endif
#if defined(CONFIG_PXA310_ULPI)
static struct clk *pout_clk;
static int cm_x300_ulpi_phy_reset(void)
{
int err;
/* reset the PHY */
err = gpio_request_one(GPIO_ULPI_PHY_RST, GPIOF_OUT_INIT_LOW,
"ulpi reset");
if (err) {
pr_err("failed to request ULPI reset GPIO: %d\n", err);
return err;
}
msleep(10);
gpio_set_value(GPIO_ULPI_PHY_RST, 1);
msleep(10);
gpio_free(GPIO_ULPI_PHY_RST);
return 0;
}
static int cm_x300_u2d_init(struct device *dev)
{
int err = 0;
if (cpu_is_pxa310()) {
/* CLK_POUT is connected to the ULPI PHY */
pout_clk = clk_get(NULL, "CLK_POUT");
if (IS_ERR(pout_clk)) {
err = PTR_ERR(pout_clk);
pr_err("failed to get CLK_POUT: %d\n", err);
return err;
}
clk_prepare_enable(pout_clk);
err = cm_x300_ulpi_phy_reset();
if (err) {
clk_disable(pout_clk);
clk_put(pout_clk);
}
}
return err;
}
static void cm_x300_u2d_exit(struct device *dev)
{
if (cpu_is_pxa310()) {
clk_disable_unprepare(pout_clk);
clk_put(pout_clk);
}
}
static struct pxa3xx_u2d_platform_data cm_x300_u2d_platform_data = {
.ulpi_mode = ULPI_SER_6PIN,
.init = cm_x300_u2d_init,
.exit = cm_x300_u2d_exit,
};
static void __init cm_x300_init_u2d(void)
{
pxa3xx_set_u2d_info(&cm_x300_u2d_platform_data);
}
#else
static inline void cm_x300_init_u2d(void) {}
#endif
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static int cm_x300_ohci_init(struct device *dev)
{
if (cpu_is_pxa300())
UP2OCR = UP2OCR_HXS
| UP2OCR_HXOE | UP2OCR_DMPDE | UP2OCR_DPPDE;
return 0;
}
static struct pxaohci_platform_data cm_x300_ohci_platform_data = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW,
.init = cm_x300_ohci_init,
};
static void __init cm_x300_init_ohci(void)
{
pxa_set_ohci_info(&cm_x300_ohci_platform_data);
}
#else
static inline void cm_x300_init_ohci(void) {}
#endif
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
static struct gpio_led cm_x300_leds[] = {
[0] = {
.name = "cm-x300:green",
.default_trigger = "heartbeat",
.active_low = 1,
},
};
static struct gpio_led_platform_data cm_x300_gpio_led_pdata = {
.num_leds = ARRAY_SIZE(cm_x300_leds),
.leds = cm_x300_leds,
};
static struct platform_device cm_x300_led_device = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &cm_x300_gpio_led_pdata,
},
};
static void __init cm_x300_init_leds(void)
{
if (system_rev < 130)
cm_x300_leds[0].gpio = 79;
else
cm_x300_leds[0].gpio = 76;
platform_device_register(&cm_x300_led_device);
}
#else
static inline void cm_x300_init_leds(void) {}
#endif
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
/* PCA9555 */
static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = {
.gpio_base = 128,
};
static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = {
.gpio_base = 144,
};
static struct i2c_board_info cm_x300_gpio_ext_info[] = {
[0] = {
I2C_BOARD_INFO("pca9555", 0x24),
.platform_data = &cm_x300_gpio_ext_pdata_0,
},
[1] = {
I2C_BOARD_INFO("pca9555", 0x25),
.platform_data = &cm_x300_gpio_ext_pdata_1,
},
};
static void __init cm_x300_init_i2c(void)
{
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, cm_x300_gpio_ext_info,
ARRAY_SIZE(cm_x300_gpio_ext_info));
}
#else
static inline void cm_x300_init_i2c(void) {}
#endif
#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
struct v3020_platform_data cm_x300_v3020_pdata = {
.use_gpio = 1,
.gpio_cs = GPIO95_RTC_CS,
.gpio_wr = GPIO96_RTC_WR,
.gpio_rd = GPIO97_RTC_RD,
.gpio_io = GPIO98_RTC_IO,
};
static struct platform_device cm_x300_rtc_device = {
.name = "v3020",
.id = -1,
.dev = {
.platform_data = &cm_x300_v3020_pdata,
}
};
static void __init cm_x300_init_rtc(void)
{
platform_device_register(&cm_x300_rtc_device);
}
#else
static inline void cm_x300_init_rtc(void) {}
#endif
/* Battery */
struct power_supply_info cm_x300_psy_info = {
.name = "battery",
.technology = POWER_SUPPLY_TECHNOLOGY_LIPO,
.voltage_max_design = 4200000,
.voltage_min_design = 3000000,
.use_for_apm = 1,
};
static void cm_x300_battery_low(void)
{
#if defined(CONFIG_APM_EMULATION)
apm_queue_event(APM_LOW_BATTERY);
#endif
}
static void cm_x300_battery_critical(void)
{
#if defined(CONFIG_APM_EMULATION)
apm_queue_event(APM_CRITICAL_SUSPEND);
#endif
}
struct da9030_battery_info cm_x300_battery_info = {
.battery_info = &cm_x300_psy_info,
.charge_milliamp = 1000,
.charge_millivolt = 4200,
.vbat_low = 3600,
.vbat_crit = 3400,
.vbat_charge_start = 4100,
.vbat_charge_stop = 4200,
.vbat_charge_restart = 4000,
.vcharge_min = 3200,
.vcharge_max = 5500,
.tbat_low = 197,
.tbat_high = 78,
.tbat_restart = 100,
.batmon_interval = 0,
.battery_low = cm_x300_battery_low,
.battery_critical = cm_x300_battery_critical,
};
static struct regulator_consumer_supply buck2_consumers[] = {
REGULATOR_SUPPLY("vcc_core", NULL),
};
static struct regulator_init_data buck2_data = {
.constraints = {
.min_uV = 1375000,
.max_uV = 1375000,
.state_mem = {
.enabled = 0,
},
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
.apply_uV = 1,
},
.num_consumer_supplies = ARRAY_SIZE(buck2_consumers),
.consumer_supplies = buck2_consumers,
};
/* DA9030 */
struct da903x_subdev_info cm_x300_da9030_subdevs[] = {
{
.name = "da903x-battery",
.id = DA9030_ID_BAT,
.platform_data = &cm_x300_battery_info,
},
{
.name = "da903x-regulator",
.id = DA9030_ID_BUCK2,
.platform_data = &buck2_data,
},
};
static struct da903x_platform_data cm_x300_da9030_info = {
.num_subdevs = ARRAY_SIZE(cm_x300_da9030_subdevs),
.subdevs = cm_x300_da9030_subdevs,
};
static struct i2c_board_info cm_x300_pmic_info = {
I2C_BOARD_INFO("da9030", 0x49),
.irq = IRQ_WAKEUP0,
.platform_data = &cm_x300_da9030_info,
};
static struct i2c_pxa_platform_data cm_x300_pwr_i2c_info = {
.use_pio = 1,
};
static void __init cm_x300_init_da9030(void)
{
pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info);
i2c_register_board_info(1, &cm_x300_pmic_info, 1);
irq_set_irq_wake(IRQ_WAKEUP0, 1);
}
/* wi2wi gpio setting for system_rev >= 130 */
static struct gpio cm_x300_wi2wi_gpios[] __initdata = {
{ 71, GPIOF_OUT_INIT_HIGH, "wlan en" },
{ 70, GPIOF_OUT_INIT_HIGH, "bt reset" },
};
static void __init cm_x300_init_wi2wi(void)
{
int err;
if (system_rev < 130) {
cm_x300_wi2wi_gpios[0].gpio = 77; /* wlan en */
cm_x300_wi2wi_gpios[1].gpio = 78; /* bt reset */
}
/* Libertas and CSR reset */
err = gpio_request_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios));
if (err) {
pr_err("failed to request wifi/bt gpios: %d\n", err);
return;
}
udelay(10);
gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 0);
udelay(10);
gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 1);
gpio_free_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios));
}
/* MFP */
static void __init cm_x300_init_mfp(void)
{
/* board-processor specific GPIO initialization */
pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_mfp_cfg));
if (system_rev < 130)
pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_lt130_mfp_cfg));
else
pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_ge130_mfp_cfg));
if (cpu_is_pxa310())
pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x310_mfp_cfg));
}
static void __init cm_x300_init(void)
{
cm_x300_init_mfp();
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
if (cpu_is_pxa300())
pxa_set_ffuart_info(NULL);
cm_x300_init_da9030();
cm_x300_init_dm9000();
cm_x300_init_lcd();
cm_x300_init_u2d();
cm_x300_init_ohci();
cm_x300_init_mmc();
cm_x300_init_nand();
cm_x300_init_leds();
cm_x300_init_i2c();
cm_x300_init_spi();
cm_x300_init_rtc();
cm_x300_init_ac97();
cm_x300_init_wi2wi();
cm_x300_init_bl();
regulator_has_full_constraints();
}
static void __init cm_x300_fixup(struct tag *tags, char **cmdline)
{
/* Make sure that mi->bank[0].start = PHYS_ADDR */
for (; tags->hdr.size; tags = tag_next(tags))
if (tags->hdr.tag == ATAG_MEM &&
tags->u.mem.start == 0x80000000) {
tags->u.mem.start = 0xa0000000;
break;
}
}
MACHINE_START(CM_X300, "CM-X300 module")
.atag_offset = 0x100,
.map_io = pxa3xx_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa3xx_init_irq,
.handle_irq = pxa3xx_handle_irq,
.init_time = pxa_timer_init,
.init_machine = cm_x300_init,
.fixup = cm_x300_fixup,
.restart = pxa_restart,
MACHINE_END

138
arch/arm/mach-pxa/colibri-evalboard.c
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@ -1,138 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/colibri-evalboard.c
*
* Support for Toradex Colibri Evaluation Carrier Board
* Daniel Mack <daniel@caiaq.de>
* Marek Vasut <marek.vasut@gmail.com>
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/gpio/machine.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <linux/i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/io.h>
#include "pxa27x.h"
#include "colibri.h"
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include "pxa27x-udc.h"
#include "generic.h"
#include "devices.h"
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
static struct pxamci_platform_data colibri_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.detect_delay_ms = 200,
};
static struct gpiod_lookup_table colibri_pxa270_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO0_COLIBRI_PXA270_SD_DETECT,
"cd", GPIO_ACTIVE_LOW),
{ },
},
};
static struct gpiod_lookup_table colibri_pxa300_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO13_COLIBRI_PXA300_SD_DETECT,
"cd", GPIO_ACTIVE_LOW),
{ },
},
};
static struct gpiod_lookup_table colibri_pxa320_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO28_COLIBRI_PXA320_SD_DETECT,
"cd", GPIO_ACTIVE_LOW),
{ },
},
};
static void __init colibri_mmc_init(void)
{
if (machine_is_colibri()) /* PXA270 Colibri */
gpiod_add_lookup_table(&colibri_pxa270_mci_gpio_table);
if (machine_is_colibri300()) /* PXA300 Colibri */
gpiod_add_lookup_table(&colibri_pxa300_mci_gpio_table);
else /* PXA320 Colibri */
gpiod_add_lookup_table(&colibri_pxa320_mci_gpio_table);
pxa_set_mci_info(&colibri_mci_platform_data);
}
#else
static inline void colibri_mmc_init(void) {}
#endif
/******************************************************************************
* USB Host
******************************************************************************/
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static int colibri_ohci_init(struct device *dev)
{
UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
return 0;
}
static struct pxaohci_platform_data colibri_ohci_info = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT1 |
POWER_CONTROL_LOW | POWER_SENSE_LOW,
.init = colibri_ohci_init,
};
static void __init colibri_uhc_init(void)
{
/* Colibri PXA270 has two usb ports, TBA for 320 */
if (machine_is_colibri())
colibri_ohci_info.flags |= ENABLE_PORT2;
pxa_set_ohci_info(&colibri_ohci_info);
}
#else
static inline void colibri_uhc_init(void) {}
#endif
/******************************************************************************
* I2C RTC
******************************************************************************/
#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
static struct i2c_board_info __initdata colibri_i2c_devs[] = {
{
I2C_BOARD_INFO("m41t00", 0x68),
},
};
static void __init colibri_rtc_init(void)
{
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(colibri_i2c_devs));
}
#else
static inline void colibri_rtc_init(void) {}
#endif
void __init colibri_evalboard_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
colibri_mmc_init();
colibri_uhc_init();
colibri_rtc_init();
}

165
arch/arm/mach-pxa/colibri-pcmcia.c
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@ -1,165 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/drivers/pcmcia/pxa2xx_colibri.c
*
* Driver for Toradex Colibri PXA270 CF socket
*
* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <pcmcia/soc_common.h>
#define COLIBRI270_RESET_GPIO 53
#define COLIBRI270_PPEN_GPIO 107
#define COLIBRI270_BVD1_GPIO 83
#define COLIBRI270_BVD2_GPIO 82
#define COLIBRI270_DETECT_GPIO 84
#define COLIBRI270_READY_GPIO 1
#define COLIBRI320_RESET_GPIO 77
#define COLIBRI320_PPEN_GPIO 57
#define COLIBRI320_BVD1_GPIO 53
#define COLIBRI320_BVD2_GPIO 79
#define COLIBRI320_DETECT_GPIO 81
#define COLIBRI320_READY_GPIO 29
enum {
DETECT = 0,
READY = 1,
BVD1 = 2,
BVD2 = 3,
PPEN = 4,
RESET = 5,
};
/* Contents of this array are configured on-the-fly in init function */
static struct gpio colibri_pcmcia_gpios[] = {
{ 0, GPIOF_IN, "PCMCIA Detect" },
{ 0, GPIOF_IN, "PCMCIA Ready" },
{ 0, GPIOF_IN, "PCMCIA BVD1" },
{ 0, GPIOF_IN, "PCMCIA BVD2" },
{ 0, GPIOF_INIT_LOW, "PCMCIA PPEN" },
{ 0, GPIOF_INIT_HIGH,"PCMCIA Reset" },
};
static int colibri_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
{
int ret;
ret = gpio_request_array(colibri_pcmcia_gpios,
ARRAY_SIZE(colibri_pcmcia_gpios));
if (ret)
goto err1;
skt->socket.pci_irq = gpio_to_irq(colibri_pcmcia_gpios[READY].gpio);
skt->stat[SOC_STAT_CD].irq = gpio_to_irq(colibri_pcmcia_gpios[DETECT].gpio);
skt->stat[SOC_STAT_CD].name = "PCMCIA CD";
err1:
return ret;
}
static void colibri_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
{
gpio_free_array(colibri_pcmcia_gpios,
ARRAY_SIZE(colibri_pcmcia_gpios));
}
static void colibri_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
struct pcmcia_state *state)
{
state->detect = !!gpio_get_value(colibri_pcmcia_gpios[DETECT].gpio);
state->ready = !!gpio_get_value(colibri_pcmcia_gpios[READY].gpio);
state->bvd1 = !!gpio_get_value(colibri_pcmcia_gpios[BVD1].gpio);
state->bvd2 = !!gpio_get_value(colibri_pcmcia_gpios[BVD2].gpio);
state->vs_3v = 1;
state->vs_Xv = 0;
}
static int
colibri_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
const socket_state_t *state)
{
gpio_set_value(colibri_pcmcia_gpios[PPEN].gpio,
!(state->Vcc == 33 && state->Vpp < 50));
gpio_set_value(colibri_pcmcia_gpios[RESET].gpio,
state->flags & SS_RESET);
return 0;
}
static struct pcmcia_low_level colibri_pcmcia_ops = {
.owner = THIS_MODULE,
.first = 0,
.nr = 1,
.hw_init = colibri_pcmcia_hw_init,
.hw_shutdown = colibri_pcmcia_hw_shutdown,
.socket_state = colibri_pcmcia_socket_state,
.configure_socket = colibri_pcmcia_configure_socket,
};
static struct platform_device *colibri_pcmcia_device;
static int __init colibri_pcmcia_init(void)
{
int ret;
if (!machine_is_colibri() && !machine_is_colibri320())
return -ENODEV;
colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
if (!colibri_pcmcia_device)
return -ENOMEM;
/* Colibri PXA270 */
if (machine_is_colibri()) {
colibri_pcmcia_gpios[RESET].gpio = COLIBRI270_RESET_GPIO;
colibri_pcmcia_gpios[PPEN].gpio = COLIBRI270_PPEN_GPIO;
colibri_pcmcia_gpios[BVD1].gpio = COLIBRI270_BVD1_GPIO;
colibri_pcmcia_gpios[BVD2].gpio = COLIBRI270_BVD2_GPIO;
colibri_pcmcia_gpios[DETECT].gpio = COLIBRI270_DETECT_GPIO;
colibri_pcmcia_gpios[READY].gpio = COLIBRI270_READY_GPIO;
/* Colibri PXA320 */
} else if (machine_is_colibri320()) {
colibri_pcmcia_gpios[RESET].gpio = COLIBRI320_RESET_GPIO;
colibri_pcmcia_gpios[PPEN].gpio = COLIBRI320_PPEN_GPIO;
colibri_pcmcia_gpios[BVD1].gpio = COLIBRI320_BVD1_GPIO;
colibri_pcmcia_gpios[BVD2].gpio = COLIBRI320_BVD2_GPIO;
colibri_pcmcia_gpios[DETECT].gpio = COLIBRI320_DETECT_GPIO;
colibri_pcmcia_gpios[READY].gpio = COLIBRI320_READY_GPIO;
}
ret = platform_device_add_data(colibri_pcmcia_device,
&colibri_pcmcia_ops, sizeof(colibri_pcmcia_ops));
if (!ret)
ret = platform_device_add(colibri_pcmcia_device);
if (ret)
platform_device_put(colibri_pcmcia_device);
return ret;
}
static void __exit colibri_pcmcia_exit(void)
{
platform_device_unregister(colibri_pcmcia_device);
}
module_init(colibri_pcmcia_init);
module_exit(colibri_pcmcia_exit);
MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
MODULE_DESCRIPTION("PCMCIA support for Toradex Colibri PXA270/PXA320");
MODULE_ALIAS("platform:pxa2xx-pcmcia");
MODULE_LICENSE("GPL");

236
arch/arm/mach-pxa/colibri-pxa270-income.c
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@ -1,236 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/income.c
*
* Support for Income s.r.o. SH-Dmaster PXA270 SBC
*
* Copyright (C) 2010
* Marek Vasut <marek.vasut@gmail.com>
* Pavel Revak <palo@bielyvlk.sk>
*/
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/gpio/machine.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/leds.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include "pxa27x.h"
#include "pxa27x-udc.h"
#include <linux/platform_data/video-pxafb.h>
#include "devices.h"
#include "generic.h"
#define GPIO114_INCOME_ETH_IRQ (114)
#define GPIO0_INCOME_SD_DETECT (0)
#define GPIO0_INCOME_SD_RO (1)
#define GPIO54_INCOME_LED_A (54)
#define GPIO55_INCOME_LED_B (55)
#define GPIO113_INCOME_TS_IRQ (113)
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
static struct pxamci_platform_data income_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.detect_delay_ms = 200,
};
static struct gpiod_lookup_table income_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
/* Card detect on GPIO 0 */
GPIO_LOOKUP("gpio-pxa", GPIO0_INCOME_SD_DETECT,
"cd", GPIO_ACTIVE_LOW),
/* Write protect on GPIO 1 */
GPIO_LOOKUP("gpio-pxa", GPIO0_INCOME_SD_RO,
"wp", GPIO_ACTIVE_LOW),
{ },
},
};
static void __init income_mmc_init(void)
{
gpiod_add_lookup_table(&income_mci_gpio_table);
pxa_set_mci_info(&income_mci_platform_data);
}
#else
static inline void income_mmc_init(void) {}
#endif
/******************************************************************************
* USB Host
******************************************************************************/
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static struct pxaohci_platform_data income_ohci_info = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
};
static void __init income_uhc_init(void)
{
pxa_set_ohci_info(&income_ohci_info);
}
#else
static inline void income_uhc_init(void) {}
#endif
/******************************************************************************
* LED
******************************************************************************/
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
struct gpio_led income_gpio_leds[] = {
{
.name = "income:green:leda",
.default_trigger = "none",
.gpio = GPIO54_INCOME_LED_A,
.active_low = 1,
},
{
.name = "income:green:ledb",
.default_trigger = "none",
.gpio = GPIO55_INCOME_LED_B,
.active_low = 1,
}
};
static struct gpio_led_platform_data income_gpio_led_info = {
.leds = income_gpio_leds,
.num_leds = ARRAY_SIZE(income_gpio_leds),
};
static struct platform_device income_leds = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &income_gpio_led_info,
}
};
static void __init income_led_init(void)
{
platform_device_register(&income_leds);
}
#else
static inline void income_led_init(void) {}
#endif
/******************************************************************************
* I2C
******************************************************************************/
#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
static struct i2c_board_info __initdata income_i2c_devs[] = {
{
I2C_BOARD_INFO("ds1340", 0x68),
}, {
I2C_BOARD_INFO("lm75", 0x4f),
},
};
static void __init income_i2c_init(void)
{
pxa_set_i2c_info(NULL);
pxa27x_set_i2c_power_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(income_i2c_devs));
}
#else
static inline void income_i2c_init(void) {}
#endif
/******************************************************************************
* Framebuffer
******************************************************************************/
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static struct pxafb_mode_info income_lcd_modes[] = {
{
.pixclock = 144700,
.xres = 320,
.yres = 240,
.bpp = 32,
.depth = 18,
.left_margin = 10,
.right_margin = 10,
.upper_margin = 7,
.lower_margin = 8,
.hsync_len = 20,
.vsync_len = 2,
.sync = FB_SYNC_VERT_HIGH_ACT,
},
};
static struct pxafb_mach_info income_lcd_screen = {
.modes = income_lcd_modes,
.num_modes = ARRAY_SIZE(income_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_18BPP | LCD_PCLK_EDGE_FALL,
};
static void __init income_lcd_init(void)
{
pxa_set_fb_info(NULL, &income_lcd_screen);
}
#else
static inline void income_lcd_init(void) {}
#endif
/******************************************************************************
* Backlight
******************************************************************************/
#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
static struct pwm_lookup income_pwm_lookup[] = {
PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 1000000,
PWM_POLARITY_NORMAL),
};
static struct platform_pwm_backlight_data income_backlight_data = {
.max_brightness = 0x3ff,
.dft_brightness = 0x1ff,
};
static struct platform_device income_backlight = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa27x_device_pwm0.dev,
.platform_data = &income_backlight_data,
},
};
static void __init income_pwm_init(void)
{
pwm_add_table(income_pwm_lookup, ARRAY_SIZE(income_pwm_lookup));
platform_device_register(&income_backlight);
}
#else
static inline void income_pwm_init(void) {}
#endif
void __init colibri_pxa270_income_boardinit(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
income_mmc_init();
income_uhc_init();
income_led_init();
income_i2c_init();
income_lcd_init();
income_pwm_init();
}

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arch/arm/mach-pxa/colibri-pxa270.c
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@ -1,330 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/colibri-pxa270.c
*
* Support for Toradex PXA270 based Colibri module
* Daniel Mack <daniel@caiaq.de>
* Marek Vasut <marek.vasut@gmail.com>
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/moduleparam.h>
#include <linux/kernel.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/regulator/machine.h>
#include <linux/ucb1400.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach-types.h>
#include <linux/sizes.h>
#include <linux/platform_data/asoc-pxa.h>
#include "colibri.h"
#include "pxa27x.h"
#include "devices.h"
#include "generic.h"
/******************************************************************************
* Evaluation board MFP
******************************************************************************/
#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO0_GPIO, /* SD detect */
/* FFUART */
GPIO39_FFUART_TXD,
GPIO34_FFUART_RXD,
/* UHC */
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
GPIO119_USBH2_PWR,
GPIO120_USBH2_PEN,
/* PCMCIA */
GPIO85_nPCE_1,
GPIO54_nPCE_2,
GPIO55_nPREG,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO49_nPWE,
GPIO48_nPOE,
GPIO57_nIOIS16,
GPIO56_nPWAIT,
GPIO104_PSKTSEL,
GPIO53_GPIO, /* RESET */
GPIO83_GPIO, /* BVD1 */
GPIO82_GPIO, /* BVD2 */
GPIO1_GPIO, /* READY */
GPIO84_GPIO, /* DETECT */
GPIO107_GPIO, /* PPEN */
/* I2C */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
};
#else
static mfp_cfg_t colibri_pxa270_evalboard_pin_config[] __initdata = {};
#endif
#ifdef CONFIG_MACH_COLIBRI_PXA270_INCOME
static mfp_cfg_t income_pin_config[] __initdata = {
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO0_GPIO, /* SD detect */
GPIO1_GPIO, /* SD read-only */
/* FFUART */
GPIO39_FFUART_TXD,
GPIO34_FFUART_RXD,
/* BFUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO45_BTUART_RTS,
/* STUART */
GPIO46_STUART_RXD,
GPIO47_STUART_TXD,
/* UHC */
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
/* LCD */
GPIOxx_LCD_TFT_16BPP,
/* PWM */
GPIO16_PWM0_OUT,
/* I2C */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
/* LED */
GPIO54_GPIO, /* LED A */
GPIO55_GPIO, /* LED B */
};
#else
static mfp_cfg_t income_pin_config[] __initdata = {};
#endif
/******************************************************************************
* Pin configuration
******************************************************************************/
static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = {
/* Ethernet */
GPIO78_nCS_2, /* Ethernet CS */
GPIO114_GPIO, /* Ethernet IRQ */
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO95_AC97_nRESET,
GPIO98_AC97_SYSCLK,
GPIO113_GPIO, /* Touchscreen IRQ */
};
/******************************************************************************
* NOR Flash
******************************************************************************/
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct mtd_partition colibri_partitions[] = {
{
.name = "Bootloader",
.offset = 0x00000000,
.size = 0x00040000,
.mask_flags = MTD_WRITEABLE /* force read-only */
}, {
.name = "Kernel",
.offset = 0x00040000,
.size = 0x00400000,
.mask_flags = 0
}, {
.name = "Rootfs",
.offset = 0x00440000,
.size = MTDPART_SIZ_FULL,
.mask_flags = 0
}
};
static struct physmap_flash_data colibri_flash_data[] = {
{
.width = 4, /* bankwidth in bytes */
.parts = colibri_partitions,
.nr_parts = ARRAY_SIZE(colibri_partitions)
}
};
static struct resource colibri_pxa270_flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device colibri_pxa270_flash_device = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = colibri_flash_data,
},
.resource = &colibri_pxa270_flash_resource,
.num_resources = 1,
};
static void __init colibri_pxa270_nor_init(void)
{
platform_device_register(&colibri_pxa270_flash_device);
}
#else
static inline void colibri_pxa270_nor_init(void) {}
#endif
/******************************************************************************
* Ethernet
******************************************************************************/
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource colibri_pxa270_dm9000_resources[] = {
{
.start = PXA_CS2_PHYS,
.end = PXA_CS2_PHYS + 3,
.flags = IORESOURCE_MEM,
},
{
.start = PXA_CS2_PHYS + 4,
.end = PXA_CS2_PHYS + 4 + 500,
.flags = IORESOURCE_MEM,
},
{
.start = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
.end = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
},
};
static struct platform_device colibri_pxa270_dm9000_device = {
.name = "dm9000",
.id = -1,
.num_resources = ARRAY_SIZE(colibri_pxa270_dm9000_resources),
.resource = colibri_pxa270_dm9000_resources,
};
static void __init colibri_pxa270_eth_init(void)
{
platform_device_register(&colibri_pxa270_dm9000_device);
}
#else
static inline void colibri_pxa270_eth_init(void) {}
#endif
/******************************************************************************
* Audio and Touchscreen
******************************************************************************/
#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = {
.reset_gpio = 95,
};
static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = {
.irq = PXA_GPIO_TO_IRQ(GPIO113_COLIBRI_PXA270_TS_IRQ),
};
static struct platform_device colibri_pxa270_ucb1400_device = {
.name = "ucb1400_core",
.id = -1,
.dev = {
.platform_data = &colibri_pxa270_ucb1400_pdata,
},
};
static void __init colibri_pxa270_tsc_init(void)
{
pxa_set_ac97_info(&colibri_pxa270_ac97_pdata);
platform_device_register(&colibri_pxa270_ucb1400_device);
}
#else
static inline void colibri_pxa270_tsc_init(void) {}
#endif
static int colibri_pxa270_baseboard;
core_param(colibri_pxa270_baseboard, colibri_pxa270_baseboard, int, 0444);
static void __init colibri_pxa270_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_pin_config));
colibri_pxa270_nor_init();
colibri_pxa270_eth_init();
colibri_pxa270_tsc_init();
switch (colibri_pxa270_baseboard) {
case COLIBRI_EVALBOARD:
pxa2xx_mfp_config(ARRAY_AND_SIZE(
colibri_pxa270_evalboard_pin_config));
colibri_evalboard_init();
break;
case COLIBRI_PXA270_INCOME:
pxa2xx_mfp_config(ARRAY_AND_SIZE(income_pin_config));
colibri_pxa270_income_boardinit();
break;
default:
printk(KERN_ERR "Illegal colibri_pxa270_baseboard type %d\n",
colibri_pxa270_baseboard);
}
regulator_has_full_constraints();
}
/* The "Income s.r.o. SH-Dmaster PXA270 SBC" board can be booted either
* with the INCOME mach type or with COLIBRI and the kernel parameter
* "colibri_pxa270_baseboard=1"
*/
static void __init colibri_pxa270_income_init(void)
{
colibri_pxa270_baseboard = COLIBRI_PXA270_INCOME;
colibri_pxa270_init();
}
MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
.atag_offset = 0x100,
.init_machine = colibri_pxa270_init,
.map_io = pxa27x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.restart = pxa_restart,
MACHINE_END
MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
.atag_offset = 0x100,
.init_machine = colibri_pxa270_income_init,
.map_io = pxa27x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.restart = pxa_restart,
MACHINE_END

193
arch/arm/mach-pxa/colibri-pxa300.c
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@ -1,193 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* arch/arm/mach-pxa/colibri-pxa300.c
*
* Support for Toradex PXA300/310 based Colibri module
*
* Daniel Mack <daniel@caiaq.de>
* Matthias Meier <matthias.j.meier@gmx.net>
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/soc/pxa/cpu.h>
#include <asm/mach-types.h>
#include <linux/sizes.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include "pxa300.h"
#include "colibri.h"
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/asoc-pxa.h>
#include "generic.h"
#include "devices.h"
#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {
/* MMC */
GPIO7_MMC1_CLK,
GPIO14_MMC1_CMD,
GPIO3_MMC1_DAT0,
GPIO4_MMC1_DAT1,
GPIO5_MMC1_DAT2,
GPIO6_MMC1_DAT3,
GPIO13_GPIO, /* GPIO13_COLIBRI_PXA300_SD_DETECT */
/* UHC */
GPIO0_2_USBH_PEN,
GPIO1_2_USBH_PWR,
GPIO77_USB_P3_1,
GPIO78_USB_P3_2,
GPIO79_USB_P3_3,
GPIO80_USB_P3_4,
GPIO81_USB_P3_5,
GPIO82_USB_P3_6,
/* I2C */
GPIO21_I2C_SCL,
GPIO22_I2C_SDA,
};
#else
static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {};
#endif
#if defined(CONFIG_AX88796)
#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO26_GPIO)
/*
* Asix AX88796 Ethernet
*/
static struct ax_plat_data colibri_asix_platdata = {
.flags = 0, /* defined later */
.wordlength = 2,
};
static struct resource colibri_asix_resource[] = {
[0] = {
.start = PXA3xx_CS2_PHYS,
.end = PXA3xx_CS2_PHYS + (0x20 * 2) - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
.end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
}
};
static struct platform_device asix_device = {
.name = "ax88796",
.id = 0,
.num_resources = ARRAY_SIZE(colibri_asix_resource),
.resource = colibri_asix_resource,
.dev = {
.platform_data = &colibri_asix_platdata
}
};
static mfp_cfg_t colibri_pxa300_eth_pin_config[] __initdata = {
GPIO1_nCS2, /* AX88796 chip select */
GPIO26_GPIO | MFP_PULL_HIGH /* AX88796 IRQ */
};
static void __init colibri_pxa300_init_eth(void)
{
colibri_pxa3xx_init_eth(&colibri_asix_platdata);
pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_eth_pin_config));
platform_device_register(&asix_device);
}
#else
static inline void __init colibri_pxa300_init_eth(void) {}
#endif /* CONFIG_AX88796 */
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static mfp_cfg_t colibri_pxa300_lcd_pin_config[] __initdata = {
GPIO54_LCD_LDD_0,
GPIO55_LCD_LDD_1,
GPIO56_LCD_LDD_2,
GPIO57_LCD_LDD_3,
GPIO58_LCD_LDD_4,
GPIO59_LCD_LDD_5,
GPIO60_LCD_LDD_6,
GPIO61_LCD_LDD_7,
GPIO62_LCD_LDD_8,
GPIO63_LCD_LDD_9,
GPIO64_LCD_LDD_10,
GPIO65_LCD_LDD_11,
GPIO66_LCD_LDD_12,
GPIO67_LCD_LDD_13,
GPIO68_LCD_LDD_14,
GPIO69_LCD_LDD_15,
GPIO70_LCD_LDD_16,
GPIO71_LCD_LDD_17,
GPIO62_LCD_CS_N,
GPIO72_LCD_FCLK,
GPIO73_LCD_LCLK,
GPIO74_LCD_PCLK,
GPIO75_LCD_BIAS,
GPIO76_LCD_VSYNC,
};
static void __init colibri_pxa300_init_lcd(void)
{
pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_lcd_pin_config));
}
#else
static inline void colibri_pxa300_init_lcd(void) {}
#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
#if defined(CONFIG_SND_AC97_CODEC) || defined(CONFIG_SND_AC97_CODEC_MODULE)
static mfp_cfg_t colibri_pxa310_ac97_pin_config[] __initdata = {
GPIO24_AC97_SYSCLK,
GPIO23_AC97_nACRESET,
GPIO25_AC97_SDATA_IN_0,
GPIO27_AC97_SDATA_OUT,
GPIO28_AC97_SYNC,
GPIO29_AC97_BITCLK
};
static inline void __init colibri_pxa310_init_ac97(void)
{
/* no AC97 codec on Colibri PXA300 */
if (!cpu_is_pxa310())
return;
pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa310_ac97_pin_config));
pxa_set_ac97_info(NULL);
}
#else
static inline void colibri_pxa310_init_ac97(void) {}
#endif
void __init colibri_pxa300_init(void)
{
colibri_pxa300_init_eth();
colibri_pxa3xx_init_nand();
colibri_pxa300_init_lcd();
colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO39_GPIO));
colibri_pxa310_init_ac97();
/* Evalboard init */
pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_evalboard_pin_config));
colibri_evalboard_init();
}
MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
.atag_offset = 0x100,
.init_machine = colibri_pxa300_init,
.map_io = pxa3xx_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa3xx_init_irq,
.handle_irq = pxa3xx_handle_irq,
.init_time = pxa_timer_init,
.restart = pxa_restart,
MACHINE_END

264
arch/arm/mach-pxa/colibri-pxa320.c
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@ -1,264 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* arch/arm/mach-pxa/colibri-pxa320.c
*
* Support for Toradex PXA320/310 based Colibri module
*
* Daniel Mack <daniel@caiaq.de>
* Matthias Meier <matthias.j.meier@gmx.net>
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/gpio/machine.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <asm/mach-types.h>
#include <linux/sizes.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include "pxa320.h"
#include "colibri.h"
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/asoc-pxa.h>
#include "pxa27x-udc.h"
#include "udc.h"
#include "generic.h"
#include "devices.h"
#ifdef CONFIG_MACH_COLIBRI_EVALBOARD
static mfp_cfg_t colibri_pxa320_evalboard_pin_config[] __initdata = {
/* MMC */
GPIO22_MMC1_CLK,
GPIO23_MMC1_CMD,
GPIO18_MMC1_DAT0,
GPIO19_MMC1_DAT1,
GPIO20_MMC1_DAT2,
GPIO21_MMC1_DAT3,
GPIO28_GPIO, /* SD detect */
/* UART 1 configuration (may be set by bootloader) */
GPIO99_UART1_CTS,
GPIO104_UART1_RTS,
GPIO97_UART1_RXD,
GPIO98_UART1_TXD,
GPIO101_UART1_DTR,
GPIO103_UART1_DSR,
GPIO100_UART1_DCD,
GPIO102_UART1_RI,
/* UART 2 configuration */
GPIO109_UART2_CTS,
GPIO112_UART2_RTS,
GPIO110_UART2_RXD,
GPIO111_UART2_TXD,
/* UART 3 configuration */
GPIO30_UART3_RXD,
GPIO31_UART3_TXD,
/* UHC */
GPIO2_2_USBH_PEN,
GPIO3_2_USBH_PWR,
/* I2C */
GPIO32_I2C_SCL,
GPIO33_I2C_SDA,
/* PCMCIA */
MFP_CFG(GPIO59, AF7), /* PRST ; AF7 to tristate */
MFP_CFG(GPIO61, AF7), /* PCE1 ; AF7 to tristate */
MFP_CFG(GPIO60, AF7), /* PCE2 ; AF7 to tristate */
MFP_CFG(GPIO62, AF7), /* PCD ; AF7 to tristate */
MFP_CFG(GPIO56, AF7), /* PSKTSEL ; AF7 to tristate */
GPIO27_GPIO, /* RDnWR ; input/tristate */
GPIO50_GPIO, /* PREG ; input/tristate */
GPIO2_RDY,
GPIO5_NPIOR,
GPIO6_NPIOW,
GPIO7_NPIOS16,
GPIO8_NPWAIT,
GPIO29_GPIO, /* PRDY (READY GPIO) */
GPIO57_GPIO, /* PPEN (POWER GPIO) */
GPIO81_GPIO, /* PCD (DETECT GPIO) */
GPIO77_GPIO, /* PRST (RESET GPIO) */
GPIO53_GPIO, /* PBVD1 */
GPIO79_GPIO, /* PBVD2 */
GPIO54_GPIO, /* POE */
};
#else
static mfp_cfg_t colibri_pxa320_evalboard_pin_config[] __initdata = {};
#endif
#if defined(CONFIG_AX88796)
#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO36_GPIO)
/*
* Asix AX88796 Ethernet
*/
static struct ax_plat_data colibri_asix_platdata = {
.flags = 0, /* defined later */
.wordlength = 2,
};
static struct resource colibri_asix_resource[] = {
[0] = {
.start = PXA3xx_CS2_PHYS,
.end = PXA3xx_CS2_PHYS + (0x20 * 2) - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
.end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
}
};
static struct platform_device asix_device = {
.name = "ax88796",
.id = 0,
.num_resources = ARRAY_SIZE(colibri_asix_resource),
.resource = colibri_asix_resource,
.dev = {
.platform_data = &colibri_asix_platdata
}
};
static mfp_cfg_t colibri_pxa320_eth_pin_config[] __initdata = {
GPIO3_nCS2, /* AX88796 chip select */
GPIO36_GPIO | MFP_PULL_HIGH /* AX88796 IRQ */
};
static void __init colibri_pxa320_init_eth(void)
{
colibri_pxa3xx_init_eth(&colibri_asix_platdata);
pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_eth_pin_config));
platform_device_register(&asix_device);
}
#else
static inline void __init colibri_pxa320_init_eth(void) {}
#endif /* CONFIG_AX88796 */
#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
static struct gpiod_lookup_table gpio_vbus_gpiod_table = {
.dev_id = "gpio-vbus",
.table = {
GPIO_LOOKUP("gpio-pxa", MFP_PIN_GPIO96,
"vbus", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct platform_device colibri_pxa320_gpio_vbus = {
.name = "gpio-vbus",
.id = -1,
};
static void colibri_pxa320_udc_command(int cmd)
{
if (cmd == PXA2XX_UDC_CMD_CONNECT)
UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
else if (cmd == PXA2XX_UDC_CMD_DISCONNECT)
UP2OCR = UP2OCR_HXOE;
}
static struct pxa2xx_udc_mach_info colibri_pxa320_udc_info __initdata = {
.udc_command = colibri_pxa320_udc_command,
.gpio_pullup = -1,
};
static void __init colibri_pxa320_init_udc(void)
{
pxa_set_udc_info(&colibri_pxa320_udc_info);
gpiod_add_lookup_table(&gpio_vbus_gpiod_table);
platform_device_register(&colibri_pxa320_gpio_vbus);
}
#else
static inline void colibri_pxa320_init_udc(void) {}
#endif
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static mfp_cfg_t colibri_pxa320_lcd_pin_config[] __initdata = {
GPIO6_2_LCD_LDD_0,
GPIO7_2_LCD_LDD_1,
GPIO8_2_LCD_LDD_2,
GPIO9_2_LCD_LDD_3,
GPIO10_2_LCD_LDD_4,
GPIO11_2_LCD_LDD_5,
GPIO12_2_LCD_LDD_6,
GPIO13_2_LCD_LDD_7,
GPIO63_LCD_LDD_8,
GPIO64_LCD_LDD_9,
GPIO65_LCD_LDD_10,
GPIO66_LCD_LDD_11,
GPIO67_LCD_LDD_12,
GPIO68_LCD_LDD_13,
GPIO69_LCD_LDD_14,
GPIO70_LCD_LDD_15,
GPIO71_LCD_LDD_16,
GPIO72_LCD_LDD_17,
GPIO73_LCD_CS_N,
GPIO74_LCD_VSYNC,
GPIO14_2_LCD_FCLK,
GPIO15_2_LCD_LCLK,
GPIO16_2_LCD_PCLK,
GPIO17_2_LCD_BIAS,
};
static void __init colibri_pxa320_init_lcd(void)
{
pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_lcd_pin_config));
}
#else
static inline void colibri_pxa320_init_lcd(void) {}
#endif
#if defined(CONFIG_SND_AC97_CODEC) || \
defined(CONFIG_SND_AC97_CODEC_MODULE)
static mfp_cfg_t colibri_pxa320_ac97_pin_config[] __initdata = {
GPIO34_AC97_SYSCLK,
GPIO35_AC97_SDATA_IN_0,
GPIO37_AC97_SDATA_OUT,
GPIO38_AC97_SYNC,
GPIO39_AC97_BITCLK,
GPIO40_AC97_nACRESET
};
static inline void __init colibri_pxa320_init_ac97(void)
{
pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_ac97_pin_config));
pxa_set_ac97_info(NULL);
}
#else
static inline void colibri_pxa320_init_ac97(void) {}
#endif
void __init colibri_pxa320_init(void)
{
colibri_pxa320_init_eth();
colibri_pxa3xx_init_nand();
colibri_pxa320_init_lcd();
colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO49_GPIO));
colibri_pxa320_init_ac97();
colibri_pxa320_init_udc();
/* Evalboard init */
pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_evalboard_pin_config));
colibri_evalboard_init();
}
MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
.atag_offset = 0x100,
.init_machine = colibri_pxa320_init,
.map_io = pxa3xx_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa3xx_init_irq,
.handle_irq = pxa3xx_handle_irq,
.init_time = pxa_timer_init,
.restart = pxa_restart,
MACHINE_END

147
arch/arm/mach-pxa/colibri-pxa3xx.c
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@ -1,147 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* arch/arm/mach-pxa/colibri-pxa3xx.c
*
* Common functions for all Toradex PXA3xx modules
*
* Daniel Mack <daniel@caiaq.de>
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/etherdevice.h>
#include <asm/mach-types.h>
#include <linux/sizes.h>
#include <asm/system_info.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include "pxa3xx-regs.h"
#include "mfp-pxa300.h"
#include "colibri.h"
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#include "generic.h"
#include "devices.h"
#if defined(CONFIG_AX88796)
#define ETHER_ADDR_LEN 6
static u8 ether_mac_addr[ETHER_ADDR_LEN];
void __init colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data)
{
int i;
u64 serial = ((u64) system_serial_high << 32) | system_serial_low;
/*
* If the bootloader passed in a serial boot tag, which contains a
* valid ethernet MAC, pass it to the interface. Toradex ships the
* modules with their own bootloader which provides a valid MAC
* this way.
*/
for (i = 0; i < ETHER_ADDR_LEN; i++) {
ether_mac_addr[i] = serial & 0xff;
serial >>= 8;
}
if (is_valid_ether_addr(ether_mac_addr)) {
plat_data->flags |= AXFLG_MAC_FROMPLATFORM;
plat_data->mac_addr = ether_mac_addr;
printk(KERN_INFO "%s(): taking MAC from serial boot tag\n",
__func__);
} else {
plat_data->flags |= AXFLG_MAC_FROMDEV;
printk(KERN_INFO "%s(): no valid serial boot tag found, "
"taking MAC from device\n", __func__);
}
}
#endif
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static int lcd_bl_pin;
/*
* LCD panel (Sharp LQ043T3DX02)
*/
static void colibri_lcd_backlight(int on)
{
gpio_set_value(lcd_bl_pin, !!on);
}
static struct pxafb_mode_info sharp_lq43_mode = {
.pixclock = 101936,
.xres = 480,
.yres = 272,
.bpp = 32,
.depth = 18,
.hsync_len = 41,
.left_margin = 2,
.right_margin = 2,
.vsync_len = 10,
.upper_margin = 2,
.lower_margin = 2,
.sync = 0,
.cmap_greyscale = 0,
};
static struct pxafb_mach_info sharp_lq43_info = {
.modes = &sharp_lq43_mode,
.num_modes = 1,
.cmap_inverse = 0,
.cmap_static = 0,
.lcd_conn = LCD_COLOR_TFT_18BPP,
.pxafb_backlight_power = colibri_lcd_backlight,
};
void __init colibri_pxa3xx_init_lcd(int bl_pin)
{
lcd_bl_pin = bl_pin;
gpio_request(bl_pin, "lcd backlight");
gpio_direction_output(bl_pin, 0);
pxa_set_fb_info(NULL, &sharp_lq43_info);
}
#endif
#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
static struct mtd_partition colibri_nand_partitions[] = {
{
.name = "bootloader",
.offset = 0,
.size = SZ_512K,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
{
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = SZ_4M,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
{
.name = "reserved",
.offset = MTDPART_OFS_APPEND,
.size = SZ_1M,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
{
.name = "fs",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static struct pxa3xx_nand_platform_data colibri_nand_info = {
.keep_config = 1,
.parts = colibri_nand_partitions,
.nr_parts = ARRAY_SIZE(colibri_nand_partitions),
};
void __init colibri_pxa3xx_init_nand(void)
{
pxa3xx_set_nand_info(&colibri_nand_info);
}
#endif

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arch/arm/mach-pxa/colibri.h
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _COLIBRI_H_
#define _COLIBRI_H_
#include <net/ax88796.h>
#include "mfp.h"
/*
* base board glue for PXA270 module
*/
enum {
COLIBRI_EVALBOARD = 0,
COLIBRI_PXA270_INCOME,
};
#if defined(CONFIG_MACH_COLIBRI_EVALBOARD)
extern void colibri_evalboard_init(void);
#else
static inline void colibri_evalboard_init(void) {}
#endif
#if defined(CONFIG_MACH_COLIBRI_PXA270_INCOME)
extern void colibri_pxa270_income_boardinit(void);
#else
static inline void colibri_pxa270_income_boardinit(void) {}
#endif
/*
* common settings for all modules
*/
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
extern void colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin);
#else
static inline void colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin) {}
#endif
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
extern void colibri_pxa3xx_init_lcd(int bl_pin);
#else
static inline void colibri_pxa3xx_init_lcd(int bl_pin) {}
#endif
#if defined(CONFIG_AX88796)
extern void colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data);
#endif
#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
extern void colibri_pxa3xx_init_nand(void);
#else
static inline void colibri_pxa3xx_init_nand(void) {}
#endif
/* physical memory regions */
#define COLIBRI_SDRAM_BASE 0xa0000000 /* SDRAM region */
/* GPIO definitions for Colibri PXA270 */
#define GPIO114_COLIBRI_PXA270_ETH_IRQ 114
#define GPIO0_COLIBRI_PXA270_SD_DETECT 0
#define GPIO113_COLIBRI_PXA270_TS_IRQ 113
/* GPIO definitions for Colibri PXA300/310 */
#define GPIO13_COLIBRI_PXA300_SD_DETECT 13
/* GPIO definitions for Colibri PXA320 */
#define GPIO28_COLIBRI_PXA320_SD_DETECT 28
#endif /* _COLIBRI_H_ */

826
arch/arm/mach-pxa/corgi.c
View File

@ -1,826 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Support for Sharp SL-C7xx PDAs
* Models: SL-C700 (Corgi), SL-C750 (Shepherd), SL-C760 (Husky)
*
* Copyright (c) 2004-2005 Richard Purdie
*
* Based on Sharp's 2.4 kernel patches/lubbock.c
*/
#include <linux/kernel.h>
#include <linux/module.h> /* symbol_get ; symbol_put */
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/major.h>
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/leds.h>
#include <linux/mmc/host.h>
#include <linux/mtd/physmap.h>
#include <linux/pm.h>
#include <linux/gpio.h>
#include <linux/gpio/machine.h>
#include <linux/backlight.h>
#include <linux/i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/io.h>
#include <linux/regulator/machine.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/corgi_lcd.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/mtd/sharpsl.h>
#include <linux/input/matrix_keypad.h>
#include <linux/gpio_keys.h>
#include <linux/memblock.h>
#include <video/w100fb.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include "pxa25x.h"
#include <linux/platform_data/irda-pxaficp.h>
#include <linux/platform_data/mmc-pxamci.h>
#include "udc.h"
#include "corgi.h"
#include "sharpsl_pm.h"
#include <asm/mach/sharpsl_param.h>
#include <asm/hardware/scoop.h>
#include "generic.h"
#include "devices.h"
static unsigned long corgi_pin_config[] __initdata = {
/* Static Memory I/O */
GPIO78_nCS_2, /* w100fb */
GPIO80_nCS_4, /* scoop */
/* SSP1 */
GPIO23_SSP1_SCLK,
GPIO25_SSP1_TXD,
GPIO26_SSP1_RXD,
GPIO24_GPIO, /* CORGI_GPIO_ADS7846_CS - SFRM as chip select */
/* I2S */
GPIO28_I2S_BITCLK_OUT,
GPIO29_I2S_SDATA_IN,
GPIO30_I2S_SDATA_OUT,
GPIO31_I2S_SYNC,
GPIO32_I2S_SYSCLK,
/* Infra-Red */
GPIO47_FICP_TXD,
GPIO46_FICP_RXD,
/* FFUART */
GPIO40_FFUART_DTR,
GPIO41_FFUART_RTS,
GPIO39_FFUART_TXD,
GPIO37_FFUART_DSR,
GPIO34_FFUART_RXD,
GPIO35_FFUART_CTS,
/* PC Card */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO52_nPCE_1,
GPIO53_nPCE_2,
GPIO54_nPSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
/* MMC */
GPIO6_MMC_CLK,
GPIO8_MMC_CS0,
/* GPIO Matrix Keypad */
GPIO66_GPIO | MFP_LPM_DRIVE_HIGH, /* column 0 */
GPIO67_GPIO | MFP_LPM_DRIVE_HIGH, /* column 1 */
GPIO68_GPIO | MFP_LPM_DRIVE_HIGH, /* column 2 */
GPIO69_GPIO | MFP_LPM_DRIVE_HIGH, /* column 3 */
GPIO70_GPIO | MFP_LPM_DRIVE_HIGH, /* column 4 */
GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* column 5 */
GPIO72_GPIO | MFP_LPM_DRIVE_HIGH, /* column 6 */
GPIO73_GPIO | MFP_LPM_DRIVE_HIGH, /* column 7 */
GPIO74_GPIO | MFP_LPM_DRIVE_HIGH, /* column 8 */
GPIO75_GPIO | MFP_LPM_DRIVE_HIGH, /* column 9 */
GPIO76_GPIO | MFP_LPM_DRIVE_HIGH, /* column 10 */
GPIO77_GPIO | MFP_LPM_DRIVE_HIGH, /* column 11 */
GPIO58_GPIO, /* row 0 */
GPIO59_GPIO, /* row 1 */
GPIO60_GPIO, /* row 2 */
GPIO61_GPIO, /* row 3 */
GPIO62_GPIO, /* row 4 */
GPIO63_GPIO, /* row 5 */
GPIO64_GPIO, /* row 6 */
GPIO65_GPIO, /* row 7 */
/* GPIO */
GPIO9_GPIO, /* CORGI_GPIO_nSD_DETECT */
GPIO7_GPIO, /* CORGI_GPIO_nSD_WP */
GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_MAIN_BAT_{LOW,COVER} */
GPIO13_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_LED_ORANGE */
GPIO21_GPIO, /* CORGI_GPIO_ADC_TEMP */
GPIO22_GPIO, /* CORGI_GPIO_IR_ON */
GPIO33_GPIO, /* CORGI_GPIO_SD_PWR */
GPIO38_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_CHRG_ON */
GPIO43_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_CHRG_UKN */
GPIO44_GPIO, /* CORGI_GPIO_HSYNC */
GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_KEY_INT */
GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* CORGI_GPIO_AC_IN */
GPIO3_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_WAKEUP */
};
/*
* Corgi SCOOP Device
*/
static struct resource corgi_scoop_resources[] = {
[0] = {
.start = 0x10800000,
.end = 0x10800fff,
.flags = IORESOURCE_MEM,
},
};
static struct scoop_config corgi_scoop_setup = {
.io_dir = CORGI_SCOOP_IO_DIR,
.io_out = CORGI_SCOOP_IO_OUT,
.gpio_base = CORGI_SCOOP_GPIO_BASE,
};
struct platform_device corgiscoop_device = {
.name = "sharp-scoop",
.id = -1,
.dev = {
.platform_data = &corgi_scoop_setup,
},
.num_resources = ARRAY_SIZE(corgi_scoop_resources),
.resource = corgi_scoop_resources,
};
static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = {
{
.dev = &corgiscoop_device.dev,
.irq = CORGI_IRQ_GPIO_CF_IRQ,
.cd_irq = CORGI_IRQ_GPIO_CF_CD,
.cd_irq_str = "PCMCIA0 CD",
},
};
static struct scoop_pcmcia_config corgi_pcmcia_config = {
.devs = &corgi_pcmcia_scoop[0],
.num_devs = 1,
};
static struct w100_mem_info corgi_fb_mem = {
.ext_cntl = 0x00040003,
.sdram_mode_reg = 0x00650021,
.ext_timing_cntl = 0x10002a4a,
.io_cntl = 0x7ff87012,
.size = 0x1fffff,
};
static struct w100_gen_regs corgi_fb_regs = {
.lcd_format = 0x00000003,
.lcdd_cntl1 = 0x01CC0000,
.lcdd_cntl2 = 0x0003FFFF,
.genlcd_cntl1 = 0x00FFFF0D,
.genlcd_cntl2 = 0x003F3003,
.genlcd_cntl3 = 0x000102aa,
};
static struct w100_gpio_regs corgi_fb_gpio = {
.init_data1 = 0x000000bf,
.init_data2 = 0x00000000,
.gpio_dir1 = 0x00000000,
.gpio_oe1 = 0x03c0feff,
.gpio_dir2 = 0x00000000,
.gpio_oe2 = 0x00000000,
};
static struct w100_mode corgi_fb_modes[] = {
{
.xres = 480,
.yres = 640,
.left_margin = 0x56,
.right_margin = 0x55,
.upper_margin = 0x03,
.lower_margin = 0x00,
.crtc_ss = 0x82360056,
.crtc_ls = 0xA0280000,
.crtc_gs = 0x80280028,
.crtc_vpos_gs = 0x02830002,
.crtc_rev = 0x00400008,
.crtc_dclk = 0xA0000000,
.crtc_gclk = 0x8015010F,
.crtc_goe = 0x80100110,
.crtc_ps1_active = 0x41060010,
.pll_freq = 75,
.fast_pll_freq = 100,
.sysclk_src = CLK_SRC_PLL,
.sysclk_divider = 0,
.pixclk_src = CLK_SRC_PLL,
.pixclk_divider = 2,
.pixclk_divider_rotated = 6,
},{
.xres = 240,
.yres = 320,
.left_margin = 0x27,
.right_margin = 0x2e,
.upper_margin = 0x01,
.lower_margin = 0x00,
.crtc_ss = 0x81170027,
.crtc_ls = 0xA0140000,
.crtc_gs = 0xC0140014,
.crtc_vpos_gs = 0x00010141,
.crtc_rev = 0x00400008,
.crtc_dclk = 0xA0000000,
.crtc_gclk = 0x8015010F,
.crtc_goe = 0x80100110,
.crtc_ps1_active = 0x41060010,
.pll_freq = 0,
.fast_pll_freq = 0,
.sysclk_src = CLK_SRC_XTAL,
.sysclk_divider = 0,
.pixclk_src = CLK_SRC_XTAL,
.pixclk_divider = 1,
.pixclk_divider_rotated = 1,
},
};
static struct w100fb_mach_info corgi_fb_info = {
.init_mode = INIT_MODE_ROTATED,
.mem = &corgi_fb_mem,
.regs = &corgi_fb_regs,
.modelist = &corgi_fb_modes[0],
.num_modes = 2,
.gpio = &corgi_fb_gpio,
.xtal_freq = 12500000,
.xtal_dbl = 0,
};
static struct resource corgi_fb_resources[] = {
[0] = {
.start = 0x08000000,
.end = 0x08ffffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device corgifb_device = {
.name = "w100fb",
.id = -1,
.num_resources = ARRAY_SIZE(corgi_fb_resources),
.resource = corgi_fb_resources,
.dev = {
.platform_data = &corgi_fb_info,
},
};
/*
* Corgi Keyboard Device
*/
#define CORGI_KEY_CALENDER KEY_F1
#define CORGI_KEY_ADDRESS KEY_F2
#define CORGI_KEY_FN KEY_F3
#define CORGI_KEY_CANCEL KEY_F4
#define CORGI_KEY_OFF KEY_SUSPEND
#define CORGI_KEY_EXOK KEY_F5
#define CORGI_KEY_EXCANCEL KEY_F6
#define CORGI_KEY_EXJOGDOWN KEY_F7
#define CORGI_KEY_EXJOGUP KEY_F8
#define CORGI_KEY_JAP1 KEY_LEFTCTRL
#define CORGI_KEY_JAP2 KEY_LEFTALT
#define CORGI_KEY_MAIL KEY_F10
#define CORGI_KEY_OK KEY_F11
#define CORGI_KEY_MENU KEY_F12
static const uint32_t corgikbd_keymap[] = {
KEY(0, 1, KEY_1),
KEY(0, 2, KEY_3),
KEY(0, 3, KEY_5),
KEY(0, 4, KEY_6),
KEY(0, 5, KEY_7),
KEY(0, 6, KEY_9),
KEY(0, 7, KEY_0),
KEY(0, 8, KEY_BACKSPACE),
KEY(1, 1, KEY_2),
KEY(1, 2, KEY_4),
KEY(1, 3, KEY_R),
KEY(1, 4, KEY_Y),
KEY(1, 5, KEY_8),
KEY(1, 6, KEY_I),
KEY(1, 7, KEY_O),
KEY(1, 8, KEY_P),
KEY(2, 0, KEY_TAB),
KEY(2, 1, KEY_Q),
KEY(2, 2, KEY_E),
KEY(2, 3, KEY_T),
KEY(2, 4, KEY_G),
KEY(2, 5, KEY_U),
KEY(2, 6, KEY_J),
KEY(2, 7, KEY_K),
KEY(3, 0, CORGI_KEY_CALENDER),
KEY(3, 1, KEY_W),
KEY(3, 2, KEY_S),
KEY(3, 3, KEY_F),
KEY(3, 4, KEY_V),
KEY(3, 5, KEY_H),
KEY(3, 6, KEY_M),
KEY(3, 7, KEY_L),
KEY(3, 9, KEY_RIGHTSHIFT),
KEY(4, 0, CORGI_KEY_ADDRESS),
KEY(4, 1, KEY_A),
KEY(4, 2, KEY_D),
KEY(4, 3, KEY_C),
KEY(4, 4, KEY_B),
KEY(4, 5, KEY_N),
KEY(4, 6, KEY_DOT),
KEY(4, 8, KEY_ENTER),
KEY(4, 10, KEY_LEFTSHIFT),
KEY(5, 0, CORGI_KEY_MAIL),
KEY(5, 1, KEY_Z),
KEY(5, 2, KEY_X),
KEY(5, 3, KEY_MINUS),
KEY(5, 4, KEY_SPACE),
KEY(5, 5, KEY_COMMA),
KEY(5, 7, KEY_UP),
KEY(5, 11, CORGI_KEY_FN),
KEY(6, 0, KEY_SYSRQ),
KEY(6, 1, CORGI_KEY_JAP1),
KEY(6, 2, CORGI_KEY_JAP2),
KEY(6, 3, CORGI_KEY_CANCEL),
KEY(6, 4, CORGI_KEY_OK),
KEY(6, 5, CORGI_KEY_MENU),
KEY(6, 6, KEY_LEFT),
KEY(6, 7, KEY_DOWN),
KEY(6, 8, KEY_RIGHT),
KEY(7, 0, CORGI_KEY_OFF),
KEY(7, 1, CORGI_KEY_EXOK),
KEY(7, 2, CORGI_KEY_EXCANCEL),
KEY(7, 3, CORGI_KEY_EXJOGDOWN),
KEY(7, 4, CORGI_KEY_EXJOGUP),
};
static struct matrix_keymap_data corgikbd_keymap_data = {
.keymap = corgikbd_keymap,
.keymap_size = ARRAY_SIZE(corgikbd_keymap),
};
static const int corgikbd_row_gpios[] =
{ 58, 59, 60, 61, 62, 63, 64, 65 };
static const int corgikbd_col_gpios[] =
{ 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77 };
static struct matrix_keypad_platform_data corgikbd_pdata = {
.keymap_data = &corgikbd_keymap_data,
.row_gpios = corgikbd_row_gpios,
.col_gpios = corgikbd_col_gpios,
.num_row_gpios = ARRAY_SIZE(corgikbd_row_gpios),
.num_col_gpios = ARRAY_SIZE(corgikbd_col_gpios),
.col_scan_delay_us = 10,
.debounce_ms = 10,
.wakeup = 1,
};
static struct platform_device corgikbd_device = {
.name = "matrix-keypad",
.id = -1,
.dev = {
.platform_data = &corgikbd_pdata,
},
};
static struct gpio_keys_button corgi_gpio_keys[] = {
{
.type = EV_SW,
.code = SW_LID,
.gpio = CORGI_GPIO_SWA,
.desc = "Lid close switch",
.debounce_interval = 500,
},
{
.type = EV_SW,
.code = SW_TABLET_MODE,
.gpio = CORGI_GPIO_SWB,
.desc = "Tablet mode switch",
.debounce_interval = 500,
},
{
.type = EV_SW,
.code = SW_HEADPHONE_INSERT,
.gpio = CORGI_GPIO_AK_INT,
.desc = "HeadPhone insert",
.debounce_interval = 500,
},
};
static struct gpio_keys_platform_data corgi_gpio_keys_platform_data = {
.buttons = corgi_gpio_keys,
.nbuttons = ARRAY_SIZE(corgi_gpio_keys),
.poll_interval = 250,
};
static struct platform_device corgi_gpio_keys_device = {
.name = "gpio-keys-polled",
.id = -1,
.dev = {
.platform_data = &corgi_gpio_keys_platform_data,
},
};
/*
* Corgi LEDs
*/
static struct gpio_led corgi_gpio_leds[] = {
{
.name = "corgi:amber:charge",
.default_trigger = "sharpsl-charge",
.gpio = CORGI_GPIO_LED_ORANGE,
},
{
.name = "corgi:green:mail",
.default_trigger = "nand-disk",
.gpio = CORGI_GPIO_LED_GREEN,
},
};
static struct gpio_led_platform_data corgi_gpio_leds_info = {
.leds = corgi_gpio_leds,
.num_leds = ARRAY_SIZE(corgi_gpio_leds),
};
static struct platform_device corgiled_device = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &corgi_gpio_leds_info,
},
};
static struct gpiod_lookup_table corgi_audio_gpio_table = {
.dev_id = "corgi-audio",
.table = {
GPIO_LOOKUP("sharp-scoop",
CORGI_GPIO_MUTE_L - CORGI_SCOOP_GPIO_BASE,
"mute-l", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop",
CORGI_GPIO_MUTE_R - CORGI_SCOOP_GPIO_BASE,
"mute-r", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop",
CORGI_GPIO_APM_ON - CORGI_SCOOP_GPIO_BASE,
"apm-on", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop",
CORGI_GPIO_MIC_BIAS - CORGI_SCOOP_GPIO_BASE,
"mic-bias", GPIO_ACTIVE_HIGH),
{ },
},
};
/*
* Corgi Audio
*/
static struct platform_device corgi_audio_device = {
.name = "corgi-audio",
.id = -1,
};
/*
* MMC/SD Device
*
* The card detect interrupt isn't debounced so we delay it by 250ms
* to give the card a chance to fully insert/eject.
*/
static struct pxamci_platform_data corgi_mci_platform_data = {
.detect_delay_ms = 250,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
};
static struct gpiod_lookup_table corgi_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
/* Card detect on GPIO 9 */
GPIO_LOOKUP("gpio-pxa", CORGI_GPIO_nSD_DETECT,
"cd", GPIO_ACTIVE_LOW),
/* Write protect on GPIO 7 */
GPIO_LOOKUP("gpio-pxa", CORGI_GPIO_nSD_WP,
"wp", GPIO_ACTIVE_LOW),
/* Power on GPIO 33 */
GPIO_LOOKUP("gpio-pxa", CORGI_GPIO_SD_PWR,
"power", GPIO_ACTIVE_HIGH),
{ },
},
};
/*
* Irda
*/
static struct pxaficp_platform_data corgi_ficp_platform_data = {
.gpio_pwdown = CORGI_GPIO_IR_ON,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/*
* USB Device Controller
*/
static struct pxa2xx_udc_mach_info udc_info __initdata = {
/* no connect GPIO; corgi can't tell connection status */
.gpio_pullup = CORGI_GPIO_USB_PULLUP,
};
#if IS_ENABLED(CONFIG_SPI_PXA2XX)
static struct pxa2xx_spi_controller corgi_spi_info = {
.num_chipselect = 3,
};
static struct gpiod_lookup_table corgi_spi_gpio_table = {
.dev_id = "spi1",
.table = {
GPIO_LOOKUP_IDX("gpio-pxa", CORGI_GPIO_ADS7846_CS, "cs", 0, GPIO_ACTIVE_LOW),
GPIO_LOOKUP_IDX("gpio-pxa", CORGI_GPIO_LCDCON_CS, "cs", 1, GPIO_ACTIVE_LOW),
GPIO_LOOKUP_IDX("gpio-pxa", CORGI_GPIO_MAX1111_CS, "cs", 2, GPIO_ACTIVE_LOW),
{ },
},
};
static void corgi_wait_for_hsync(void)
{
while (gpio_get_value(CORGI_GPIO_HSYNC))
cpu_relax();
while (!gpio_get_value(CORGI_GPIO_HSYNC))
cpu_relax();
}
static struct ads7846_platform_data corgi_ads7846_info = {
.model = 7846,
.vref_delay_usecs = 100,
.x_plate_ohms = 419,
.y_plate_ohms = 486,
.gpio_pendown = CORGI_GPIO_TP_INT,
.wait_for_sync = corgi_wait_for_hsync,
};
static void corgi_bl_kick_battery(void)
{
void (*kick_batt)(void);
kick_batt = symbol_get(sharpsl_battery_kick);
if (kick_batt) {
kick_batt();
symbol_put(sharpsl_battery_kick);
}
}
static struct gpiod_lookup_table corgi_lcdcon_gpio_table = {
.dev_id = "spi1.1",
.table = {
GPIO_LOOKUP("gpio-pxa", CORGI_GPIO_BACKLIGHT_CONT,
"BL_CONT", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct corgi_lcd_platform_data corgi_lcdcon_info = {
.init_mode = CORGI_LCD_MODE_VGA,
.max_intensity = 0x2f,
.default_intensity = 0x1f,
.limit_mask = 0x0b,
.kick_battery = corgi_bl_kick_battery,
};
static struct spi_board_info corgi_spi_devices[] = {
{
.modalias = "ads7846",
.max_speed_hz = 1200000,
.bus_num = 1,
.chip_select = 0,
.platform_data = &corgi_ads7846_info,
.irq = PXA_GPIO_TO_IRQ(CORGI_GPIO_TP_INT),
}, {
.modalias = "corgi-lcd",
.max_speed_hz = 50000,
.bus_num = 1,
.chip_select = 1,
.platform_data = &corgi_lcdcon_info,
}, {
.modalias = "max1111",
.max_speed_hz = 450000,
.bus_num = 1,
.chip_select = 2,
},
};
static void __init corgi_init_spi(void)
{
gpiod_add_lookup_table(&corgi_spi_gpio_table);
pxa2xx_set_spi_info(1, &corgi_spi_info);
gpiod_add_lookup_table(&corgi_lcdcon_gpio_table);
spi_register_board_info(ARRAY_AND_SIZE(corgi_spi_devices));
}
#else
static inline void corgi_init_spi(void) {}
#endif
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr sharpsl_bbt = {
.options = 0,
.offs = 4,
.len = 2,
.pattern = scan_ff_pattern
};
static const char * const probes[] = {
"cmdlinepart",
"ofpart",
"sharpslpart",
NULL,
};
static struct sharpsl_nand_platform_data sharpsl_nand_platform_data = {
.badblock_pattern = &sharpsl_bbt,
.part_parsers = probes,
};
static struct resource sharpsl_nand_resources[] = {
{
.start = 0x0C000000,
.end = 0x0C000FFF,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device sharpsl_nand_device = {
.name = "sharpsl-nand",
.id = -1,
.resource = sharpsl_nand_resources,
.num_resources = ARRAY_SIZE(sharpsl_nand_resources),
.dev.platform_data = &sharpsl_nand_platform_data,
};
static struct mtd_partition sharpsl_rom_parts[] = {
{
.name ="Boot PROM Filesystem",
.offset = 0x00120000,
.size = MTDPART_SIZ_FULL,
},
};
static struct physmap_flash_data sharpsl_rom_data = {
.width = 2,
.nr_parts = ARRAY_SIZE(sharpsl_rom_parts),
.parts = sharpsl_rom_parts,
};
static struct resource sharpsl_rom_resources[] = {
{
.start = 0x00000000,
.end = 0x007fffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device sharpsl_rom_device = {
.name = "physmap-flash",
.id = -1,
.resource = sharpsl_rom_resources,
.num_resources = ARRAY_SIZE(sharpsl_rom_resources),
.dev.platform_data = &sharpsl_rom_data,
};
static struct platform_device *devices[] __initdata = {
&corgiscoop_device,
&corgifb_device,
&corgi_gpio_keys_device,
&corgikbd_device,
&corgiled_device,
&corgi_audio_device,
&sharpsl_nand_device,
&sharpsl_rom_device,
};
static struct i2c_board_info __initdata corgi_i2c_devices[] = {
{ I2C_BOARD_INFO("wm8731", 0x1b) },
};
static void corgi_poweroff(void)
{
if (!machine_is_corgi())
/* Green LED off tells the bootloader to halt */
gpio_set_value(CORGI_GPIO_LED_GREEN, 0);
pxa_restart(REBOOT_HARD, NULL);
}
static void corgi_restart(enum reboot_mode mode, const char *cmd)
{
if (!machine_is_corgi())
/* Green LED on tells the bootloader to reboot */
gpio_set_value(CORGI_GPIO_LED_GREEN, 1);
pxa_restart(REBOOT_HARD, cmd);
}
static void __init corgi_init(void)
{
pm_power_off = corgi_poweroff;
/* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
PCFR |= PCFR_OPDE;
pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config));
/* allow wakeup from various GPIOs */
gpio_set_wake(CORGI_GPIO_KEY_INT, 1);
gpio_set_wake(CORGI_GPIO_WAKEUP, 1);
gpio_set_wake(CORGI_GPIO_AC_IN, 1);
gpio_set_wake(CORGI_GPIO_CHRG_FULL, 1);
if (!machine_is_corgi())
gpio_set_wake(CORGI_GPIO_MAIN_BAT_LOW, 1);
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
corgi_init_spi();
pxa_set_udc_info(&udc_info);
gpiod_add_lookup_table(&corgi_mci_gpio_table);
gpiod_add_lookup_table(&corgi_audio_gpio_table);
pxa_set_mci_info(&corgi_mci_platform_data);
pxa_set_ficp_info(&corgi_ficp_platform_data);
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(corgi_i2c_devices));
platform_scoop_config = &corgi_pcmcia_config;
platform_add_devices(devices, ARRAY_SIZE(devices));
regulator_has_full_constraints();
}
static void __init fixup_corgi(struct tag *tags, char **cmdline)
{
sharpsl_save_param();
if (machine_is_corgi())
memblock_add(0xa0000000, SZ_32M);
else
memblock_add(0xa0000000, SZ_64M);
}
#ifdef CONFIG_MACH_CORGI
MACHINE_START(CORGI, "SHARP Corgi")
.fixup = fixup_corgi,
.map_io = pxa25x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_machine = corgi_init,
.init_time = pxa_timer_init,
.restart = corgi_restart,
MACHINE_END
#endif
#ifdef CONFIG_MACH_SHEPHERD
MACHINE_START(SHEPHERD, "SHARP Shepherd")
.fixup = fixup_corgi,
.map_io = pxa25x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_machine = corgi_init,
.init_time = pxa_timer_init,
.restart = corgi_restart,
MACHINE_END
#endif
#ifdef CONFIG_MACH_HUSKY
MACHINE_START(HUSKY, "SHARP Husky")
.fixup = fixup_corgi,
.map_io = pxa25x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_machine = corgi_init,
.init_time = pxa_timer_init,
.restart = corgi_restart,
MACHINE_END
#endif

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arch/arm/mach-pxa/corgi.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Hardware specific definitions for SL-C7xx series of PDAs
*
* Copyright (c) 2004-2005 Richard Purdie
*
* Based on Sharp's 2.4 kernel patches
*/
#ifndef __ASM_ARCH_CORGI_H
#define __ASM_ARCH_CORGI_H 1
#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */
/*
* Corgi (Non Standard) GPIO Definitions
*/
#define CORGI_GPIO_KEY_INT (0) /* Keyboard Interrupt */
#define CORGI_GPIO_AC_IN (1) /* Charger Detection */
#define CORGI_GPIO_WAKEUP (3) /* System wakeup notification? */
#define CORGI_GPIO_AK_INT (4) /* Headphone Jack Control Interrupt */
#define CORGI_GPIO_TP_INT (5) /* Touch Panel Interrupt */
#define CORGI_GPIO_nSD_WP (7) /* SD Write Protect? */
#define CORGI_GPIO_nSD_DETECT (9) /* MMC/SD Card Detect */
#define CORGI_GPIO_nSD_INT (10) /* SD Interrupt for SDIO? */
#define CORGI_GPIO_MAIN_BAT_LOW (11) /* Main Battery Low Notification */
#define CORGI_GPIO_BAT_COVER (11) /* Battery Cover Detect */
#define CORGI_GPIO_LED_ORANGE (13) /* Orange LED Control */
#define CORGI_GPIO_CF_CD (14) /* Compact Flash Card Detect */
#define CORGI_GPIO_CHRG_FULL (16) /* Charging Complete Notification */
#define CORGI_GPIO_CF_IRQ (17) /* Compact Flash Interrupt */
#define CORGI_GPIO_LCDCON_CS (19) /* LCD Control Chip Select */
#define CORGI_GPIO_MAX1111_CS (20) /* MAX1111 Chip Select */
#define CORGI_GPIO_ADC_TEMP_ON (21) /* Select battery voltage or temperature */
#define CORGI_GPIO_IR_ON (22) /* Enable IR Transceiver */
#define CORGI_GPIO_ADS7846_CS (24) /* ADS7846 Chip Select */
#define CORGI_GPIO_SD_PWR (33) /* MMC/SD Power */
#define CORGI_GPIO_CHRG_ON (38) /* Enable battery Charging */
#define CORGI_GPIO_DISCHARGE_ON (42) /* Enable battery Discharge */
#define CORGI_GPIO_CHRG_UKN (43) /* Unknown Charging (Bypass Control?) */
#define CORGI_GPIO_HSYNC (44) /* LCD HSync Pulse */
#define CORGI_GPIO_USB_PULLUP (45) /* USB show presence to host */
/*
* Corgi Keyboard Definitions
*/
#define CORGI_KEY_STROBE_NUM (12)
#define CORGI_KEY_SENSE_NUM (8)
#define CORGI_GPIO_ALL_STROBE_BIT (0x00003ffc)
#define CORGI_GPIO_HIGH_SENSE_BIT (0xfc000000)
#define CORGI_GPIO_HIGH_SENSE_RSHIFT (26)
#define CORGI_GPIO_LOW_SENSE_BIT (0x00000003)
#define CORGI_GPIO_LOW_SENSE_LSHIFT (6)
#define CORGI_GPIO_STROBE_BIT(a) GPIO_bit(66+(a))
#define CORGI_GPIO_SENSE_BIT(a) GPIO_bit(58+(a))
#define CORGI_GAFR_ALL_STROBE_BIT (0x0ffffff0)
#define CORGI_GAFR_HIGH_SENSE_BIT (0xfff00000)
#define CORGI_GAFR_LOW_SENSE_BIT (0x0000000f)
#define CORGI_GPIO_KEY_SENSE(a) (58+(a))
#define CORGI_GPIO_KEY_STROBE(a) (66+(a))
/*
* Corgi Interrupts
*/
#define CORGI_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(0)
#define CORGI_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1)
#define CORGI_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(3)
#define CORGI_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(4)
#define CORGI_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5)
#define CORGI_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9)
#define CORGI_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(10)
#define CORGI_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(11)
#define CORGI_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14)
#define CORGI_IRQ_GPIO_CHRG_FULL PXA_GPIO_TO_IRQ(16) /* Battery fully charged */
#define CORGI_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17)
#define CORGI_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(58+(a)) /* Keyboard Sense lines */
/*
* Corgi SCOOP GPIOs and Config
*/
#define CORGI_SCP_LED_GREEN SCOOP_GPCR_PA11
#define CORGI_SCP_SWA SCOOP_GPCR_PA12 /* Hinge Switch A */
#define CORGI_SCP_SWB SCOOP_GPCR_PA13 /* Hinge Switch B */
#define CORGI_SCP_MUTE_L SCOOP_GPCR_PA14
#define CORGI_SCP_MUTE_R SCOOP_GPCR_PA15
#define CORGI_SCP_AKIN_PULLUP SCOOP_GPCR_PA16
#define CORGI_SCP_APM_ON SCOOP_GPCR_PA17
#define CORGI_SCP_BACKLIGHT_CONT SCOOP_GPCR_PA18
#define CORGI_SCP_MIC_BIAS SCOOP_GPCR_PA19
#define CORGI_SCOOP_IO_DIR ( CORGI_SCP_LED_GREEN | CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R | \
CORGI_SCP_AKIN_PULLUP | CORGI_SCP_APM_ON | CORGI_SCP_BACKLIGHT_CONT | \
CORGI_SCP_MIC_BIAS )
#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
#define CORGI_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0)
#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */
#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */
#define CORGI_GPIO_MUTE_L (CORGI_SCOOP_GPIO_BASE + 3)
#define CORGI_GPIO_MUTE_R (CORGI_SCOOP_GPIO_BASE + 4)
#define CORGI_GPIO_AKIN_PULLUP (CORGI_SCOOP_GPIO_BASE + 5)
#define CORGI_GPIO_APM_ON (CORGI_SCOOP_GPIO_BASE + 6)
#define CORGI_GPIO_BACKLIGHT_CONT (CORGI_SCOOP_GPIO_BASE + 7)
#define CORGI_GPIO_MIC_BIAS (CORGI_SCOOP_GPIO_BASE + 8)
#endif /* __ASM_ARCH_CORGI_H */

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arch/arm/mach-pxa/corgi_pm.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Battery and Power Management code for the Sharp SL-C7xx
*
* Copyright (c) 2005 Richard Purdie
*/
#include <linux/module.h>
#include <linux/stat.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/gpio-pxa.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/apm-emulation.h>
#include <linux/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include "corgi.h"
#include "pxa2xx-regs.h"
#include "sharpsl_pm.h"
#include "generic.h"
#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */
#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */
#define SHARPSL_CHARGE_ON_ACIN_HIGH 0x9b /* 6V */
#define SHARPSL_CHARGE_ON_ACIN_LOW 0x34 /* 2V */
#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */
#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */
static struct gpio charger_gpios[] = {
{ CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
{ CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" },
{ CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" },
{ CORGI_GPIO_AC_IN, GPIOF_IN, "Charger Detection" },
{ CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" },
{ CORGI_GPIO_WAKEUP, GPIOF_IN, "System wakeup notification" },
};
static void corgi_charger_init(void)
{
gpio_request_array(ARRAY_AND_SIZE(charger_gpios));
}
static void corgi_measure_temp(int on)
{
gpio_set_value(CORGI_GPIO_ADC_TEMP_ON, on);
}
static void corgi_charge(int on)
{
if (on) {
if (machine_is_corgi() && (sharpsl_pm.flags & SHARPSL_SUSPENDED)) {
gpio_set_value(CORGI_GPIO_CHRG_ON, 0);
gpio_set_value(CORGI_GPIO_CHRG_UKN, 1);
} else {
gpio_set_value(CORGI_GPIO_CHRG_ON, 1);
gpio_set_value(CORGI_GPIO_CHRG_UKN, 0);
}
} else {
gpio_set_value(CORGI_GPIO_CHRG_ON, 0);
gpio_set_value(CORGI_GPIO_CHRG_UKN, 0);
}
}
static void corgi_discharge(int on)
{
gpio_set_value(CORGI_GPIO_DISCHARGE_ON, on);
}
static void corgi_presuspend(void)
{
}
static void corgi_postsuspend(void)
{
}
/*
* Check what brought us out of the suspend.
* Return: 0 to sleep, otherwise wake
*/
static int corgi_should_wakeup(unsigned int resume_on_alarm)
{
int is_resume = 0;
dev_dbg(sharpsl_pm.dev, "PEDR = %x, GPIO_AC_IN = %d, "
"GPIO_CHRG_FULL = %d, GPIO_KEY_INT = %d, GPIO_WAKEUP = %d\n",
PEDR, gpio_get_value(CORGI_GPIO_AC_IN),
gpio_get_value(CORGI_GPIO_CHRG_FULL),
gpio_get_value(CORGI_GPIO_KEY_INT),
gpio_get_value(CORGI_GPIO_WAKEUP));
if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) {
if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
/* charge on */
dev_dbg(sharpsl_pm.dev, "ac insert\n");
sharpsl_pm.flags |= SHARPSL_DO_OFFLINE_CHRG;
} else {
/* charge off */
dev_dbg(sharpsl_pm.dev, "ac remove\n");
sharpsl_pm_led(SHARPSL_LED_OFF);
sharpsl_pm.machinfo->charge(0);
sharpsl_pm.charge_mode = CHRG_OFF;
}
}
if ((PEDR & GPIO_bit(CORGI_GPIO_CHRG_FULL)))
dev_dbg(sharpsl_pm.dev, "Charge full interrupt\n");
if (PEDR & GPIO_bit(CORGI_GPIO_KEY_INT))
is_resume |= GPIO_bit(CORGI_GPIO_KEY_INT);
if (PEDR & GPIO_bit(CORGI_GPIO_WAKEUP))
is_resume |= GPIO_bit(CORGI_GPIO_WAKEUP);
if (resume_on_alarm && (PEDR & PWER_RTC))
is_resume |= PWER_RTC;
dev_dbg(sharpsl_pm.dev, "is_resume: %x\n",is_resume);
return is_resume;
}
static bool corgi_charger_wakeup(void)
{
return !gpio_get_value(CORGI_GPIO_AC_IN) ||
!gpio_get_value(CORGI_GPIO_KEY_INT) ||
!gpio_get_value(CORGI_GPIO_WAKEUP);
}
unsigned long corgipm_read_devdata(int type)
{
switch(type) {
case SHARPSL_STATUS_ACIN:
return !gpio_get_value(CORGI_GPIO_AC_IN);
case SHARPSL_STATUS_LOCK:
return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
case SHARPSL_STATUS_CHRGFULL:
return gpio_get_value(sharpsl_pm.machinfo->gpio_batfull);
case SHARPSL_STATUS_FATAL:
return gpio_get_value(sharpsl_pm.machinfo->gpio_fatal);
case SHARPSL_ACIN_VOLT:
return sharpsl_pm_pxa_read_max1111(MAX1111_ACIN_VOLT);
case SHARPSL_BATT_TEMP:
return sharpsl_pm_pxa_read_max1111(MAX1111_BATT_TEMP);
case SHARPSL_BATT_VOLT:
default:
return sharpsl_pm_pxa_read_max1111(MAX1111_BATT_VOLT);
}
}
static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
.init = corgi_charger_init,
.exit = NULL,
.gpio_batlock = CORGI_GPIO_BAT_COVER,
.gpio_acin = CORGI_GPIO_AC_IN,
.gpio_batfull = CORGI_GPIO_CHRG_FULL,
.discharge = corgi_discharge,
.charge = corgi_charge,
.measure_temp = corgi_measure_temp,
.presuspend = corgi_presuspend,
.postsuspend = corgi_postsuspend,
.read_devdata = corgipm_read_devdata,
.charger_wakeup = corgi_charger_wakeup,
.should_wakeup = corgi_should_wakeup,
#if defined(CONFIG_LCD_CORGI)
.backlight_limit = corgi_lcd_limit_intensity,
#endif
.charge_on_volt = SHARPSL_CHARGE_ON_VOLT,
.charge_on_temp = SHARPSL_CHARGE_ON_TEMP,
.charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH,
.charge_acin_low = SHARPSL_CHARGE_ON_ACIN_LOW,
.fatal_acin_volt = SHARPSL_FATAL_ACIN_VOLT,
.fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT,
.bat_levels = 40,
.bat_levels_noac = sharpsl_battery_levels_noac,
.bat_levels_acin = sharpsl_battery_levels_acin,
.status_high_acin = 188,
.status_low_acin = 178,
.status_high_noac = 185,
.status_low_noac = 175,
};
static struct platform_device *corgipm_device;
static int corgipm_init(void)
{
int ret;
if (!machine_is_corgi() && !machine_is_shepherd()
&& !machine_is_husky())
return -ENODEV;
corgipm_device = platform_device_alloc("sharpsl-pm", -1);
if (!corgipm_device)
return -ENOMEM;
if (!machine_is_corgi())
corgi_pm_machinfo.batfull_irq = 1;
corgipm_device->dev.platform_data = &corgi_pm_machinfo;
ret = platform_device_add(corgipm_device);
if (ret)
platform_device_put(corgipm_device);
return ret;
}
static void corgipm_exit(void)
{
platform_device_unregister(corgipm_device);
}
module_init(corgipm_init);
module_exit(corgipm_exit);

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arch/arm/mach-pxa/csb701.c
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// SPDX-License-Identifier: GPL-2.0
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/leds.h>
#include <asm/mach-types.h>
static struct gpio_keys_button csb701_buttons[] = {
{
.code = 0x7,
.gpio = 1,
.active_low = 1,
.desc = "SW2",
.type = EV_SW,
.wakeup = 1,
},
};
static struct gpio_keys_platform_data csb701_gpio_keys_data = {
.buttons = csb701_buttons,
.nbuttons = ARRAY_SIZE(csb701_buttons),
};
static struct gpio_led csb701_leds[] = {
{
.name = "csb701:yellow:heartbeat",
.default_trigger = "heartbeat",
.gpio = 11,
.active_low = 1,
},
};
static struct platform_device csb701_gpio_keys = {
.name = "gpio-keys",
.id = -1,
.dev.platform_data = &csb701_gpio_keys_data,
};
static struct gpio_led_platform_data csb701_leds_gpio_data = {
.leds = csb701_leds,
.num_leds = ARRAY_SIZE(csb701_leds),
};
static struct platform_device csb701_leds_gpio = {
.name = "leds-gpio",
.id = -1,
.dev.platform_data = &csb701_leds_gpio_data,
};
static struct platform_device *devices[] __initdata = {
&csb701_gpio_keys,
&csb701_leds_gpio,
};
static int __init csb701_init(void)
{
if (!machine_is_csb726())
return -ENODEV;
return platform_add_devices(devices, ARRAY_SIZE(devices));
}
module_init(csb701_init);

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arch/arm/mach-pxa/csb726.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Support for Cogent CSB726
*
* Copyright (c) 2008 Dmitry Eremin-Solenikov
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/gpio/machine.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/partitions.h>
#include <linux/sm501.h>
#include <linux/smsc911x.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "csb726.h"
#include "pxa27x.h"
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/asoc-pxa.h>
#include "smemc.h"
#include "generic.h"
#include "devices.h"
/*
* n/a: 2, 5, 6, 7, 8, 23, 24, 25, 26, 27, 87, 88, 89,
* nu: 58 -- 77, 90, 91, 93, 102, 105-108, 114-116,
* XXX: 21,
* XXX: 79 CS_3 for LAN9215 or PSKTSEL on R2, R3
* XXX: 33 CS_5 for LAN9215 on R1
*/
static unsigned long csb726_pin_config[] = {
GPIO78_nCS_2, /* EXP_CS */
GPIO79_nCS_3, /* SMSC9215 */
GPIO80_nCS_4, /* SM501 */
GPIO52_GPIO, /* #SMSC9251 int */
GPIO53_GPIO, /* SM501 int */
GPIO1_GPIO, /* GPIO0 */
GPIO11_GPIO, /* GPIO1 */
GPIO9_GPIO, /* GPIO2 */
GPIO10_GPIO, /* GPIO3 */
GPIO16_PWM0_OUT, /* or GPIO4 */
GPIO17_PWM1_OUT, /* or GPIO5 */
GPIO94_GPIO, /* GPIO6 */
GPIO95_GPIO, /* GPIO7 */
GPIO96_GPIO, /* GPIO8 */
GPIO97_GPIO, /* GPIO9 */
GPIO15_GPIO, /* EXP_IRQ */
GPIO18_RDY, /* EXP_WAIT */
GPIO0_GPIO, /* PWR_INT */
GPIO104_GPIO, /* PWR_OFF */
GPIO12_GPIO, /* touch irq */
GPIO13_SSP2_TXD,
GPIO14_SSP2_SFRM,
MFP_CFG_OUT(GPIO19, AF1, DRIVE_LOW),/* SSP2_SYSCLK */
GPIO22_SSP2_SCLK,
GPIO81_SSP3_TXD,
GPIO82_SSP3_RXD,
GPIO83_SSP3_SFRM,
GPIO84_SSP3_SCLK,
GPIO20_GPIO, /* SDIO int */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO100_GPIO, /* SD CD */
GPIO101_GPIO, /* SD WP */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO113_AC97_nRESET,
GPIO34_FFUART_RXD,
GPIO35_FFUART_CTS,
GPIO36_FFUART_DCD,
GPIO37_FFUART_DSR,
GPIO38_FFUART_RI,
GPIO39_FFUART_TXD,
GPIO40_FFUART_DTR,
GPIO41_FFUART_RTS,
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
GPIO46_STUART_RXD,
GPIO47_STUART_TXD,
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO54_nPCE_2,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16, /* maybe unused */
GPIO85_nPCE_1,
GPIO98_GPIO, /* CF IRQ */
GPIO99_GPIO, /* CF CD */
GPIO103_GPIO, /* Reset */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
};
static struct pxamci_platform_data csb726_mci = {
.detect_delay_ms = 500,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
/* FIXME setpower */
};
static struct gpiod_lookup_table csb726_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
/* Card detect on GPIO 100 */
GPIO_LOOKUP("gpio-pxa", CSB726_GPIO_MMC_DETECT,
"cd", GPIO_ACTIVE_LOW),
/* Write protect on GPIO 101 */
GPIO_LOOKUP("gpio-pxa", CSB726_GPIO_MMC_RO,
"wp", GPIO_ACTIVE_LOW),
{ },
},
};
static struct pxaohci_platform_data csb726_ohci_platform_data = {
.port_mode = PMM_NPS_MODE,
.flags = ENABLE_PORT1 | NO_OC_PROTECTION,
};
static struct mtd_partition csb726_flash_partitions[] = {
{
.name = "Bootloader",
.offset = 0,
.size = CSB726_FLASH_uMON,
.mask_flags = MTD_WRITEABLE /* force read-only */
},
{
.name = "root",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
}
};
static struct physmap_flash_data csb726_flash_data = {
.width = 2,
.parts = csb726_flash_partitions,
.nr_parts = ARRAY_SIZE(csb726_flash_partitions),
};
static struct resource csb726_flash_resources[] = {
{
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + CSB726_FLASH_SIZE - 1 ,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device csb726_flash = {
.name = "physmap-flash",
.dev = {
.platform_data = &csb726_flash_data,
},
.resource = csb726_flash_resources,
.num_resources = ARRAY_SIZE(csb726_flash_resources),
};
static struct resource csb726_sm501_resources[] = {
{
.start = PXA_CS4_PHYS,
.end = PXA_CS4_PHYS + SZ_8M - 1,
.flags = IORESOURCE_MEM,
.name = "sm501-localmem",
},
{
.start = PXA_CS4_PHYS + SZ_64M - SZ_2M,
.end = PXA_CS4_PHYS + SZ_64M - 1,
.flags = IORESOURCE_MEM,
.name = "sm501-regs",
},
{
.start = CSB726_IRQ_SM501,
.end = CSB726_IRQ_SM501,
.flags = IORESOURCE_IRQ,
},
};
static struct sm501_initdata csb726_sm501_initdata = {
/* .devices = SM501_USE_USB_HOST, */
.devices = SM501_USE_USB_HOST | SM501_USE_UART0 | SM501_USE_UART1,
};
static struct sm501_platdata csb726_sm501_platdata = {
.init = &csb726_sm501_initdata,
};
static struct platform_device csb726_sm501 = {
.name = "sm501",
.id = 0,
.num_resources = ARRAY_SIZE(csb726_sm501_resources),
.resource = csb726_sm501_resources,
.dev = {
.platform_data = &csb726_sm501_platdata,
},
};
static struct resource csb726_lan_resources[] = {
{
.start = PXA_CS3_PHYS,
.end = PXA_CS3_PHYS + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
{
.start = CSB726_IRQ_LAN,
.end = CSB726_IRQ_LAN,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
},
};
struct smsc911x_platform_config csb726_lan_config = {
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
.flags = SMSC911X_USE_32BIT,
.phy_interface = PHY_INTERFACE_MODE_MII,
};
static struct platform_device csb726_lan = {
.name = "smsc911x",
.id = -1,
.num_resources = ARRAY_SIZE(csb726_lan_resources),
.resource = csb726_lan_resources,
.dev = {
.platform_data = &csb726_lan_config,
},
};
static struct platform_device *devices[] __initdata = {
&csb726_flash,
&csb726_sm501,
&csb726_lan,
};
static void __init csb726_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(csb726_pin_config));
/* __raw_writel(0x7ffc3ffc, MSC1); *//* LAN9215/EXP_CS */
/* __raw_writel(0x06697ff4, MSC2); *//* none/SM501 */
__raw_writel((__raw_readl(MSC2) & ~0xffff) | 0x7ff4, MSC2); /* SM501 */
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_i2c_info(NULL);
pxa27x_set_i2c_power_info(NULL);
gpiod_add_lookup_table(&csb726_mci_gpio_table);
pxa_set_mci_info(&csb726_mci);
pxa_set_ohci_info(&csb726_ohci_platform_data);
pxa_set_ac97_info(NULL);
platform_add_devices(devices, ARRAY_SIZE(devices));
}
MACHINE_START(CSB726, "Cogent CSB726")
.atag_offset = 0x100,
.map_io = pxa27x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_machine = csb726_init,
.init_time = pxa_timer_init,
.restart = pxa_restart,
MACHINE_END

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arch/arm/mach-pxa/csb726.h
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@ -1,24 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Support for Cogent CSB726
*
* Copyright (c) 2008 Dmitry Baryshkov
*/
#ifndef CSB726_H
#define CSB726_H
#include "irqs.h" /* PXA_GPIO_TO_IRQ */
#define CSB726_GPIO_IRQ_LAN 52
#define CSB726_GPIO_IRQ_SM501 53
#define CSB726_GPIO_MMC_DETECT 100
#define CSB726_GPIO_MMC_RO 101
#define CSB726_FLASH_SIZE (64 * 1024 * 1024)
#define CSB726_FLASH_uMON (8 * 1024 * 1024)
#define CSB726_IRQ_LAN PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_LAN)
#define CSB726_IRQ_SM501 PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_SM501)
#endif

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arch/arm/mach-pxa/e740-pcmcia.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Toshiba e740 PCMCIA specific routines.
*
* (c) 2004 Ian Molton <spyro@f2s.com>
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include "eseries-gpio.h"
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <pcmcia/soc_common.h>
static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
{
if (skt->nr == 0) {
skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD0;
skt->stat[SOC_STAT_CD].name = "CF card detect";
skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY0;
skt->stat[SOC_STAT_RDY].name = "CF ready";
} else {
skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD1;
skt->stat[SOC_STAT_CD].name = "Wifi switch";
skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY1;
skt->stat[SOC_STAT_RDY].name = "Wifi ready";
}
return 0;
}
static void e740_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
struct pcmcia_state *state)
{
state->vs_3v = 1;
state->vs_Xv = 0;
}
static int e740_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
const socket_state_t *state)
{
if (state->flags & SS_RESET) {
if (skt->nr == 0)
gpio_set_value(GPIO_E740_PCMCIA_RST0, 1);
else
gpio_set_value(GPIO_E740_PCMCIA_RST1, 1);
} else {
if (skt->nr == 0)
gpio_set_value(GPIO_E740_PCMCIA_RST0, 0);
else
gpio_set_value(GPIO_E740_PCMCIA_RST1, 0);
}
switch (state->Vcc) {
case 0: /* Socket off */
if (skt->nr == 0)
gpio_set_value(GPIO_E740_PCMCIA_PWR0, 0);
else
gpio_set_value(GPIO_E740_PCMCIA_PWR1, 1);
break;
case 50:
case 33: /* socket on */
if (skt->nr == 0)
gpio_set_value(GPIO_E740_PCMCIA_PWR0, 1);
else
gpio_set_value(GPIO_E740_PCMCIA_PWR1, 0);
break;
default:
printk(KERN_ERR "e740_cs: Unsupported Vcc: %d\n", state->Vcc);
}
return 0;
}
static struct pcmcia_low_level e740_pcmcia_ops = {
.owner = THIS_MODULE,
.hw_init = e740_pcmcia_hw_init,
.socket_state = e740_pcmcia_socket_state,
.configure_socket = e740_pcmcia_configure_socket,
.nr = 2,
};
static struct platform_device *e740_pcmcia_device;
static int __init e740_pcmcia_init(void)
{
int ret;
if (!machine_is_e740())
return -ENODEV;
e740_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
if (!e740_pcmcia_device)
return -ENOMEM;
ret = platform_device_add_data(e740_pcmcia_device, &e740_pcmcia_ops,
sizeof(e740_pcmcia_ops));
if (!ret)
ret = platform_device_add(e740_pcmcia_device);
if (ret)
platform_device_put(e740_pcmcia_device);
return ret;
}
static void __exit e740_pcmcia_exit(void)
{
platform_device_unregister(e740_pcmcia_device);
}
module_init(e740_pcmcia_init);
module_exit(e740_pcmcia_exit);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
MODULE_ALIAS("platform:pxa2xx-pcmcia");
MODULE_DESCRIPTION("e740 PCMCIA platform support");

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arch/arm/mach-pxa/eseries-gpio.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* eseries-gpio.h
*
* Copyright (C) Ian Molton <spyro@f2s.com>
*/
/* e-series power button */
#define GPIO_ESERIES_POWERBTN 0
/* UDC GPIO definitions */
#define GPIO_E7XX_USB_DISC 13
#define GPIO_E7XX_USB_PULLUP 3
#define GPIO_E800_USB_DISC 4
#define GPIO_E800_USB_PULLUP 84
/* e740 PCMCIA GPIO definitions */
/* Note: PWR1 seems to be inverted */
#define GPIO_E740_PCMCIA_CD0 8
#define GPIO_E740_PCMCIA_CD1 44
#define GPIO_E740_PCMCIA_RDY0 11
#define GPIO_E740_PCMCIA_RDY1 6
#define GPIO_E740_PCMCIA_RST0 27
#define GPIO_E740_PCMCIA_RST1 24
#define GPIO_E740_PCMCIA_PWR0 20
#define GPIO_E740_PCMCIA_PWR1 23
/* e750 PCMCIA GPIO definitions */
#define GPIO_E750_PCMCIA_CD0 8
#define GPIO_E750_PCMCIA_RDY0 12
#define GPIO_E750_PCMCIA_RST0 27
#define GPIO_E750_PCMCIA_PWR0 20
/* e800 PCMCIA GPIO definitions */
#define GPIO_E800_PCMCIA_RST0 69
#define GPIO_E800_PCMCIA_RST1 72
#define GPIO_E800_PCMCIA_PWR0 20
#define GPIO_E800_PCMCIA_PWR1 73
/* e7xx IrDA power control */
#define GPIO_E7XX_IR_OFF 38
/* e740 audio control GPIOs */
#define GPIO_E740_WM9705_nAVDD2 16
#define GPIO_E740_MIC_ON 40
#define GPIO_E740_AMP_ON 41
/* e750 audio control GPIOs */
#define GPIO_E750_HP_AMP_OFF 4
#define GPIO_E750_SPK_AMP_OFF 7
#define GPIO_E750_HP_DETECT 37
/* e800 audio control GPIOs */
#define GPIO_E800_HP_DETECT 81
#define GPIO_E800_HP_AMP_OFF 82
#define GPIO_E800_SPK_AMP_ON 83
/* ASIC related GPIOs */
#define GPIO_ESERIES_TMIO_IRQ 5
#define GPIO_ESERIES_TMIO_PCLR 19
#define GPIO_ESERIES_TMIO_SUSPEND 45
#define GPIO_E800_ANGELX_IRQ 8

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arch/arm/mach-pxa/eseries-irq.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* eseries-irq.h
*
* Copyright (C) Ian Molton <spyro@f2s.com>
*/
#define ANGELX_IRQ_BASE (IRQ_BOARD_START+8)
#define IRQ_ANGELX(n) (ANGELX_IRQ_BASE + (n))
#define ANGELX_RDY0_IRQ IRQ_ANGELX(0)
#define ANGELX_ST0_IRQ IRQ_ANGELX(1)
#define ANGELX_CD0_IRQ IRQ_ANGELX(2)
#define ANGELX_RDY1_IRQ IRQ_ANGELX(3)
#define ANGELX_ST1_IRQ IRQ_ANGELX(4)
#define ANGELX_CD1_IRQ IRQ_ANGELX(5)
#define TMIO_IRQ_BASE (IRQ_BOARD_START+0)
#define IRQ_TMIO(n) (TMIO_IRQ_BASE + (n))
#define TMIO_SD_IRQ IRQ_TMIO(1)
#define TMIO_USB_IRQ IRQ_TMIO(2)
#define ESERIES_NR_IRQS (IRQ_BOARD_START + 16)

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arch/arm/mach-pxa/eseries.c
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1254
arch/arm/mach-pxa/ezx.c
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arch/arm/mach-pxa/h5000.c
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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Hardware definitions for HP iPAQ h5xxx Handheld Computers
*
* Copyright 2000-2003 Hewlett-Packard Company.
* Copyright 2002 Jamey Hicks <jamey.hicks@hp.com>
* Copyright 2004-2005 Phil Blundell <pb@handhelds.org>
* Copyright 2007-2008 Anton Vorontsov <cbouatmailru@gmail.com>
*
* COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
* AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
* FITNESS FOR ANY PARTICULAR PURPOSE.
*
* Author: Jamey Hicks.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/irq.h>
#include "pxa25x.h"
#include "h5000.h"
#include "udc.h"
#include "smemc.h"
#include "generic.h"
/*
* Flash
*/
static struct mtd_partition h5000_flash0_partitions[] = {
{
.name = "bootldr",
.size = 0x00040000,
.offset = 0,
.mask_flags = MTD_WRITEABLE,
},
{
.name = "root",
.size = MTDPART_SIZ_FULL,
.offset = MTDPART_OFS_APPEND,
},
};
static struct mtd_partition h5000_flash1_partitions[] = {
{
.name = "second root",
.size = SZ_16M - 0x00040000,
.offset = 0,
},
{
.name = "asset",
.size = MTDPART_SIZ_FULL,
.offset = MTDPART_OFS_APPEND,
.mask_flags = MTD_WRITEABLE,
},
};
static struct physmap_flash_data h5000_flash0_data = {
.width = 4,
.parts = h5000_flash0_partitions,
.nr_parts = ARRAY_SIZE(h5000_flash0_partitions),
};
static struct physmap_flash_data h5000_flash1_data = {
.width = 4,
.parts = h5000_flash1_partitions,
.nr_parts = ARRAY_SIZE(h5000_flash1_partitions),
};
static struct resource h5000_flash0_resources = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
};
static struct resource h5000_flash1_resources = {
.start = PXA_CS0_PHYS + SZ_32M,
.end = PXA_CS0_PHYS + SZ_32M + SZ_16M - 1,
.flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
};
static struct platform_device h5000_flash[] = {
{
.name = "physmap-flash",
.id = 0,
.resource = &h5000_flash0_resources,
.num_resources = 1,
.dev = {
.platform_data = &h5000_flash0_data,
},
},
{
.name = "physmap-flash",
.id = 1,
.resource = &h5000_flash1_resources,
.num_resources = 1,
.dev = {
.platform_data = &h5000_flash1_data,
},
},
};
/*
* USB Device Controller
*/
static struct pxa2xx_udc_mach_info h5000_udc_mach_info __initdata = {
.gpio_pullup = H5000_GPIO_USB_PULLUP,
};
/*
* GPIO setup
*/
static unsigned long h5000_pin_config[] __initdata = {
/* Crystal and Clock Signals */
GPIO12_32KHz,
/* SDRAM and Static Memory I/O Signals */
GPIO15_nCS_1,
GPIO78_nCS_2,
GPIO79_nCS_3,
GPIO80_nCS_4,
/* FFUART */
GPIO34_FFUART_RXD,
GPIO35_FFUART_CTS,
GPIO36_FFUART_DCD,
GPIO37_FFUART_DSR,
GPIO38_FFUART_RI,
GPIO39_FFUART_TXD,
GPIO40_FFUART_DTR,
GPIO41_FFUART_RTS,
/* BTUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
/* SSP1 */
GPIO23_SSP1_SCLK,
GPIO25_SSP1_TXD,
GPIO26_SSP1_RXD,
/* I2S */
GPIO28_I2S_BITCLK_OUT,
GPIO29_I2S_SDATA_IN,
GPIO30_I2S_SDATA_OUT,
GPIO31_I2S_SYNC,
GPIO32_I2S_SYSCLK,
};
/*
* Localbus setup:
* CS0: Flash;
* CS1: MediaQ chip, select 16-bit bus and vlio;
* CS5: SAMCOP.
*/
static void fix_msc(void)
{
__raw_writel(0x129c24f2, MSC0);
__raw_writel(0x7ff424fa, MSC1);
__raw_writel(0x7ff47ff4, MSC2);
__raw_writel(__raw_readl(MDREFR) | 0x02080000, MDREFR);
}
/*
* Platform devices
*/
static struct platform_device *devices[] __initdata = {
&h5000_flash[0],
&h5000_flash[1],
};
static void __init h5000_init(void)
{
fix_msc();
pxa2xx_mfp_config(ARRAY_AND_SIZE(h5000_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_udc_info(&h5000_udc_mach_info);
platform_add_devices(ARRAY_AND_SIZE(devices));
}
MACHINE_START(H5400, "HP iPAQ H5000")
.atag_offset = 0x100,
.map_io = pxa25x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = h5000_init,
.restart = pxa_restart,
MACHINE_END

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/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Hardware definitions for HP iPAQ h5xxx Handheld Computers
*
* Copyright(20)02 Hewlett-Packard Company.
*
* COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
* AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
* FITNESS FOR ANY PARTICULAR PURPOSE.
*
* Author: Jamey Hicks
*/
#ifndef __ASM_ARCH_H5000_H
#define __ASM_ARCH_H5000_H
#include "mfp-pxa25x.h"
/*
* CPU GPIOs
*/
#define H5000_GPIO_POWER_BUTTON (0)
#define H5000_GPIO_RESET_BUTTON_N (1)
#define H5000_GPIO_OPT_INT (2)
#define H5000_GPIO_BACKUP_POWER (3)
#define H5000_GPIO_ACTION_BUTTON (4)
#define H5000_GPIO_COM_DCD_SOMETHING (5) /* what is this really ? */
/* 6 not connected */
#define H5000_GPIO_RESET_BUTTON_AGAIN_N (7) /* connected to gpio 1 as well */
/* 8 not connected */
#define H5000_GPIO_RSO_N (9) /* reset output from max1702 which regulates 3.3 and 2.5 */
#define H5000_GPIO_ASIC_INT_N (10) /* from companion asic */
#define H5000_GPIO_BT_ENV_0 (11) /* to LMX9814, set to 1 according to regdump */
/*(12) not connected */
#define H5000_GPIO_BT_ENV_1 (13) /* to LMX9814, set to 1 according to regdump */
#define H5000_GPIO_BT_WU (14) /* from LMX9814, Defined as HOST_WAKEUP in the LMX9820 data sheet */
/*(15) is CS1# */
/*(16) not connected */
/*(17) not connected */
/*(18) is pcmcia ready */
/*(19) is dreq1 */
/*(20) is dreq0 */
#define H5000_GPIO_OE_RD_NWR (21) /* output enable on rd/nwr signal to companion asic */
/*(22) is not connected */
#define H5000_GPIO_OPT_SPI_CLK (23) /* to extension pack */
#define H5000_GPIO_OPT_SPI_CS_N (24) /* to extension pack */
#define H5000_GPIO_OPT_SPI_DOUT (25) /* to extension pack */
#define H5000_GPIO_OPT_SPI_DIN (26) /* to extension pack */
/*(27) not connected */
#define H5000_GPIO_I2S_BITCLK (28) /* connected to AC97 codec */
#define H5000_GPIO_I2S_DATAOUT (29) /* connected to AC97 codec */
#define H5000_GPIO_I2S_DATAIN (30) /* connected to AC97 codec */
#define H5000_GPIO_I2S_LRCLK (31) /* connected to AC97 codec */
#define H5000_GPIO_I2S_SYSCLK (32) /* connected to AC97 codec */
/*(33) is CS5# */
#define H5000_GPIO_COM_RXD (34) /* connected to cradle/cable connector */
#define H5000_GPIO_COM_CTS (35) /* connected to cradle/cable connector */
#define H5000_GPIO_COM_DCD (36) /* connected to cradle/cable connector */
#define H5000_GPIO_COM_DSR (37) /* connected to cradle/cable connector */
#define H5000_GPIO_COM_RI (38) /* connected to cradle/cable connector */
#define H5000_GPIO_COM_TXD (39) /* connected to cradle/cable connector */
#define H5000_GPIO_COM_DTR (40) /* connected to cradle/cable connector */
#define H5000_GPIO_COM_RTS (41) /* connected to cradle/cable connector */
#define H5000_GPIO_BT_RXD (42) /* connected to BT (LMX9814) */
#define H5000_GPIO_BT_TXD (43) /* connected to BT (LMX9814) */
#define H5000_GPIO_BT_CTS (44) /* connected to BT (LMX9814) */
#define H5000_GPIO_BT_RTS (45) /* connected to BT (LMX9814) */
#define H5000_GPIO_IRDA_RXD (46)
#define H5000_GPIO_IRDA_TXD (47)
#define H5000_GPIO_POE_N (48) /* used for pcmcia */
#define H5000_GPIO_PWE_N (49) /* used for pcmcia */
#define H5000_GPIO_PIOR_N (50) /* used for pcmcia */
#define H5000_GPIO_PIOW_N (51) /* used for pcmcia */
#define H5000_GPIO_PCE1_N (52) /* used for pcmcia */
#define H5000_GPIO_PCE2_N (53) /* used for pcmcia */
#define H5000_GPIO_PSKTSEL (54) /* used for pcmcia */
#define H5000_GPIO_PREG_N (55) /* used for pcmcia */
#define H5000_GPIO_PWAIT_N (56) /* used for pcmcia */
#define H5000_GPIO_IOIS16_N (57) /* used for pcmcia */
#define H5000_GPIO_IRDA_SD (58) /* to hsdl3002 sd */
/*(59) not connected */
#define H5000_GPIO_POWER_SD_N (60) /* controls power to SD */
#define H5000_GPIO_POWER_RS232_N (61) /* inverted FORCEON to rs232 transceiver */
#define H5000_GPIO_POWER_ACCEL_N (62) /* controls power to accel */
/*(63) is not connected */
#define H5000_GPIO_OPT_NVRAM (64) /* controls power to expansion pack */
#define H5000_GPIO_CHG_EN (65) /* to sc801 en */
#define H5000_GPIO_USB_PULLUP (66) /* USB d+ pullup via 1.5K resistor */
#define H5000_GPIO_BT_2V8_N (67) /* 2.8V used by bluetooth */
#define H5000_GPIO_EXT_CHG_RATE (68) /* enables external charging rate */
/*(69) is not connected */
#define H5000_GPIO_CIR_RESET (70) /* consumer IR reset */
#define H5000_GPIO_POWER_LIGHT_SENSOR_N (71)
#define H5000_GPIO_BT_M_RESET (72)
#define H5000_GPIO_STD_CHG_RATE (73)
#define H5000_GPIO_SD_WP_N (74)
#define H5000_GPIO_MOTOR_ON_N (75) /* external pullup on this */
#define H5000_GPIO_HEADPHONE_DETECT (76)
#define H5000_GPIO_USB_CHG_RATE (77) /* select rate for charging via usb */
/*(78) is CS2# */
/*(79) is CS3# */
/*(80) is CS4# */
#endif /* __ASM_ARCH_H5000_H */

166
arch/arm/mach-pxa/himalaya.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/himalaya.c
*
* Hardware definitions for the HTC Himalaya
*
* Based on 2.6.21-hh20's himalaya.c and himalaya_lcd.c
*
* Copyright (c) 2008 Zbynek Michl <Zbynek.Michl@seznam.cz>
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/fb.h>
#include <linux/platform_device.h>
#include <video/w100fb.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "pxa25x.h"
#include "generic.h"
/* ---------------------- Himalaya LCD definitions -------------------- */
static struct w100_gen_regs himalaya_lcd_regs = {
.lcd_format = 0x00000003,
.lcdd_cntl1 = 0x00000000,
.lcdd_cntl2 = 0x0003ffff,
.genlcd_cntl1 = 0x00fff003,
.genlcd_cntl2 = 0x00000003,
.genlcd_cntl3 = 0x000102aa,
};
static struct w100_mode himalaya4_lcd_mode = {
.xres = 240,
.yres = 320,
.left_margin = 0,
.right_margin = 31,
.upper_margin = 15,
.lower_margin = 0,
.crtc_ss = 0x80150014,
.crtc_ls = 0xa0fb00f7,
.crtc_gs = 0xc0080007,
.crtc_vpos_gs = 0x00080007,
.crtc_rev = 0x0000000a,
.crtc_dclk = 0x81700030,
.crtc_gclk = 0x8015010f,
.crtc_goe = 0x00000000,
.pll_freq = 80,
.pixclk_divider = 15,
.pixclk_divider_rotated = 15,
.pixclk_src = CLK_SRC_PLL,
.sysclk_divider = 0,
.sysclk_src = CLK_SRC_PLL,
};
static struct w100_mode himalaya6_lcd_mode = {
.xres = 240,
.yres = 320,
.left_margin = 9,
.right_margin = 8,
.upper_margin = 5,
.lower_margin = 4,
.crtc_ss = 0x80150014,
.crtc_ls = 0xa0fb00f7,
.crtc_gs = 0xc0080007,
.crtc_vpos_gs = 0x00080007,
.crtc_rev = 0x0000000a,
.crtc_dclk = 0xa1700030,
.crtc_gclk = 0x8015010f,
.crtc_goe = 0x00000000,
.pll_freq = 95,
.pixclk_divider = 0xb,
.pixclk_divider_rotated = 4,
.pixclk_src = CLK_SRC_PLL,
.sysclk_divider = 1,
.sysclk_src = CLK_SRC_PLL,
};
static struct w100_gpio_regs himalaya_w100_gpio_info = {
.init_data1 = 0xffff0000, /* GPIO_DATA */
.gpio_dir1 = 0x00000000, /* GPIO_CNTL1 */
.gpio_oe1 = 0x003c0000, /* GPIO_CNTL2 */
.init_data2 = 0x00000000, /* GPIO_DATA2 */
.gpio_dir2 = 0x00000000, /* GPIO_CNTL3 */
.gpio_oe2 = 0x00000000, /* GPIO_CNTL4 */
};
static struct w100fb_mach_info himalaya_fb_info = {
.num_modes = 1,
.regs = &himalaya_lcd_regs,
.gpio = &himalaya_w100_gpio_info,
.xtal_freq = 16000000,
};
static struct resource himalaya_fb_resources[] = {
[0] = {
.start = 0x08000000,
.end = 0x08ffffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device himalaya_fb_device = {
.name = "w100fb",
.id = -1,
.dev = {
.platform_data = &himalaya_fb_info,
},
.num_resources = ARRAY_SIZE(himalaya_fb_resources),
.resource = himalaya_fb_resources,
};
/* ----------------------------------------------------------------------- */
static struct platform_device *devices[] __initdata = {
&himalaya_fb_device,
};
static void __init himalaya_lcd_init(void)
{
int himalaya_boardid;
himalaya_boardid = 0x4; /* hardcoded (detection needs ASIC3 functions) */
printk(KERN_INFO "himalaya LCD Driver init. boardid=%d\n",
himalaya_boardid);
switch (himalaya_boardid) {
case 0x4:
himalaya_fb_info.modelist = &himalaya4_lcd_mode;
break;
case 0x6:
himalaya_fb_info.modelist = &himalaya6_lcd_mode;
break;
default:
printk(KERN_INFO "himalaya lcd_init: unknown boardid=%d. Using 0x4\n",
himalaya_boardid);
himalaya_fb_info.modelist = &himalaya4_lcd_mode;
}
}
static void __init himalaya_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
himalaya_lcd_init();
platform_add_devices(devices, ARRAY_SIZE(devices));
}
MACHINE_START(HIMALAYA, "HTC Himalaya")
.atag_offset = 0x100,
.map_io = pxa25x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_machine = himalaya_init,
.init_time = pxa_timer_init,
.restart = pxa_restart,
MACHINE_END

118
arch/arm/mach-pxa/hx4700-pcmcia.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Paul Parsons <lost.distance@yahoo.com>
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/irq.h>
#include <asm/mach-types.h>
#include "hx4700.h"
#include <pcmcia/soc_common.h>
static struct gpio gpios[] = {
{ GPIO114_HX4700_CF_RESET, GPIOF_OUT_INIT_LOW, "CF reset" },
{ EGPIO4_CF_3V3_ON, GPIOF_OUT_INIT_LOW, "CF 3.3V enable" },
};
static int hx4700_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
{
int ret;
ret = gpio_request_array(gpios, ARRAY_SIZE(gpios));
if (ret)
goto out;
/*
* IRQ type must be set before soc_pcmcia_hw_init() calls request_irq().
* The asic3 default IRQ type is level trigger low level detect, exactly
* the the signal present on GPIOD4_CF_nCD when a CF card is inserted.
* If the IRQ type is not changed, the asic3 interrupt handler will loop
* repeatedly because it is unable to clear the level trigger interrupt.
*/
irq_set_irq_type(gpio_to_irq(GPIOD4_CF_nCD), IRQ_TYPE_EDGE_BOTH);
skt->stat[SOC_STAT_CD].gpio = GPIOD4_CF_nCD;
skt->stat[SOC_STAT_CD].name = "PCMCIA CD";
skt->stat[SOC_STAT_RDY].gpio = GPIO60_HX4700_CF_RNB;
skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready";
out:
return ret;
}
static void hx4700_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
{
gpio_free_array(gpios, ARRAY_SIZE(gpios));
}
static void hx4700_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
struct pcmcia_state *state)
{
state->vs_3v = 1;
state->vs_Xv = 0;
}
static int hx4700_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
const socket_state_t *state)
{
switch (state->Vcc) {
case 0:
gpio_set_value(EGPIO4_CF_3V3_ON, 0);
break;
case 33:
gpio_set_value(EGPIO4_CF_3V3_ON, 1);
break;
default:
printk(KERN_ERR "pcmcia: Unsupported Vcc: %d\n", state->Vcc);
return -EINVAL;
}
gpio_set_value(GPIO114_HX4700_CF_RESET, (state->flags & SS_RESET) != 0);
return 0;
}
static struct pcmcia_low_level hx4700_pcmcia_ops = {
.owner = THIS_MODULE,
.nr = 1,
.hw_init = hx4700_pcmcia_hw_init,
.hw_shutdown = hx4700_pcmcia_hw_shutdown,
.socket_state = hx4700_pcmcia_socket_state,
.configure_socket = hx4700_pcmcia_configure_socket,
};
static struct platform_device *hx4700_pcmcia_device;
static int __init hx4700_pcmcia_init(void)
{
struct platform_device *pdev;
if (!machine_is_h4700())
return -ENODEV;
pdev = platform_device_register_data(NULL, "pxa2xx-pcmcia", -1,
&hx4700_pcmcia_ops, sizeof(hx4700_pcmcia_ops));
if (IS_ERR(pdev))
return PTR_ERR(pdev);
hx4700_pcmcia_device = pdev;
return 0;
}
static void __exit hx4700_pcmcia_exit(void)
{
platform_device_unregister(hx4700_pcmcia_device);
}
module_init(hx4700_pcmcia_init);
module_exit(hx4700_pcmcia_exit);
MODULE_AUTHOR("Paul Parsons <lost.distance@yahoo.com>");
MODULE_DESCRIPTION("HP iPAQ hx4700 PCMCIA driver");
MODULE_LICENSE("GPL");

942
arch/arm/mach-pxa/hx4700.c
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@ -1,942 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Support for HP iPAQ hx4700 PDAs.
*
* Copyright (c) 2008-2009 Philipp Zabel
*
* Based on code:
* Copyright (c) 2004 Hewlett-Packard Company.
* Copyright (c) 2005 SDG Systems, LLC
* Copyright (c) 2006 Anton Vorontsov <cbou@mail.ru>
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/fb.h>
#include <linux/gpio/machine.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/input/navpoint.h>
#include <linux/lcd.h>
#include <linux/mfd/asic3.h>
#include <linux/mtd/physmap.h>
#include <linux/pda_power.h>
#include <linux/platform_data/gpio-htc-egpio.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/gpio-regulator.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/max1586.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/spi.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "pxa27x.h"
#include "addr-map.h"
#include "hx4700.h"
#include <linux/platform_data/irda-pxaficp.h>
#include <sound/ak4641.h>
#include <video/platform_lcd.h>
#include <video/w100fb.h>
#include "devices.h"
#include "generic.h"
#include "udc.h"
/* Physical address space information */
#define ATI_W3220_PHYS PXA_CS2_PHYS /* ATI Imageon 3220 Graphics */
#define ASIC3_PHYS PXA_CS3_PHYS
#define ASIC3_SD_PHYS (PXA_CS3_PHYS + 0x02000000)
static unsigned long hx4700_pin_config[] __initdata = {
/* SDRAM and Static Memory I/O Signals */
GPIO20_nSDCS_2,
GPIO21_nSDCS_3,
GPIO15_nCS_1,
GPIO78_nCS_2, /* W3220 */
GPIO79_nCS_3, /* ASIC3 */
GPIO80_nCS_4,
GPIO33_nCS_5, /* EGPIO, WLAN */
/* PC CARD */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO54_nPCE_2,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
GPIO85_nPCE_1,
GPIO104_PSKTSEL,
/* I2C */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
/* FFUART (RS-232) */
GPIO34_FFUART_RXD,
GPIO35_FFUART_CTS,
GPIO36_FFUART_DCD,
GPIO37_FFUART_DSR,
GPIO38_FFUART_RI,
GPIO39_FFUART_TXD,
GPIO40_FFUART_DTR,
GPIO41_FFUART_RTS,
/* BTUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD_LPM_LOW,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS_LPM_LOW,
/* STUART (IRDA) */
GPIO46_STUART_RXD,
GPIO47_STUART_TXD,
/* PWM 1 (Backlight) */
GPIO17_PWM1_OUT,
/* I2S */
GPIO28_I2S_BITCLK_OUT,
GPIO29_I2S_SDATA_IN,
GPIO30_I2S_SDATA_OUT,
GPIO31_I2S_SYNC,
GPIO113_I2S_SYSCLK,
/* SSP 1 (NavPoint) */
GPIO23_SSP1_SCLK_IN,
GPIO24_SSP1_SFRM,
GPIO25_SSP1_TXD,
GPIO26_SSP1_RXD,
/* SSP 2 (TSC2046) */
GPIO19_SSP2_SCLK,
GPIO86_SSP2_RXD,
GPIO87_SSP2_TXD,
GPIO88_GPIO | MFP_LPM_DRIVE_HIGH, /* TSC2046_CS */
/* BQ24022 Regulator */
GPIO72_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_nCHARGE_EN */
GPIO96_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_ISET2 */
/* HX4700 specific input GPIOs */
GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */
GPIO13_GPIO, /* W3220_IRQ */
GPIO14_GPIO, /* nWLAN_IRQ */
/* HX4700 specific output GPIOs */
GPIO61_GPIO | MFP_LPM_DRIVE_HIGH, /* W3220_nRESET */
GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* ASIC3_nRESET */
GPIO81_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_GP_nRESET */
GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_HW_nRESET */
GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */
GPIO10_GPIO, /* GSM_IRQ */
GPIO13_GPIO, /* CPLD_IRQ */
GPIO107_GPIO, /* DS1WM_IRQ */
GPIO108_GPIO, /* GSM_READY */
GPIO58_GPIO, /* TSC2046_nPENIRQ */
GPIO66_GPIO, /* nSDIO_IRQ */
};
/*
* IRDA
*/
static struct pxaficp_platform_data ficp_info = {
.gpio_pwdown = GPIO105_HX4700_nIR_ON,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/*
* GPIO Keys
*/
#define INIT_KEY(_code, _gpio, _active_low, _desc) \
{ \
.code = KEY_##_code, \
.gpio = _gpio, \
.active_low = _active_low, \
.desc = _desc, \
.type = EV_KEY, \
.wakeup = 1, \
}
static struct gpio_keys_button gpio_keys_buttons[] = {
INIT_KEY(POWER, GPIO0_HX4700_nKEY_POWER, 1, "Power button"),
INIT_KEY(MAIL, GPIO94_HX4700_KEY_MAIL, 0, "Mail button"),
INIT_KEY(ADDRESSBOOK, GPIO99_HX4700_KEY_CONTACTS,0, "Contacts button"),
INIT_KEY(RECORD, GPIOD6_nKEY_RECORD, 1, "Record button"),
INIT_KEY(CALENDAR, GPIOD1_nKEY_CALENDAR, 1, "Calendar button"),
INIT_KEY(HOMEPAGE, GPIOD3_nKEY_HOME, 1, "Home button"),
};
static struct gpio_keys_platform_data gpio_keys_data = {
.buttons = gpio_keys_buttons,
.nbuttons = ARRAY_SIZE(gpio_keys_buttons),
};
static struct platform_device gpio_keys = {
.name = "gpio-keys",
.dev = {
.platform_data = &gpio_keys_data,
},
.id = -1,
};
/*
* Synaptics NavPoint connected to SSP1
*/
static struct navpoint_platform_data navpoint_platform_data = {
.port = 1,
.gpio = GPIO102_HX4700_SYNAPTICS_POWER_ON,
};
static struct platform_device navpoint = {
.name = "navpoint",
.id = -1,
.dev = {
.platform_data = &navpoint_platform_data,
},
};
/*
* ASIC3
*/
static u16 asic3_gpio_config[] = {
/* ASIC3 GPIO banks A and B along with some of C and D
implement the buffering for the CF slot. */
ASIC3_CONFIG_GPIO(0, 1, 1, 0),
ASIC3_CONFIG_GPIO(1, 1, 1, 0),
ASIC3_CONFIG_GPIO(2, 1, 1, 0),
ASIC3_CONFIG_GPIO(3, 1, 1, 0),
ASIC3_CONFIG_GPIO(4, 1, 1, 0),
ASIC3_CONFIG_GPIO(5, 1, 1, 0),
ASIC3_CONFIG_GPIO(6, 1, 1, 0),
ASIC3_CONFIG_GPIO(7, 1, 1, 0),
ASIC3_CONFIG_GPIO(8, 1, 1, 0),
ASIC3_CONFIG_GPIO(9, 1, 1, 0),
ASIC3_CONFIG_GPIO(10, 1, 1, 0),
ASIC3_CONFIG_GPIO(11, 1, 1, 0),
ASIC3_CONFIG_GPIO(12, 1, 1, 0),
ASIC3_CONFIG_GPIO(13, 1, 1, 0),
ASIC3_CONFIG_GPIO(14, 1, 1, 0),
ASIC3_CONFIG_GPIO(15, 1, 1, 0),
ASIC3_CONFIG_GPIO(16, 1, 1, 0),
ASIC3_CONFIG_GPIO(17, 1, 1, 0),
ASIC3_CONFIG_GPIO(18, 1, 1, 0),
ASIC3_CONFIG_GPIO(19, 1, 1, 0),
ASIC3_CONFIG_GPIO(20, 1, 1, 0),
ASIC3_CONFIG_GPIO(21, 1, 1, 0),
ASIC3_CONFIG_GPIO(22, 1, 1, 0),
ASIC3_CONFIG_GPIO(23, 1, 1, 0),
ASIC3_CONFIG_GPIO(24, 1, 1, 0),
ASIC3_CONFIG_GPIO(25, 1, 1, 0),
ASIC3_CONFIG_GPIO(26, 1, 1, 0),
ASIC3_CONFIG_GPIO(27, 1, 1, 0),
ASIC3_CONFIG_GPIO(28, 1, 1, 0),
ASIC3_CONFIG_GPIO(29, 1, 1, 0),
ASIC3_CONFIG_GPIO(30, 1, 1, 0),
ASIC3_CONFIG_GPIO(31, 1, 1, 0),
/* GPIOC - CF, LEDs, SD */
ASIC3_GPIOC0_LED0, /* red */
ASIC3_GPIOC1_LED1, /* green */
ASIC3_GPIOC2_LED2, /* blue */
ASIC3_GPIOC5_nCIOW,
ASIC3_GPIOC6_nCIOR,
ASIC3_GPIOC7_nPCE_1,
ASIC3_GPIOC8_nPCE_2,
ASIC3_GPIOC9_nPOE,
ASIC3_GPIOC10_nPWE,
ASIC3_GPIOC11_PSKTSEL,
ASIC3_GPIOC12_nPREG,
ASIC3_GPIOC13_nPWAIT,
ASIC3_GPIOC14_nPIOIS16,
ASIC3_GPIOC15_nPIOR,
/* GPIOD: input GPIOs, CF */
ASIC3_GPIOD4_CF_nCD,
ASIC3_GPIOD11_nCIOIS16,
ASIC3_GPIOD12_nCWAIT,
ASIC3_GPIOD15_nPIOW,
};
static struct asic3_led asic3_leds[ASIC3_NUM_LEDS] = {
[0] = {
.name = "hx4700:amber",
.default_trigger = "ds2760-battery.0-charging-blink-full-solid",
},
[1] = {
.name = "hx4700:green",
.default_trigger = "unused",
},
[2] = {
.name = "hx4700:blue",
.default_trigger = "hx4700-radio",
},
};
static struct resource asic3_resources[] = {
/* GPIO part */
[0] = DEFINE_RES_MEM(ASIC3_PHYS, ASIC3_MAP_SIZE_16BIT),
[1] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ)),
/* SD part */
[2] = DEFINE_RES_MEM(ASIC3_SD_PHYS, ASIC3_MAP_SIZE_16BIT),
[3] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ)),
};
static struct asic3_platform_data asic3_platform_data = {
.gpio_config = asic3_gpio_config,
.gpio_config_num = ARRAY_SIZE(asic3_gpio_config),
.irq_base = IRQ_BOARD_START,
.gpio_base = HX4700_ASIC3_GPIO_BASE,
.clock_rate = 4000000,
.leds = asic3_leds,
};
static struct platform_device asic3 = {
.name = "asic3",
.id = -1,
.resource = asic3_resources,
.num_resources = ARRAY_SIZE(asic3_resources),
.dev = {
.platform_data = &asic3_platform_data,
},
};
/*
* EGPIO
*/
static struct resource egpio_resources[] = {
[0] = DEFINE_RES_MEM(PXA_CS5_PHYS, 0x4),
};
static struct htc_egpio_chip egpio_chips[] = {
[0] = {
.reg_start = 0,
.gpio_base = HX4700_EGPIO_BASE,
.num_gpios = 8,
.direction = HTC_EGPIO_OUTPUT,
},
};
static struct htc_egpio_platform_data egpio_info = {
.reg_width = 16,
.bus_width = 16,
.chip = egpio_chips,
.num_chips = ARRAY_SIZE(egpio_chips),
};
static struct platform_device egpio = {
.name = "htc-egpio",
.id = -1,
.resource = egpio_resources,
.num_resources = ARRAY_SIZE(egpio_resources),
.dev = {
.platform_data = &egpio_info,
},
};
/*
* LCD - Sony display connected to ATI Imageon w3220
*/
static void sony_lcd_init(void)
{
gpio_set_value(GPIO84_HX4700_LCD_SQN, 1);
gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0);
gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 0);
gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0);
mdelay(10);
gpio_set_value(GPIO59_HX4700_LCD_PC1, 0);
gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
mdelay(20);
gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 1);
mdelay(5);
gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 1);
/* FIXME: init w3220 registers here */
mdelay(5);
gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 1);
mdelay(10);
gpio_set_value(GPIO62_HX4700_LCD_nRESET, 1);
mdelay(10);
gpio_set_value(GPIO59_HX4700_LCD_PC1, 1);
mdelay(10);
gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 1);
}
static void sony_lcd_off(void)
{
gpio_set_value(GPIO59_HX4700_LCD_PC1, 0);
gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0);
mdelay(10);
gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 0);
mdelay(10);
gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0);
mdelay(10);
gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
}
#ifdef CONFIG_PM
static void w3220_lcd_suspend(struct w100fb_par *wfb)
{
sony_lcd_off();
}
static void w3220_lcd_resume(struct w100fb_par *wfb)
{
sony_lcd_init();
}
#else
#define w3220_lcd_resume NULL
#define w3220_lcd_suspend NULL
#endif
static struct w100_tg_info w3220_tg_info = {
.suspend = w3220_lcd_suspend,
.resume = w3220_lcd_resume,
};
/* W3220_VGA QVGA */
static struct w100_gen_regs w3220_regs = {
.lcd_format = 0x00000003,
.lcdd_cntl1 = 0x00000000,
.lcdd_cntl2 = 0x0003ffff,
.genlcd_cntl1 = 0x00abf003, /* 0x00fff003 */
.genlcd_cntl2 = 0x00000003,
.genlcd_cntl3 = 0x000102aa,
};
static struct w100_mode w3220_modes[] = {
{
.xres = 480,
.yres = 640,
.left_margin = 15,
.right_margin = 16,
.upper_margin = 8,
.lower_margin = 7,
.crtc_ss = 0x00000000,
.crtc_ls = 0xa1ff01f9, /* 0x21ff01f9 */
.crtc_gs = 0xc0000000, /* 0x40000000 */
.crtc_vpos_gs = 0x0000028f,
.crtc_ps1_active = 0x00000000, /* 0x41060010 */
.crtc_rev = 0,
.crtc_dclk = 0x80000000,
.crtc_gclk = 0x040a0104,
.crtc_goe = 0,
.pll_freq = 95,
.pixclk_divider = 4,
.pixclk_divider_rotated = 4,
.pixclk_src = CLK_SRC_PLL,
.sysclk_divider = 0,
.sysclk_src = CLK_SRC_PLL,
},
{
.xres = 240,
.yres = 320,
.left_margin = 9,
.right_margin = 8,
.upper_margin = 5,
.lower_margin = 4,
.crtc_ss = 0x80150014,
.crtc_ls = 0xa0fb00f7,
.crtc_gs = 0xc0080007,
.crtc_vpos_gs = 0x00080007,
.crtc_rev = 0x0000000a,
.crtc_dclk = 0x81700030,
.crtc_gclk = 0x8015010f,
.crtc_goe = 0x00000000,
.pll_freq = 95,
.pixclk_divider = 4,
.pixclk_divider_rotated = 4,
.pixclk_src = CLK_SRC_PLL,
.sysclk_divider = 0,
.sysclk_src = CLK_SRC_PLL,
},
};
struct w100_mem_info w3220_mem_info = {
.ext_cntl = 0x09640011,
.sdram_mode_reg = 0x00600021,
.ext_timing_cntl = 0x1a001545, /* 0x15001545 */
.io_cntl = 0x7ddd7333,
.size = 0x1fffff,
};
struct w100_bm_mem_info w3220_bm_mem_info = {
.ext_mem_bw = 0x50413e01,
.offset = 0,
.ext_timing_ctl = 0x00043f7f,
.ext_cntl = 0x00000010,
.mode_reg = 0x00250000,
.io_cntl = 0x0fff0000,
.config = 0x08301480,
};
static struct w100_gpio_regs w3220_gpio_info = {
.init_data1 = 0xdfe00100, /* GPIO_DATA */
.gpio_dir1 = 0xffff0000, /* GPIO_CNTL1 */
.gpio_oe1 = 0x00000000, /* GPIO_CNTL2 */
.init_data2 = 0x00000000, /* GPIO_DATA2 */
.gpio_dir2 = 0x00000000, /* GPIO_CNTL3 */
.gpio_oe2 = 0x00000000, /* GPIO_CNTL4 */
};
static struct w100fb_mach_info w3220_info = {
.tg = &w3220_tg_info,
.mem = &w3220_mem_info,
.bm_mem = &w3220_bm_mem_info,
.gpio = &w3220_gpio_info,
.regs = &w3220_regs,
.modelist = w3220_modes,
.num_modes = 2,
.xtal_freq = 16000000,
};
static struct resource w3220_resources[] = {
[0] = DEFINE_RES_MEM(ATI_W3220_PHYS, SZ_16M),
};
static struct platform_device w3220 = {
.name = "w100fb",
.id = -1,
.dev = {
.platform_data = &w3220_info,
},
.num_resources = ARRAY_SIZE(w3220_resources),
.resource = w3220_resources,
};
static void hx4700_lcd_set_power(struct plat_lcd_data *pd, unsigned int power)
{
if (power)
sony_lcd_init();
else
sony_lcd_off();
}
static struct plat_lcd_data hx4700_lcd_data = {
.set_power = hx4700_lcd_set_power,
};
static struct platform_device hx4700_lcd = {
.name = "platform-lcd",
.id = -1,
.dev = {
.platform_data = &hx4700_lcd_data,
.parent = &w3220.dev,
},
};
/*
* Backlight
*/
static struct platform_pwm_backlight_data backlight_data = {
.max_brightness = 200,
.dft_brightness = 100,
};
static struct platform_device backlight = {
.name = "pwm-backlight",
.id = -1,
.dev = {
.parent = &pxa27x_device_pwm1.dev,
.platform_data = &backlight_data,
},
};
static struct pwm_lookup hx4700_pwm_lookup[] = {
PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL,
30923, PWM_POLARITY_NORMAL),
};
/*
* USB "Transceiver"
*/
static struct gpiod_lookup_table gpio_vbus_gpiod_table = {
.dev_id = "gpio-vbus",
.table = {
/* This GPIO is on ASIC3 */
GPIO_LOOKUP("asic3",
/* Convert to a local offset on the ASIC3 */
GPIOD14_nUSBC_DETECT - HX4700_ASIC3_GPIO_BASE,
"vbus", GPIO_ACTIVE_LOW),
/* This one is on the primary SOC GPIO */
GPIO_LOOKUP("gpio-pxa", GPIO76_HX4700_USBC_PUEN,
"pullup", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct platform_device gpio_vbus = {
.name = "gpio-vbus",
.id = -1,
};
static struct pxa2xx_udc_mach_info hx4700_udc_info;
/*
* Touchscreen - TSC2046 connected to SSP2
*/
static const struct ads7846_platform_data tsc2046_info = {
.model = 7846,
.vref_delay_usecs = 100,
.pressure_max = 1024,
.debounce_max = 10,
.debounce_tol = 3,
.debounce_rep = 1,
.gpio_pendown = GPIO58_HX4700_TSC2046_nPENIRQ,
};
static struct pxa2xx_spi_chip tsc2046_chip = {
.tx_threshold = 1,
.rx_threshold = 2,
.timeout = 64,
};
static struct spi_board_info tsc2046_board_info[] __initdata = {
{
.modalias = "ads7846",
.bus_num = 2,
.max_speed_hz = 2600000, /* 100 kHz sample rate */
.irq = PXA_GPIO_TO_IRQ(GPIO58_HX4700_TSC2046_nPENIRQ),
.platform_data = &tsc2046_info,
.controller_data = &tsc2046_chip,
},
};
static struct pxa2xx_spi_controller pxa_ssp2_master_info = {
.num_chipselect = 1,
.enable_dma = 1,
};
static struct gpiod_lookup_table pxa_ssp2_gpio_table = {
.dev_id = "spi2",
.table = {
GPIO_LOOKUP_IDX("gpio-pxa", GPIO88_HX4700_TSC2046_CS, "cs", 0, GPIO_ACTIVE_LOW),
{ },
},
};
/*
* External power
*/
static int power_supply_init(struct device *dev)
{
return gpio_request(GPIOD9_nAC_IN, "AC charger detect");
}
static int hx4700_is_ac_online(void)
{
return !gpio_get_value(GPIOD9_nAC_IN);
}
static void power_supply_exit(struct device *dev)
{
gpio_free(GPIOD9_nAC_IN);
}
static char *hx4700_supplicants[] = {
"ds2760-battery.0", "backup-battery"
};
static struct pda_power_pdata power_supply_info = {
.init = power_supply_init,
.is_ac_online = hx4700_is_ac_online,
.exit = power_supply_exit,
.supplied_to = hx4700_supplicants,
.num_supplicants = ARRAY_SIZE(hx4700_supplicants),
};
static struct resource power_supply_resources[] = {
[0] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), 1, "ac",
IORESOURCE_IRQ |
IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE),
[1] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), 1, "usb",
IORESOURCE_IRQ |
IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE),
};
static struct platform_device power_supply = {
.name = "pda-power",
.id = -1,
.dev = {
.platform_data = &power_supply_info,
},
.resource = power_supply_resources,
.num_resources = ARRAY_SIZE(power_supply_resources),
};
/*
* Battery charger
*/
static struct regulator_consumer_supply bq24022_consumers[] = {
REGULATOR_SUPPLY("vbus_draw", NULL),
REGULATOR_SUPPLY("ac_draw", NULL),
};
static struct regulator_init_data bq24022_init_data = {
.constraints = {
.max_uA = 500000,
.valid_ops_mask = REGULATOR_CHANGE_CURRENT|REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(bq24022_consumers),
.consumer_supplies = bq24022_consumers,
};
static enum gpiod_flags bq24022_gpiod_gflags[] = { GPIOD_OUT_LOW };
static struct gpio_regulator_state bq24022_states[] = {
{ .value = 100000, .gpios = (0 << 0) },
{ .value = 500000, .gpios = (1 << 0) },
};
static struct gpio_regulator_config bq24022_info = {
.supply_name = "bq24022",
.enabled_at_boot = 0,
.gflags = bq24022_gpiod_gflags,
.ngpios = ARRAY_SIZE(bq24022_gpiod_gflags),
.states = bq24022_states,
.nr_states = ARRAY_SIZE(bq24022_states),
.type = REGULATOR_CURRENT,
.init_data = &bq24022_init_data,
};
static struct platform_device bq24022 = {
.name = "gpio-regulator",
.id = -1,
.dev = {
.platform_data = &bq24022_info,
},
};
static struct gpiod_lookup_table bq24022_gpiod_table = {
.dev_id = "gpio-regulator",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO96_HX4700_BQ24022_ISET2,
NULL, GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("gpio-pxa", GPIO72_HX4700_BQ24022_nCHARGE_EN,
"enable", GPIO_ACTIVE_LOW),
{ },
},
};
/*
* StrataFlash
*/
static void hx4700_set_vpp(struct platform_device *pdev, int vpp)
{
gpio_set_value(GPIO91_HX4700_FLASH_VPEN, vpp);
}
static struct resource strataflash_resource[] = {
[0] = DEFINE_RES_MEM(PXA_CS0_PHYS, SZ_64M),
[1] = DEFINE_RES_MEM(PXA_CS0_PHYS + SZ_64M, SZ_64M),
};
static struct physmap_flash_data strataflash_data = {
.width = 4,
.set_vpp = hx4700_set_vpp,
};
static struct platform_device strataflash = {
.name = "physmap-flash",
.id = -1,
.resource = strataflash_resource,
.num_resources = ARRAY_SIZE(strataflash_resource),
.dev = {
.platform_data = &strataflash_data,
},
};
/*
* Maxim MAX1587A on PI2C
*/
static struct regulator_consumer_supply max1587a_consumer =
REGULATOR_SUPPLY("vcc_core", NULL);
static struct regulator_init_data max1587a_v3_info = {
.constraints = {
.name = "vcc_core range",
.min_uV = 900000,
.max_uV = 1705000,
.always_on = 1,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
},
.num_consumer_supplies = 1,
.consumer_supplies = &max1587a_consumer,
};
static struct max1586_subdev_data max1587a_subdev = {
.name = "vcc_core",
.id = MAX1586_V3,
.platform_data = &max1587a_v3_info,
};
static struct max1586_platform_data max1587a_info = {
.num_subdevs = 1,
.subdevs = &max1587a_subdev,
.v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
};
static struct i2c_board_info __initdata pi2c_board_info[] = {
{
I2C_BOARD_INFO("max1586", 0x14),
.platform_data = &max1587a_info,
},
};
/*
* Asahi Kasei AK4641 on I2C
*/
static struct ak4641_platform_data ak4641_info = {
.gpio_power = GPIO27_HX4700_CODEC_ON,
.gpio_npdn = GPIO109_HX4700_CODEC_nPDN,
};
static struct i2c_board_info i2c_board_info[] __initdata = {
{
I2C_BOARD_INFO("ak4641", 0x12),
.platform_data = &ak4641_info,
},
};
static struct gpiod_lookup_table hx4700_audio_gpio_table = {
.dev_id = "hx4700-audio",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO75_HX4700_EARPHONE_nDET,
"earphone-det", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO92_HX4700_HP_DRIVER,
"hp-driver", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("gpio-pxa", GPIO107_HX4700_SPK_nSD,
"spk-sd", GPIO_ACTIVE_LOW),
{ },
},
};
static struct platform_device audio = {
.name = "hx4700-audio",
.id = -1,
};
/*
* Platform devices
*/
static struct platform_device *devices[] __initdata = {
&asic3,
&gpio_keys,
&navpoint,
&backlight,
&w3220,
&hx4700_lcd,
&egpio,
&bq24022,
&gpio_vbus,
&power_supply,
&strataflash,
&audio,
};
static struct gpio global_gpios[] = {
{ GPIO12_HX4700_ASIC3_IRQ, GPIOF_IN, "ASIC3_IRQ" },
{ GPIO13_HX4700_W3220_IRQ, GPIOF_IN, "W3220_IRQ" },
{ GPIO14_HX4700_nWLAN_IRQ, GPIOF_IN, "WLAN_IRQ" },
{ GPIO59_HX4700_LCD_PC1, GPIOF_OUT_INIT_HIGH, "LCD_PC1" },
{ GPIO62_HX4700_LCD_nRESET, GPIOF_OUT_INIT_HIGH, "LCD_RESET" },
{ GPIO70_HX4700_LCD_SLIN1, GPIOF_OUT_INIT_HIGH, "LCD_SLIN1" },
{ GPIO84_HX4700_LCD_SQN, GPIOF_OUT_INIT_HIGH, "LCD_SQN" },
{ GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" },
{ GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" },
{ GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" },
{ GPIO61_HX4700_W3220_nRESET, GPIOF_OUT_INIT_HIGH, "W3220_nRESET" },
{ GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" },
{ GPIO81_HX4700_CPU_GP_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_GP_nRESET" },
{ GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" },
{ GPIO116_HX4700_CPU_HW_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_HW_nRESET" },
};
static void __init hx4700_init(void)
{
int ret;
PCFR = PCFR_GPR_EN | PCFR_OPDE;
pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1);
ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios));
if (ret)
pr_err ("hx4700: Failed to request GPIOs.\n");
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
gpiod_add_lookup_table(&bq24022_gpiod_table);
gpiod_add_lookup_table(&gpio_vbus_gpiod_table);
gpiod_add_lookup_table(&hx4700_audio_gpio_table);
platform_add_devices(devices, ARRAY_SIZE(devices));
pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup));
pxa_set_ficp_info(&ficp_info);
pxa27x_set_i2c_power_info(NULL);
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(i2c_board_info));
i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
gpiod_add_lookup_table(&pxa_ssp2_gpio_table);
pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 0);
mdelay(10);
gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1);
mdelay(10);
pxa_set_udc_info(&hx4700_udc_info);
regulator_has_full_constraints();
}
MACHINE_START(H4700, "HP iPAQ HX4700")
.atag_offset = 0x100,
.map_io = pxa27x_map_io,
.nr_irqs = HX4700_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_machine = hx4700_init,
.init_time = pxa_timer_init,
.restart = pxa_restart,
MACHINE_END

129
arch/arm/mach-pxa/hx4700.h
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@ -1,129 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* GPIO and IRQ definitions for HP iPAQ hx4700
*
* Copyright (c) 2008 Philipp Zabel
*/
#ifndef _HX4700_H_
#define _HX4700_H_
#include <linux/gpio.h>
#include <linux/mfd/asic3.h>
#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */
#define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO
#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
#define HX4700_NR_IRQS (IRQ_BOARD_START + 70)
/*
* PXA GPIOs
*/
#define GPIO0_HX4700_nKEY_POWER 0
#define GPIO12_HX4700_ASIC3_IRQ 12
#define GPIO13_HX4700_W3220_IRQ 13
#define GPIO14_HX4700_nWLAN_IRQ 14
#define GPIO18_HX4700_RDY 18
#define GPIO22_HX4700_LCD_RL 22
#define GPIO27_HX4700_CODEC_ON 27
#define GPIO32_HX4700_RS232_ON 32
#define GPIO52_HX4700_CPU_nBATT_FAULT 52
#define GPIO58_HX4700_TSC2046_nPENIRQ 58
#define GPIO59_HX4700_LCD_PC1 59
#define GPIO60_HX4700_CF_RNB 60
#define GPIO61_HX4700_W3220_nRESET 61
#define GPIO62_HX4700_LCD_nRESET 62
#define GPIO63_HX4700_CPU_SS_nRESET 63
#define GPIO65_HX4700_TSC2046_PEN_PU 65
#define GPIO66_HX4700_ASIC3_nSDIO_IRQ 66
#define GPIO67_HX4700_EUART_PS 67
#define GPIO70_HX4700_LCD_SLIN1 70
#define GPIO71_HX4700_ASIC3_nRESET 71
#define GPIO72_HX4700_BQ24022_nCHARGE_EN 72
#define GPIO73_HX4700_LCD_UD_1 73
#define GPIO75_HX4700_EARPHONE_nDET 75
#define GPIO76_HX4700_USBC_PUEN 76
#define GPIO81_HX4700_CPU_GP_nRESET 81
#define GPIO82_HX4700_EUART_RESET 82
#define GPIO83_HX4700_WLAN_nRESET 83
#define GPIO84_HX4700_LCD_SQN 84
#define GPIO85_HX4700_nPCE1 85
#define GPIO88_HX4700_TSC2046_CS 88
#define GPIO91_HX4700_FLASH_VPEN 91
#define GPIO92_HX4700_HP_DRIVER 92
#define GPIO93_HX4700_EUART_INT 93
#define GPIO94_HX4700_KEY_MAIL 94
#define GPIO95_HX4700_BATT_OFF 95
#define GPIO96_HX4700_BQ24022_ISET2 96
#define GPIO97_HX4700_nBL_DETECT 97
#define GPIO99_HX4700_KEY_CONTACTS 99
#define GPIO100_HX4700_AUTO_SENSE 100 /* BL auto brightness */
#define GPIO102_HX4700_SYNAPTICS_POWER_ON 102
#define GPIO103_HX4700_SYNAPTICS_INT 103
#define GPIO105_HX4700_nIR_ON 105
#define GPIO106_HX4700_CPU_BT_nRESET 106
#define GPIO107_HX4700_SPK_nSD 107
#define GPIO109_HX4700_CODEC_nPDN 109
#define GPIO110_HX4700_LCD_LVDD_3V3_ON 110
#define GPIO111_HX4700_LCD_AVDD_3V3_ON 111
#define GPIO112_HX4700_LCD_N2V7_7V3_ON 112
#define GPIO114_HX4700_CF_RESET 114
#define GPIO116_HX4700_CPU_HW_nRESET 116
/*
* ASIC3 GPIOs
*/
#define GPIOC_BASE (HX4700_ASIC3_GPIO_BASE + 32)
#define GPIOD_BASE (HX4700_ASIC3_GPIO_BASE + 48)
#define GPIOC0_LED_RED (GPIOC_BASE + 0)
#define GPIOC1_LED_GREEN (GPIOC_BASE + 1)
#define GPIOC2_LED_BLUE (GPIOC_BASE + 2)
#define GPIOC3_nSD_CS (GPIOC_BASE + 3)
#define GPIOC4_CF_nCD (GPIOC_BASE + 4) /* Input */
#define GPIOC5_nCIOW (GPIOC_BASE + 5) /* Output, to CF */
#define GPIOC6_nCIOR (GPIOC_BASE + 6) /* Output, to CF */
#define GPIOC7_nPCE1 (GPIOC_BASE + 7) /* Input, from CPU */
#define GPIOC8_nPCE2 (GPIOC_BASE + 8) /* Input, from CPU */
#define GPIOC9_nPOE (GPIOC_BASE + 9) /* Input, from CPU */
#define GPIOC10_CF_nPWE (GPIOC_BASE + 10) /* Input */
#define GPIOC11_PSKTSEL (GPIOC_BASE + 11) /* Input, from CPU */
#define GPIOC12_nPREG (GPIOC_BASE + 12) /* Input, from CPU */
#define GPIOC13_nPWAIT (GPIOC_BASE + 13) /* Output, to CPU */
#define GPIOC14_nPIOIS16 (GPIOC_BASE + 14) /* Output, to CPU */
#define GPIOC15_nPIOR (GPIOC_BASE + 15) /* Input, from CPU */
#define GPIOD0_CPU_SS_INT (GPIOD_BASE + 0) /* Input */
#define GPIOD1_nKEY_CALENDAR (GPIOD_BASE + 1)
#define GPIOD2_BLUETOOTH_WAKEUP (GPIOD_BASE + 2)
#define GPIOD3_nKEY_HOME (GPIOD_BASE + 3)
#define GPIOD4_CF_nCD (GPIOD_BASE + 4) /* Input, from CF */
#define GPIOD5_nPIO (GPIOD_BASE + 5) /* Input */
#define GPIOD6_nKEY_RECORD (GPIOD_BASE + 6)
#define GPIOD7_nSDIO_DETECT (GPIOD_BASE + 7)
#define GPIOD8_COM_DCD (GPIOD_BASE + 8) /* Input */
#define GPIOD9_nAC_IN (GPIOD_BASE + 9)
#define GPIOD10_nSDIO_IRQ (GPIOD_BASE + 10) /* Input */
#define GPIOD11_nCIOIS16 (GPIOD_BASE + 11) /* Input, from CF */
#define GPIOD12_nCWAIT (GPIOD_BASE + 12) /* Input, from CF */
#define GPIOD13_CF_RNB (GPIOD_BASE + 13) /* Input */
#define GPIOD14_nUSBC_DETECT (GPIOD_BASE + 14)
#define GPIOD15_nPIOW (GPIOD_BASE + 15) /* Input, from CPU */
/*
* EGPIOs
*/
#define EGPIO0_VCC_3V3_EN (HX4700_EGPIO_BASE + 0) /* WLAN support chip */
#define EGPIO1_WL_VREG_EN (HX4700_EGPIO_BASE + 1) /* WLAN power */
#define EGPIO2_VCC_2V1_WL_EN (HX4700_EGPIO_BASE + 2) /* unused */
#define EGPIO3_SS_PWR_ON (HX4700_EGPIO_BASE + 3) /* smart slot power */
#define EGPIO4_CF_3V3_ON (HX4700_EGPIO_BASE + 4) /* CF 3.3V enable */
#define EGPIO5_BT_3V3_ON (HX4700_EGPIO_BASE + 5) /* BT 3.3V enable */
#define EGPIO6_WL1V8_EN (HX4700_EGPIO_BASE + 6) /* WLAN 1.8V enable */
#define EGPIO7_VCC_3V3_WL_EN (HX4700_EGPIO_BASE + 7) /* WLAN 3.3V enable */
#define EGPIO8_USB_3V3_ON (HX4700_EGPIO_BASE + 8) /* unused */
#endif /* _HX4700_H_ */

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arch/arm/mach-pxa/icontrol.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/icontrol.c
*
* Support for the iControl and SafeTcam platforms from TMT Services
* using the Embedian MXM-8x10 Computer on Module
*
* Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
*
* 2010-01-21 Hennie van der Merve <hvdmerwe@tmtservies.co.za>
*/
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/gpio/machine.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "pxa320.h"
#include "mxm8x10.h"
#include <linux/spi/spi.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/regulator/machine.h>
#include "generic.h"
#define ICONTROL_MCP251x_nCS1 (15)
#define ICONTROL_MCP251x_nCS2 (16)
#define ICONTROL_MCP251x_nCS3 (17)
#define ICONTROL_MCP251x_nCS4 (24)
#define ICONTROL_MCP251x_nIRQ1 (74)
#define ICONTROL_MCP251x_nIRQ2 (75)
#define ICONTROL_MCP251x_nIRQ3 (76)
#define ICONTROL_MCP251x_nIRQ4 (77)
static struct pxa2xx_spi_chip mcp251x_chip_info1 = {
.tx_threshold = 8,
.rx_threshold = 128,
.dma_burst_size = 8,
.timeout = 235,
};
static struct pxa2xx_spi_chip mcp251x_chip_info2 = {
.tx_threshold = 8,
.rx_threshold = 128,
.dma_burst_size = 8,
.timeout = 235,
};
static struct pxa2xx_spi_chip mcp251x_chip_info3 = {
.tx_threshold = 8,
.rx_threshold = 128,
.dma_burst_size = 8,
.timeout = 235,
};
static struct pxa2xx_spi_chip mcp251x_chip_info4 = {
.tx_threshold = 8,
.rx_threshold = 128,
.dma_burst_size = 8,
.timeout = 235,
};
static const struct property_entry mcp251x_properties[] = {
PROPERTY_ENTRY_U32("clock-frequency", 16000000),
{}
};
static const struct software_node mcp251x_node = {
.properties = mcp251x_properties,
};
static struct spi_board_info mcp251x_board_info[] = {
{
.modalias = "mcp2515",
.max_speed_hz = 6500000,
.bus_num = 3,
.chip_select = 0,
.swnode = &mcp251x_node,
.controller_data = &mcp251x_chip_info1,
.irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ1)
},
{
.modalias = "mcp2515",
.max_speed_hz = 6500000,
.bus_num = 3,
.chip_select = 1,
.swnode = &mcp251x_node,
.controller_data = &mcp251x_chip_info2,
.irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ2)
},
{
.modalias = "mcp2515",
.max_speed_hz = 6500000,
.bus_num = 4,
.chip_select = 0,
.swnode = &mcp251x_node,
.controller_data = &mcp251x_chip_info3,
.irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ3)
},
{
.modalias = "mcp2515",
.max_speed_hz = 6500000,
.bus_num = 4,
.chip_select = 1,
.swnode = &mcp251x_node,
.controller_data = &mcp251x_chip_info4,
.irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ4)
}
};
static struct pxa2xx_spi_controller pxa_ssp3_spi_master_info = {
.num_chipselect = 2,
.enable_dma = 1
};
static struct pxa2xx_spi_controller pxa_ssp4_spi_master_info = {
.num_chipselect = 2,
.enable_dma = 1
};
struct platform_device pxa_spi_ssp3 = {
.name = "pxa2xx-spi",
.id = 3,
.dev = {
.platform_data = &pxa_ssp3_spi_master_info,
}
};
struct platform_device pxa_spi_ssp4 = {
.name = "pxa2xx-spi",
.id = 4,
.dev = {
.platform_data = &pxa_ssp4_spi_master_info,
}
};
static struct gpiod_lookup_table pxa_ssp3_gpio_table = {
.dev_id = "spi3",
.table = {
GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS1, "cs", 0, GPIO_ACTIVE_LOW),
GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS2, "cs", 1, GPIO_ACTIVE_LOW),
{ },
},
};
static struct gpiod_lookup_table pxa_ssp4_gpio_table = {
.dev_id = "spi4",
.table = {
GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS3, "cs", 0, GPIO_ACTIVE_LOW),
GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS4, "cs", 1, GPIO_ACTIVE_LOW),
{ },
},
};
static struct platform_device *icontrol_spi_devices[] __initdata = {
&pxa_spi_ssp3,
&pxa_spi_ssp4,
};
static mfp_cfg_t mfp_can_cfg[] __initdata = {
/* CAN CS lines */
GPIO15_GPIO,
GPIO16_GPIO,
GPIO17_GPIO,
GPIO24_GPIO,
/* SPI (SSP3) lines */
GPIO89_SSP3_SCLK,
GPIO91_SSP3_TXD,
GPIO92_SSP3_RXD,
/* SPI (SSP4) lines */
GPIO93_SSP4_SCLK,
GPIO95_SSP4_TXD,
GPIO96_SSP4_RXD,
/* CAN nIRQ lines */
GPIO74_GPIO | MFP_LPM_EDGE_RISE,
GPIO75_GPIO | MFP_LPM_EDGE_RISE,
GPIO76_GPIO | MFP_LPM_EDGE_RISE,
GPIO77_GPIO | MFP_LPM_EDGE_RISE
};
static void __init icontrol_can_init(void)
{
pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_can_cfg));
gpiod_add_lookup_table(&pxa_ssp3_gpio_table);
gpiod_add_lookup_table(&pxa_ssp4_gpio_table);
platform_add_devices(ARRAY_AND_SIZE(icontrol_spi_devices));
spi_register_board_info(ARRAY_AND_SIZE(mcp251x_board_info));
}
static void __init icontrol_init(void)
{
mxm_8x10_barebones_init();
mxm_8x10_usb_host_init();
mxm_8x10_mmc_init();
icontrol_can_init();
regulator_has_full_constraints();
}
MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
.atag_offset = 0x100,
.map_io = pxa3xx_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa3xx_init_irq,
.handle_irq = pxa3xx_handle_irq,
.init_time = pxa_timer_init,
.init_machine = icontrol_init,
.restart = pxa_restart,
MACHINE_END

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arch/arm/mach-pxa/idp.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/idp.c
*
* Copyright (c) 2001 Cliff Brake, Accelent Systems Inc.
*
* 2001-09-13: Cliff Brake <cbrake@accelent.com>
* Initial code
*
* 2005-02-15: Cliff Brake <cliff.brake@gmail.com>
* <http://www.vibren.com> <http://bec-systems.com>
* Updated for 2.6 kernel
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/leds.h>
#include <linux/platform_device.h>
#include <linux/fb.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "pxa25x.h"
#include "idp.h"
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/smc91x.h>
#include "generic.h"
#include "devices.h"
/* TODO:
* - add pxa2xx_audio_ops_t device structure
* - Ethernet interrupt
*/
static unsigned long idp_pin_config[] __initdata = {
/* LCD */
GPIOxx_LCD_DSTN_16BPP,
/* BTUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
/* STUART */
GPIO46_STUART_RXD,
GPIO47_STUART_TXD,
/* MMC */
GPIO6_MMC_CLK,
GPIO8_MMC_CS0,
/* Ethernet */
GPIO33_nCS_5, /* Ethernet CS */
GPIO4_GPIO, /* Ethernet IRQ */
};
static struct resource smc91x_resources[] = {
[0] = {
.start = (IDP_ETH_PHYS + 0x300),
.end = (IDP_ETH_PHYS + 0xfffff),
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PXA_GPIO_TO_IRQ(4),
.end = PXA_GPIO_TO_IRQ(4),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
};
static struct smc91x_platdata smc91x_platdata = {
.flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
SMC91X_USE_DMA | SMC91X_NOWAIT,
.pxa_u16_align4 = true,
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
.dev.platform_data = &smc91x_platdata,
};
static void idp_backlight_power(int on)
{
if (on) {
IDP_CPLD_LCD |= (1<<1);
} else {
IDP_CPLD_LCD &= ~(1<<1);
}
}
static void idp_vlcd(int on)
{
if (on) {
IDP_CPLD_LCD |= (1<<2);
} else {
IDP_CPLD_LCD &= ~(1<<2);
}
}
static void idp_lcd_power(int on, struct fb_var_screeninfo *var)
{
if (on) {
IDP_CPLD_LCD |= (1<<0);
} else {
IDP_CPLD_LCD &= ~(1<<0);
}
/* call idp_vlcd for now as core driver does not support
* both power and vlcd hooks. Note, this is not technically
* the correct sequence, but seems to work. Disclaimer:
* this may eventually damage the display.
*/
idp_vlcd(on);
}
static struct pxafb_mode_info sharp_lm8v31_mode = {
.pixclock = 270000,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 1,
.left_margin = 3,
.right_margin = 3,
.vsync_len = 1,
.upper_margin = 0,
.lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.cmap_greyscale = 0,
};
static struct pxafb_mach_info sharp_lm8v31 = {
.modes = &sharp_lm8v31_mode,
.num_modes = 1,
.cmap_inverse = 0,
.cmap_static = 0,
.lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL |
LCD_AC_BIAS_FREQ(255),
.pxafb_backlight_power = &idp_backlight_power,
.pxafb_lcd_power = &idp_lcd_power
};
static struct pxamci_platform_data idp_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
};
static void __init idp_init(void)
{
printk("idp_init()\n");
pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_device_register(&smc91x_device);
//platform_device_register(&mst_audio_device);
pxa_set_fb_info(NULL, &sharp_lm8v31);
pxa_set_mci_info(&idp_mci_platform_data);
}
static struct map_desc idp_io_desc[] __initdata = {
{
.virtual = IDP_COREVOLT_VIRT,
.pfn = __phys_to_pfn(IDP_COREVOLT_PHYS),
.length = IDP_COREVOLT_SIZE,
.type = MT_DEVICE
}, {
.virtual = IDP_CPLD_VIRT,
.pfn = __phys_to_pfn(IDP_CPLD_PHYS),
.length = IDP_CPLD_SIZE,
.type = MT_DEVICE
}
};
static void __init idp_map_io(void)
{
pxa25x_map_io();
iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
}
/* LEDs */
#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
struct idp_led {
struct led_classdev cdev;
u8 mask;
};
/*
* The triggers lines up below will only be used if the
* LED triggers are compiled in.
*/
static const struct {
const char *name;
const char *trigger;
} idp_leds[] = {
{ "idp:green", "heartbeat", },
{ "idp:red", "cpu0", },
};
static void idp_led_set(struct led_classdev *cdev,
enum led_brightness b)
{
struct idp_led *led = container_of(cdev,
struct idp_led, cdev);
u32 reg = IDP_CPLD_LED_CONTROL;
if (b != LED_OFF)
reg &= ~led->mask;
else
reg |= led->mask;
IDP_CPLD_LED_CONTROL = reg;
}
static enum led_brightness idp_led_get(struct led_classdev *cdev)
{
struct idp_led *led = container_of(cdev,
struct idp_led, cdev);
return (IDP_CPLD_LED_CONTROL & led->mask) ? LED_OFF : LED_FULL;
}
static int __init idp_leds_init(void)
{
int i;
if (!machine_is_pxa_idp())
return -ENODEV;
for (i = 0; i < ARRAY_SIZE(idp_leds); i++) {
struct idp_led *led;
led = kzalloc(sizeof(*led), GFP_KERNEL);
if (!led)
break;
led->cdev.name = idp_leds[i].name;
led->cdev.brightness_set = idp_led_set;
led->cdev.brightness_get = idp_led_get;
led->cdev.default_trigger = idp_leds[i].trigger;
if (i == 0)
led->mask = IDP_HB_LED;
else
led->mask = IDP_BUSY_LED;
if (led_classdev_register(NULL, &led->cdev) < 0) {
kfree(led);
break;
}
}
return 0;
}
/*
* Since we may have triggers on any subsystem, defer registration
* until after subsystem_init.
*/
fs_initcall(idp_leds_init);
#endif
MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
/* Maintainer: Vibren Technologies */
.map_io = idp_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = idp_init,
.restart = pxa_restart,
MACHINE_END

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arch/arm/mach-pxa/idp.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* arch/arm/mach-pxa/include/mach/idp.h
*
* Copyright (c) 2001 Cliff Brake, Accelent Systems Inc.
*
* 2001-09-13: Cliff Brake <cbrake@accelent.com>
* Initial code
*
* 2005-02-15: Cliff Brake <cliff.brake@gmail.com>
* <http://www.vibren.com> <http://bec-systems.com>
* Changes for 2.6 kernel.
*/
/*
* Note: this file must be safe to include in assembly files
*
* Support for the Vibren PXA255 IDP requires rev04 or later
* IDP hardware.
*/
#include "irqs.h" /* PXA_GPIO_TO_IRQ */
#define IDP_FLASH_PHYS (PXA_CS0_PHYS)
#define IDP_ALT_FLASH_PHYS (PXA_CS1_PHYS)
#define IDP_MEDIAQ_PHYS (PXA_CS3_PHYS)
#define IDP_IDE_PHYS (PXA_CS5_PHYS + 0x03000000)
#define IDP_ETH_PHYS (PXA_CS5_PHYS + 0x03400000)
#define IDP_COREVOLT_PHYS (PXA_CS5_PHYS + 0x03800000)
#define IDP_CPLD_PHYS (PXA_CS5_PHYS + 0x03C00000)
/*
* virtual memory map
*/
#define IDP_COREVOLT_VIRT (0xf0000000)
#define IDP_COREVOLT_SIZE (1*1024*1024)
#define IDP_CPLD_VIRT (IDP_COREVOLT_VIRT + IDP_COREVOLT_SIZE)
#define IDP_CPLD_SIZE (1*1024*1024)
#if (IDP_CPLD_VIRT + IDP_CPLD_SIZE) > 0xfc000000
#error Your custom IO space is getting a bit large !!
#endif
#define CPLD_P2V(x) ((x) - IDP_CPLD_PHYS + IDP_CPLD_VIRT)
#define CPLD_V2P(x) ((x) - IDP_CPLD_VIRT + IDP_CPLD_PHYS)
#ifndef __ASSEMBLY__
# define __CPLD_REG(x) (*((volatile unsigned long *)CPLD_P2V(x)))
#else
# define __CPLD_REG(x) CPLD_P2V(x)
#endif
/* board level registers in the CPLD: (offsets from CPLD_VIRT) */
#define _IDP_CPLD_REV (IDP_CPLD_PHYS + 0x00)
#define _IDP_CPLD_PERIPH_PWR (IDP_CPLD_PHYS + 0x04)
#define _IDP_CPLD_LED_CONTROL (IDP_CPLD_PHYS + 0x08)
#define _IDP_CPLD_KB_COL_HIGH (IDP_CPLD_PHYS + 0x0C)
#define _IDP_CPLD_KB_COL_LOW (IDP_CPLD_PHYS + 0x10)
#define _IDP_CPLD_PCCARD_EN (IDP_CPLD_PHYS + 0x14)
#define _IDP_CPLD_GPIOH_DIR (IDP_CPLD_PHYS + 0x18)
#define _IDP_CPLD_GPIOH_VALUE (IDP_CPLD_PHYS + 0x1C)
#define _IDP_CPLD_GPIOL_DIR (IDP_CPLD_PHYS + 0x20)
#define _IDP_CPLD_GPIOL_VALUE (IDP_CPLD_PHYS + 0x24)
#define _IDP_CPLD_PCCARD_PWR (IDP_CPLD_PHYS + 0x28)
#define _IDP_CPLD_MISC_CTRL (IDP_CPLD_PHYS + 0x2C)
#define _IDP_CPLD_LCD (IDP_CPLD_PHYS + 0x30)
#define _IDP_CPLD_FLASH_WE (IDP_CPLD_PHYS + 0x34)
#define _IDP_CPLD_KB_ROW (IDP_CPLD_PHYS + 0x50)
#define _IDP_CPLD_PCCARD0_STATUS (IDP_CPLD_PHYS + 0x54)
#define _IDP_CPLD_PCCARD1_STATUS (IDP_CPLD_PHYS + 0x58)
#define _IDP_CPLD_MISC_STATUS (IDP_CPLD_PHYS + 0x5C)
/* FPGA register virtual addresses */
#define IDP_CPLD_REV __CPLD_REG(_IDP_CPLD_REV)
#define IDP_CPLD_PERIPH_PWR __CPLD_REG(_IDP_CPLD_PERIPH_PWR)
#define IDP_CPLD_LED_CONTROL __CPLD_REG(_IDP_CPLD_LED_CONTROL)
#define IDP_CPLD_KB_COL_HIGH __CPLD_REG(_IDP_CPLD_KB_COL_HIGH)
#define IDP_CPLD_KB_COL_LOW __CPLD_REG(_IDP_CPLD_KB_COL_LOW)
#define IDP_CPLD_PCCARD_EN __CPLD_REG(_IDP_CPLD_PCCARD_EN)
#define IDP_CPLD_GPIOH_DIR __CPLD_REG(_IDP_CPLD_GPIOH_DIR)
#define IDP_CPLD_GPIOH_VALUE __CPLD_REG(_IDP_CPLD_GPIOH_VALUE)
#define IDP_CPLD_GPIOL_DIR __CPLD_REG(_IDP_CPLD_GPIOL_DIR)
#define IDP_CPLD_GPIOL_VALUE __CPLD_REG(_IDP_CPLD_GPIOL_VALUE)
#define IDP_CPLD_PCCARD_PWR __CPLD_REG(_IDP_CPLD_PCCARD_PWR)
#define IDP_CPLD_MISC_CTRL __CPLD_REG(_IDP_CPLD_MISC_CTRL)
#define IDP_CPLD_LCD __CPLD_REG(_IDP_CPLD_LCD)
#define IDP_CPLD_FLASH_WE __CPLD_REG(_IDP_CPLD_FLASH_WE)
#define IDP_CPLD_KB_ROW __CPLD_REG(_IDP_CPLD_KB_ROW)
#define IDP_CPLD_PCCARD0_STATUS __CPLD_REG(_IDP_CPLD_PCCARD0_STATUS)
#define IDP_CPLD_PCCARD1_STATUS __CPLD_REG(_IDP_CPLD_PCCARD1_STATUS)
#define IDP_CPLD_MISC_STATUS __CPLD_REG(_IDP_CPLD_MISC_STATUS)
/*
* Bit masks for various registers
*/
// IDP_CPLD_PCCARD_PWR
#define PCC0_PWR0 (1 << 0)
#define PCC0_PWR1 (1 << 1)
#define PCC0_PWR2 (1 << 2)
#define PCC0_PWR3 (1 << 3)
#define PCC1_PWR0 (1 << 4)
#define PCC1_PWR1 (1 << 5)
#define PCC1_PWR2 (1 << 6)
#define PCC1_PWR3 (1 << 7)
// IDP_CPLD_PCCARD_EN
#define PCC0_RESET (1 << 6)
#define PCC1_RESET (1 << 7)
#define PCC0_ENABLE (1 << 0)
#define PCC1_ENABLE (1 << 1)
// IDP_CPLD_PCCARDx_STATUS
#define _PCC_WRPROT (1 << 7) // 7-4 read as low true
#define _PCC_RESET (1 << 6)
#define _PCC_IRQ (1 << 5)
#define _PCC_INPACK (1 << 4)
#define PCC_BVD2 (1 << 3)
#define PCC_BVD1 (1 << 2)
#define PCC_VS2 (1 << 1)
#define PCC_VS1 (1 << 0)
/* A listing of interrupts used by external hardware devices */
#define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5)
#define IDE_IRQ PXA_GPIO_TO_IRQ(21)
#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
#define ETHERNET_IRQ PXA_GPIO_TO_IRQ(4)
#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define PCMCIA_S0_CD_VALID PXA_GPIO_TO_IRQ(7)
#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
#define PCMCIA_S1_CD_VALID PXA_GPIO_TO_IRQ(8)
#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
#define PCMCIA_S0_RDYINT PXA_GPIO_TO_IRQ(19)
#define PCMCIA_S1_RDYINT PXA_GPIO_TO_IRQ(22)
/*
* Macros for LED Driver
*/
/* leds 0 = ON */
#define IDP_HB_LED (1<<5)
#define IDP_BUSY_LED (1<<6)
#define IDP_LEDS_MASK (IDP_HB_LED | IDP_BUSY_LED)
/*
* macros for MTD driver
*/
#define FLASH_WRITE_PROTECT_DISABLE() ((IDP_CPLD_FLASH_WE) &= ~(0x1))
#define FLASH_WRITE_PROTECT_ENABLE() ((IDP_CPLD_FLASH_WE) |= (0x1))
/*
* macros for matrix keyboard driver
*/
#define KEYBD_MATRIX_NUMBER_INPUTS 7
#define KEYBD_MATRIX_NUMBER_OUTPUTS 14
#define KEYBD_MATRIX_INVERT_OUTPUT_LOGIC FALSE
#define KEYBD_MATRIX_INVERT_INPUT_LOGIC FALSE
#define KEYBD_MATRIX_SETTLING_TIME_US 100
#define KEYBD_MATRIX_KEYSTATE_DEBOUNCE_CONSTANT 2
#define KEYBD_MATRIX_SET_OUTPUTS(outputs) \
{\
IDP_CPLD_KB_COL_LOW = outputs;\
IDP_CPLD_KB_COL_HIGH = outputs >> 7;\
}
#define KEYBD_MATRIX_GET_INPUTS(inputs) \
{\
inputs = (IDP_CPLD_KB_ROW & 0x7f);\
}

462
arch/arm/mach-pxa/littleton.c
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@ -1,462 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/littleton.c
*
* Support for the Marvell Littleton Development Platform.
*
* Author: Jason Chagas (largely modified code)
* Created: Nov 20, 2006
* Copyright: (C) Copyright 2006 Marvell International Ltd.
*
* 2007-11-22 modified to align with latest kernel
* eric miao <eric.miao@marvell.com>
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/gpio/machine.h>
#include <linux/spi/spi.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/smc91x.h>
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/mfd/da903x.h>
#include <linux/platform_data/max732x.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/types.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include "pxa300.h"
#include "devices.h"
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/keypad-pxa27x.h>
#include "littleton.h"
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#include "generic.h"
/* Littleton MFP configurations */
static mfp_cfg_t littleton_mfp_cfg[] __initdata = {
/* LCD */
GPIO54_LCD_LDD_0,
GPIO55_LCD_LDD_1,
GPIO56_LCD_LDD_2,
GPIO57_LCD_LDD_3,
GPIO58_LCD_LDD_4,
GPIO59_LCD_LDD_5,
GPIO60_LCD_LDD_6,
GPIO61_LCD_LDD_7,
GPIO62_LCD_LDD_8,
GPIO63_LCD_LDD_9,
GPIO64_LCD_LDD_10,
GPIO65_LCD_LDD_11,
GPIO66_LCD_LDD_12,
GPIO67_LCD_LDD_13,
GPIO68_LCD_LDD_14,
GPIO69_LCD_LDD_15,
GPIO70_LCD_LDD_16,
GPIO71_LCD_LDD_17,
GPIO72_LCD_FCLK,
GPIO73_LCD_LCLK,
GPIO74_LCD_PCLK,
GPIO75_LCD_BIAS,
/* SSP2 */
GPIO25_SSP2_SCLK,
GPIO27_SSP2_TXD,
GPIO17_GPIO, /* SFRM as chip-select */
/* Debug Ethernet */
GPIO90_GPIO,
/* Keypad */
GPIO107_KP_DKIN_0,
GPIO108_KP_DKIN_1,
GPIO115_KP_MKIN_0,
GPIO116_KP_MKIN_1,
GPIO117_KP_MKIN_2,
GPIO118_KP_MKIN_3,
GPIO119_KP_MKIN_4,
GPIO120_KP_MKIN_5,
GPIO121_KP_MKOUT_0,
GPIO122_KP_MKOUT_1,
GPIO123_KP_MKOUT_2,
GPIO124_KP_MKOUT_3,
GPIO125_KP_MKOUT_4,
/* MMC1 */
GPIO3_MMC1_DAT0,
GPIO4_MMC1_DAT1,
GPIO5_MMC1_DAT2,
GPIO6_MMC1_DAT3,
GPIO7_MMC1_CLK,
GPIO8_MMC1_CMD,
GPIO15_GPIO, /* card detect */
/* UART3 */
GPIO107_UART3_CTS,
GPIO108_UART3_RTS,
GPIO109_UART3_TXD,
GPIO110_UART3_RXD,
};
static struct resource smc91x_resources[] = {
[0] = {
.start = (LITTLETON_ETH_PHYS + 0x300),
.end = (LITTLETON_ETH_PHYS + 0xfffff),
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
.end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
}
};
static struct smc91x_platdata littleton_smc91x_info = {
.flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT |
SMC91X_NOWAIT | SMC91X_USE_DMA,
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
.dev = {
.platform_data = &littleton_smc91x_info,
},
};
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = {
[0] = {
/* VGA */
.pixclock = 38250,
.xres = 480,
.yres = 640,
.bpp = 16,
.hsync_len = 8,
.left_margin = 8,
.right_margin = 24,
.vsync_len = 2,
.upper_margin = 2,
.lower_margin = 4,
.sync = 0,
},
[1] = {
/* QVGA */
.pixclock = 153000,
.xres = 240,
.yres = 320,
.bpp = 16,
.hsync_len = 8,
.left_margin = 8,
.right_margin = 88,
.vsync_len = 2,
.upper_margin = 2,
.lower_margin = 2,
.sync = 0,
},
};
static struct pxafb_mach_info littleton_lcd_info = {
.modes = tpo_tdo24mtea1_modes,
.num_modes = 2,
.lcd_conn = LCD_COLOR_TFT_16BPP,
};
static void __init littleton_init_lcd(void)
{
pxa_set_fb_info(NULL, &littleton_lcd_info);
}
#else
static inline void littleton_init_lcd(void) {};
#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
static struct pxa2xx_spi_controller littleton_spi_info = {
.num_chipselect = 1,
};
static struct pxa2xx_spi_chip littleton_tdo24m_chip = {
.rx_threshold = 1,
.tx_threshold = 1,
};
static struct spi_board_info littleton_spi_devices[] __initdata = {
{
.modalias = "tdo24m",
.max_speed_hz = 1000000,
.bus_num = 2,
.chip_select = 0,
.controller_data= &littleton_tdo24m_chip,
},
};
static struct gpiod_lookup_table littleton_spi_gpio_table = {
.dev_id = "spi2",
.table = {
GPIO_LOOKUP_IDX("gpio-pxa", LITTLETON_GPIO_LCD_CS, "cs", 0, GPIO_ACTIVE_LOW),
{ },
},
};
static void __init littleton_init_spi(void)
{
gpiod_add_lookup_table(&littleton_spi_gpio_table);
pxa2xx_set_spi_info(2, &littleton_spi_info);
spi_register_board_info(ARRAY_AND_SIZE(littleton_spi_devices));
}
#else
static inline void littleton_init_spi(void) {}
#endif
#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
static const unsigned int littleton_matrix_key_map[] = {
/* KEY(row, col, key_code) */
KEY(1, 3, KEY_0), KEY(0, 0, KEY_1), KEY(1, 0, KEY_2), KEY(2, 0, KEY_3),
KEY(0, 1, KEY_4), KEY(1, 1, KEY_5), KEY(2, 1, KEY_6), KEY(0, 2, KEY_7),
KEY(1, 2, KEY_8), KEY(2, 2, KEY_9),
KEY(0, 3, KEY_KPASTERISK), /* * */
KEY(2, 3, KEY_KPDOT), /* # */
KEY(5, 4, KEY_ENTER),
KEY(5, 0, KEY_UP),
KEY(5, 1, KEY_DOWN),
KEY(5, 2, KEY_LEFT),
KEY(5, 3, KEY_RIGHT),
KEY(3, 2, KEY_HOME),
KEY(4, 1, KEY_END),
KEY(3, 3, KEY_BACK),
KEY(4, 0, KEY_SEND),
KEY(4, 2, KEY_VOLUMEUP),
KEY(4, 3, KEY_VOLUMEDOWN),
KEY(3, 0, KEY_F22), /* soft1 */
KEY(3, 1, KEY_F23), /* soft2 */
};
static struct matrix_keymap_data littleton_matrix_keymap_data = {
.keymap = littleton_matrix_key_map,
.keymap_size = ARRAY_SIZE(littleton_matrix_key_map),
};
static struct pxa27x_keypad_platform_data littleton_keypad_info = {
.matrix_key_rows = 6,
.matrix_key_cols = 5,
.matrix_keymap_data = &littleton_matrix_keymap_data,
.enable_rotary0 = 1,
.rotary0_up_key = KEY_UP,
.rotary0_down_key = KEY_DOWN,
.debounce_interval = 30,
};
static void __init littleton_init_keypad(void)
{
pxa_set_keypad_info(&littleton_keypad_info);
}
#else
static inline void littleton_init_keypad(void) {}
#endif
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
static struct pxamci_platform_data littleton_mci_platform_data = {
.detect_delay_ms = 200,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
};
static struct gpiod_lookup_table littleton_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
/* Card detect on MFP (gpio-pxa) GPIO 15 */
GPIO_LOOKUP("gpio-pxa", MFP_PIN_GPIO15,
"cd", GPIO_ACTIVE_LOW),
{ },
},
};
static void __init littleton_init_mmc(void)
{
gpiod_add_lookup_table(&littleton_mci_gpio_table);
pxa_set_mci_info(&littleton_mci_platform_data);
}
#else
static inline void littleton_init_mmc(void) {}
#endif
#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
static struct mtd_partition littleton_nand_partitions[] = {
[0] = {
.name = "Bootloader",
.offset = 0,
.size = 0x060000,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
[1] = {
.name = "Kernel",
.offset = 0x060000,
.size = 0x200000,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
[2] = {
.name = "Filesystem",
.offset = 0x0260000,
.size = 0x3000000, /* 48M - rootfs */
},
[3] = {
.name = "MassStorage",
.offset = 0x3260000,
.size = 0x3d40000,
},
[4] = {
.name = "BBT",
.offset = 0x6FA0000,
.size = 0x80000,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
/* NOTE: we reserve some blocks at the end of the NAND flash for
* bad block management, and the max number of relocation blocks
* differs on different platforms. Please take care with it when
* defining the partition table.
*/
};
static struct pxa3xx_nand_platform_data littleton_nand_info = {
.parts = littleton_nand_partitions,
.nr_parts = ARRAY_SIZE(littleton_nand_partitions),
};
static void __init littleton_init_nand(void)
{
pxa3xx_set_nand_info(&littleton_nand_info);
}
#else
static inline void littleton_init_nand(void) {}
#endif /* IS_ENABLED(CONFIG_MTD_NAND_MARVELL) */
#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
static struct led_info littleton_da9034_leds[] = {
[0] = {
.name = "littleton:keypad1",
.flags = DA9034_LED_RAMP,
},
[1] = {
.name = "littleton:keypad2",
.flags = DA9034_LED_RAMP,
},
[2] = {
.name = "littleton:vibra",
.flags = 0,
},
};
static struct da9034_touch_pdata littleton_da9034_touch = {
.x_inverted = 1,
.interval_ms = 20,
};
static struct da903x_subdev_info littleton_da9034_subdevs[] = {
{
.name = "da903x-led",
.id = DA9034_ID_LED_1,
.platform_data = &littleton_da9034_leds[0],
}, {
.name = "da903x-led",
.id = DA9034_ID_LED_2,
.platform_data = &littleton_da9034_leds[1],
}, {
.name = "da903x-led",
.id = DA9034_ID_VIBRA,
.platform_data = &littleton_da9034_leds[2],
}, {
.name = "da903x-backlight",
.id = DA9034_ID_WLED,
}, {
.name = "da9034-touch",
.id = DA9034_ID_TOUCH,
.platform_data = &littleton_da9034_touch,
},
};
static struct da903x_platform_data littleton_da9034_info = {
.num_subdevs = ARRAY_SIZE(littleton_da9034_subdevs),
.subdevs = littleton_da9034_subdevs,
};
static struct max732x_platform_data littleton_max7320_info = {
.gpio_base = EXT0_GPIO_BASE,
};
static struct i2c_board_info littleton_i2c_info[] = {
[0] = {
.type = "da9034",
.addr = 0x34,
.platform_data = &littleton_da9034_info,
.irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO18)),
},
[1] = {
.type = "max7320",
.addr = 0x50,
.platform_data = &littleton_max7320_info,
},
};
static void __init littleton_init_i2c(void)
{
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(littleton_i2c_info));
}
#else
static inline void littleton_init_i2c(void) {}
#endif /* CONFIG_I2C_PXA || CONFIG_I2C_PXA_MODULE */
static void __init littleton_init(void)
{
/* initialize MFP configurations */
pxa3xx_mfp_config(ARRAY_AND_SIZE(littleton_mfp_cfg));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
/*
* Note: we depend bootloader set the correct
* value to MSC register for SMC91x.
*/
platform_device_register(&smc91x_device);
littleton_init_spi();
littleton_init_i2c();
littleton_init_mmc();
littleton_init_lcd();
littleton_init_keypad();
littleton_init_nand();
}
MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)")
.atag_offset = 0x100,
.map_io = pxa3xx_map_io,
.nr_irqs = LITTLETON_NR_IRQS,
.init_irq = pxa3xx_init_irq,
.handle_irq = pxa3xx_handle_irq,
.init_time = pxa_timer_init,
.init_machine = littleton_init,
.restart = pxa_restart,
MACHINE_END

14
arch/arm/mach-pxa/littleton.h
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_ARCH_LITTLETON_H
#define __ASM_ARCH_LITTLETON_H
#define LITTLETON_ETH_PHYS 0x30000000
#define LITTLETON_GPIO_LCD_CS (17)
#define EXT0_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x))
#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8)
#endif /* __ASM_ARCH_LITTLETON_H */

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arch/arm/mach-pxa/lpd270.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/lpd270.c
*
* Support for the LogicPD PXA270 Card Engine.
* Derived from the mainstone code, which carries these notices:
*
* Author: Nicolas Pitre
* Created: Nov 05, 2002
* Copyright: MontaVista Software Inc.
*/
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/syscore_ops.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/bitops.h>
#include <linux/fb.h>
#include <linux/ioport.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/smc91x.h>
#include <asm/types.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <linux/sizes.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/flash.h>
#include "pxa27x.h"
#include "lpd270.h"
#include "addr-map.h"
#include <linux/platform_data/asoc-pxa.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/irda-pxaficp.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include "smemc.h"
#include "generic.h"
#include "devices.h"
static unsigned long lpd270_pin_config[] __initdata = {
/* Chip Selects */
GPIO15_nCS_1, /* Mainboard Flash */
GPIO78_nCS_2, /* CPLD + Ethernet */
/* LCD - 16bpp Active TFT */
GPIO58_LCD_LDD_0,
GPIO59_LCD_LDD_1,
GPIO60_LCD_LDD_2,
GPIO61_LCD_LDD_3,
GPIO62_LCD_LDD_4,
GPIO63_LCD_LDD_5,
GPIO64_LCD_LDD_6,
GPIO65_LCD_LDD_7,
GPIO66_LCD_LDD_8,
GPIO67_LCD_LDD_9,
GPIO68_LCD_LDD_10,
GPIO69_LCD_LDD_11,
GPIO70_LCD_LDD_12,
GPIO71_LCD_LDD_13,
GPIO72_LCD_LDD_14,
GPIO73_LCD_LDD_15,
GPIO74_LCD_FCLK,
GPIO75_LCD_LCLK,
GPIO76_LCD_PCLK,
GPIO77_LCD_BIAS,
GPIO16_PWM0_OUT, /* Backlight */
/* USB Host */
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO45_AC97_SYSCLK,
GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
};
static unsigned int lpd270_irq_enabled;
static void lpd270_mask_irq(struct irq_data *d)
{
int lpd270_irq = d->irq - LPD270_IRQ(0);
__raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
lpd270_irq_enabled &= ~(1 << lpd270_irq);
__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
}
static void lpd270_unmask_irq(struct irq_data *d)
{
int lpd270_irq = d->irq - LPD270_IRQ(0);
lpd270_irq_enabled |= 1 << lpd270_irq;
__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
}
static struct irq_chip lpd270_irq_chip = {
.name = "CPLD",
.irq_ack = lpd270_mask_irq,
.irq_mask = lpd270_mask_irq,
.irq_unmask = lpd270_unmask_irq,
};
static void lpd270_irq_handler(struct irq_desc *desc)
{
unsigned int irq;
unsigned long pending;
pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
do {
/* clear useless edge notification */
desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = LPD270_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
pending = __raw_readw(LPD270_INT_STATUS) &
lpd270_irq_enabled;
}
} while (pending);
}
static void __init lpd270_init_irq(void)
{
int irq;
pxa27x_init_irq();
__raw_writew(0, LPD270_INT_MASK);
__raw_writew(0, LPD270_INT_STATUS);
/* setup extra LogicPD PXA270 irqs */
for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
irq_set_chip_and_handler(irq, &lpd270_irq_chip,
handle_level_irq);
irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
}
irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler);
irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
}
#ifdef CONFIG_PM
static void lpd270_irq_resume(void)
{
__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
}
static struct syscore_ops lpd270_irq_syscore_ops = {
.resume = lpd270_irq_resume,
};
static int __init lpd270_irq_device_init(void)
{
if (machine_is_logicpd_pxa270()) {
register_syscore_ops(&lpd270_irq_syscore_ops);
return 0;
}
return -ENODEV;
}
device_initcall(lpd270_irq_device_init);
#endif
static struct resource smc91x_resources[] = {
[0] = {
.start = LPD270_ETH_PHYS,
.end = (LPD270_ETH_PHYS + 0xfffff),
.flags = IORESOURCE_MEM,
},
[1] = {
.start = LPD270_ETHERNET_IRQ,
.end = LPD270_ETHERNET_IRQ,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
},
};
struct smc91x_platdata smc91x_platdata = {
.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
.dev.platform_data = &smc91x_platdata,
};
static struct resource lpd270_flash_resources[] = {
[0] = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_64M - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PXA_CS1_PHYS,
.end = PXA_CS1_PHYS + SZ_64M - 1,
.flags = IORESOURCE_MEM,
},
};
static struct mtd_partition lpd270_flash0_partitions[] = {
{
.name = "Bootloader",
.size = 0x00040000,
.offset = 0,
.mask_flags = MTD_WRITEABLE /* force read-only */
}, {
.name = "Kernel",
.size = 0x00400000,
.offset = 0x00040000,
}, {
.name = "Filesystem",
.size = MTDPART_SIZ_FULL,
.offset = 0x00440000
},
};
static struct flash_platform_data lpd270_flash_data[2] = {
{
.name = "processor-flash",
.map_name = "cfi_probe",
.parts = lpd270_flash0_partitions,
.nr_parts = ARRAY_SIZE(lpd270_flash0_partitions),
}, {
.name = "mainboard-flash",
.map_name = "cfi_probe",
.parts = NULL,
.nr_parts = 0,
}
};
static struct platform_device lpd270_flash_device[2] = {
{
.name = "pxa2xx-flash",
.id = 0,
.dev = {
.platform_data = &lpd270_flash_data[0],
},
.resource = &lpd270_flash_resources[0],
.num_resources = 1,
}, {
.name = "pxa2xx-flash",
.id = 1,
.dev = {
.platform_data = &lpd270_flash_data[1],
},
.resource = &lpd270_flash_resources[1],
.num_resources = 1,
},
};
static struct pwm_lookup lpd270_pwm_lookup[] = {
PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 78770,
PWM_POLARITY_NORMAL),
};
static struct platform_pwm_backlight_data lpd270_backlight_data = {
.max_brightness = 1,
.dft_brightness = 1,
};
static struct platform_device lpd270_backlight_device = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa27x_device_pwm0.dev,
.platform_data = &lpd270_backlight_data,
},
};
/* 5.7" TFT QVGA (LoLo display number 1) */
static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
.pixclock = 150000,
.xres = 320,
.yres = 240,
.bpp = 16,
.hsync_len = 0x14,
.left_margin = 0x28,
.right_margin = 0x0a,
.vsync_len = 0x02,
.upper_margin = 0x08,
.lower_margin = 0x14,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
};
static struct pxafb_mach_info sharp_lq057q3dc02 = {
.modes = &sharp_lq057q3dc02_mode,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
LCD_ALTERNATE_MAPPING,
};
/* 12.1" TFT SVGA (LoLo display number 2) */
static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
.pixclock = 50000,
.xres = 800,
.yres = 600,
.bpp = 16,
.hsync_len = 0x05,
.left_margin = 0x52,
.right_margin = 0x05,
.vsync_len = 0x04,
.upper_margin = 0x14,
.lower_margin = 0x0a,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
};
static struct pxafb_mach_info sharp_lq121s1dg31 = {
.modes = &sharp_lq121s1dg31_mode,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
LCD_ALTERNATE_MAPPING,
};
/* 3.6" TFT QVGA (LoLo display number 3) */
static struct pxafb_mode_info sharp_lq036q1da01_mode = {
.pixclock = 150000,
.xres = 320,
.yres = 240,
.bpp = 16,
.hsync_len = 0x0e,
.left_margin = 0x04,
.right_margin = 0x0a,
.vsync_len = 0x03,
.upper_margin = 0x03,
.lower_margin = 0x03,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
};
static struct pxafb_mach_info sharp_lq036q1da01 = {
.modes = &sharp_lq036q1da01_mode,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
LCD_ALTERNATE_MAPPING,
};
/* 6.4" TFT VGA (LoLo display number 5) */
static struct pxafb_mode_info sharp_lq64d343_mode = {
.pixclock = 25000,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 0x31,
.left_margin = 0x89,
.right_margin = 0x19,
.vsync_len = 0x12,
.upper_margin = 0x22,
.lower_margin = 0x00,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
};
static struct pxafb_mach_info sharp_lq64d343 = {
.modes = &sharp_lq64d343_mode,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
LCD_ALTERNATE_MAPPING,
};
/* 10.4" TFT VGA (LoLo display number 7) */
static struct pxafb_mode_info sharp_lq10d368_mode = {
.pixclock = 25000,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 0x31,
.left_margin = 0x89,
.right_margin = 0x19,
.vsync_len = 0x12,
.upper_margin = 0x22,
.lower_margin = 0x00,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
};
static struct pxafb_mach_info sharp_lq10d368 = {
.modes = &sharp_lq10d368_mode,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
LCD_ALTERNATE_MAPPING,
};
/* 3.5" TFT QVGA (LoLo display number 8) */
static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
.pixclock = 150000,
.xres = 240,
.yres = 320,
.bpp = 16,
.hsync_len = 0x0e,
.left_margin = 0x0a,
.right_margin = 0x0a,
.vsync_len = 0x03,
.upper_margin = 0x05,
.lower_margin = 0x14,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
};
static struct pxafb_mach_info sharp_lq035q7db02_20 = {
.modes = &sharp_lq035q7db02_20_mode,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
LCD_ALTERNATE_MAPPING,
};
static struct pxafb_mach_info *lpd270_lcd_to_use;
static int __init lpd270_set_lcd(char *str)
{
if (!strncasecmp(str, "lq057q3dc02", 11)) {
lpd270_lcd_to_use = &sharp_lq057q3dc02;
} else if (!strncasecmp(str, "lq121s1dg31", 11)) {
lpd270_lcd_to_use = &sharp_lq121s1dg31;
} else if (!strncasecmp(str, "lq036q1da01", 11)) {
lpd270_lcd_to_use = &sharp_lq036q1da01;
} else if (!strncasecmp(str, "lq64d343", 8)) {
lpd270_lcd_to_use = &sharp_lq64d343;
} else if (!strncasecmp(str, "lq10d368", 8)) {
lpd270_lcd_to_use = &sharp_lq10d368;
} else if (!strncasecmp(str, "lq035q7db02-20", 14)) {
lpd270_lcd_to_use = &sharp_lq035q7db02_20;
} else {
printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
}
return 1;
}
__setup("lcd=", lpd270_set_lcd);
static struct platform_device *platform_devices[] __initdata = {
&smc91x_device,
&lpd270_backlight_device,
&lpd270_flash_device[0],
&lpd270_flash_device[1],
};
static struct pxaohci_platform_data lpd270_ohci_platform_data = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
};
static void __init lpd270_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
lpd270_flash_data[1].width = 4;
/*
* System bus arbiter setting:
* - Core_Park
* - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
*/
ARB_CNTRL = ARB_CORE_PARK | 0x234;
pwm_add_table(lpd270_pwm_lookup, ARRAY_SIZE(lpd270_pwm_lookup));
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
pxa_set_ac97_info(NULL);
if (lpd270_lcd_to_use != NULL)
pxa_set_fb_info(NULL, lpd270_lcd_to_use);
pxa_set_ohci_info(&lpd270_ohci_platform_data);
}
static struct map_desc lpd270_io_desc[] __initdata = {
{
.virtual = (unsigned long)LPD270_CPLD_VIRT,
.pfn = __phys_to_pfn(LPD270_CPLD_PHYS),
.length = LPD270_CPLD_SIZE,
.type = MT_DEVICE,
},
};
static void __init lpd270_map_io(void)
{
pxa27x_map_io();
iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
/* for use I SRAM as framebuffer. */
PSLR |= 0x00000F04;
PCFR = 0x00000066;
}
MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
/* Maintainer: Peter Barada */
.atag_offset = 0x100,
.map_io = lpd270_map_io,
.nr_irqs = LPD270_NR_IRQS,
.init_irq = lpd270_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = lpd270_init,
.restart = pxa_restart,
MACHINE_END

40
arch/arm/mach-pxa/lpd270.h
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@ -1,40 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* arch/arm/mach-pxa/include/mach/lpd270.h
*
* Author: Lennert Buytenhek
* Created: Feb 10, 2006
*/
#ifndef __ASM_ARCH_LPD270_H
#define __ASM_ARCH_LPD270_H
#define LPD270_CPLD_PHYS PXA_CS2_PHYS
#define LPD270_CPLD_VIRT IOMEM(0xf0000000)
#define LPD270_CPLD_SIZE 0x00100000
#define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000)
/* CPLD registers */
#define LPD270_CPLD_REG(x) (LPD270_CPLD_VIRT + (x))
#define LPD270_CONTROL LPD270_CPLD_REG(0x00)
#define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04)
#define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08)
#define LPD270_CPLD_REVISION LPD270_CPLD_REG(0x14)
#define LPD270_EEPROM_SPI_ITF LPD270_CPLD_REG(0x20)
#define LPD270_MODE_PINS LPD270_CPLD_REG(0x24)
#define LPD270_EGPIO LPD270_CPLD_REG(0x30)
#define LPD270_INT_MASK LPD270_CPLD_REG(0x40)
#define LPD270_INT_STATUS LPD270_CPLD_REG(0x50)
#define LPD270_INT_AC97 (1 << 4) /* AC'97 CODEC IRQ */
#define LPD270_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */
#define LPD270_INT_USBC (1 << 2) /* USB client cable detection IRQ */
#define LPD270_IRQ(x) (IRQ_BOARD_START + (x))
#define LPD270_USBC_IRQ LPD270_IRQ(2)
#define LPD270_ETHERNET_IRQ LPD270_IRQ(3)
#define LPD270_AC97_IRQ LPD270_IRQ(4)
#define LPD270_NR_IRQS (IRQ_BOARD_START + 5)
#endif

649
arch/arm/mach-pxa/lubbock.c
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@ -1,649 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/lubbock.c
*
* Support for the Intel DBPXA250 Development Platform.
*
* Author: Nicolas Pitre
* Created: Jun 15, 2001
* Copyright: MontaVista Software Inc.
*/
#include <linux/clkdev.h>
#include <linux/gpio.h>
#include <linux/gpio/gpio-reg.h>
#include <linux/gpio/machine.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/syscore_ops.h>
#include <linux/major.h>
#include <linux/fb.h>
#include <linux/interrupt.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/smc91x.h>
#include <linux/slab.h>
#include <linux/leds.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/pxa2xx_spi.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <linux/sizes.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/flash.h>
#include <asm/hardware/sa1111.h>
#include "pxa25x.h"
#include <linux/platform_data/asoc-pxa.h>
#include "lubbock.h"
#include "udc.h"
#include <linux/platform_data/irda-pxaficp.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include "pm.h"
#include "smemc.h"
#include "generic.h"
#include "devices.h"
static unsigned long lubbock_pin_config[] __initdata = {
GPIO15_nCS_1, /* CS1 - Flash */
GPIO78_nCS_2, /* CS2 - Baseboard FGPA */
GPIO79_nCS_3, /* CS3 - SMC ethernet */
GPIO80_nCS_4, /* CS4 - SA1111 */
/* SSP data pins */
GPIO23_SSP1_SCLK,
GPIO25_SSP1_TXD,
GPIO26_SSP1_RXD,
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
/* LCD - 16bpp DSTN */
GPIOxx_LCD_DSTN_16BPP,
/* BTUART */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
/* PC Card */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO52_nPCE_1,
GPIO53_nPCE_2,
GPIO54_nPSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
/* MMC */
GPIO6_MMC_CLK,
GPIO8_MMC_CS0,
/* SA1111 chip */
GPIO11_3_6MHz,
/* wakeup */
GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
};
#define LUB_HEXLED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x010)
void lubbock_set_hexled(uint32_t value)
{
LUB_HEXLED = value;
}
static struct gpio_chip *lubbock_misc_wr_gc;
static void lubbock_set_misc_wr(unsigned int mask, unsigned int set)
{
unsigned long m = mask, v = set;
lubbock_misc_wr_gc->set_multiple(lubbock_misc_wr_gc, &m, &v);
}
static int lubbock_udc_is_connected(void)
{
return (LUB_MISC_RD & (1 << 9)) == 0;
}
static struct pxa2xx_udc_mach_info udc_info __initdata = {
.udc_is_connected = lubbock_udc_is_connected,
// no D+ pullup; lubbock can't connect/disconnect in software
};
static struct resource lubbock_udc_resources[] = {
DEFINE_RES_MEM(0x40600000, 0x10000),
DEFINE_RES_IRQ(IRQ_USB),
DEFINE_RES_IRQ(LUBBOCK_USB_IRQ),
DEFINE_RES_IRQ(LUBBOCK_USB_DISC_IRQ),
};
/* GPIOs for SA1111 PCMCIA */
static struct gpiod_lookup_table sa1111_pcmcia_gpio_table = {
.dev_id = "1800",
.table = {
{ "sa1111", 0, "a0vpp", GPIO_ACTIVE_HIGH },
{ "sa1111", 1, "a1vpp", GPIO_ACTIVE_HIGH },
{ "sa1111", 2, "a0vcc", GPIO_ACTIVE_HIGH },
{ "sa1111", 3, "a1vcc", GPIO_ACTIVE_HIGH },
{ "lubbock", 14, "b0vcc", GPIO_ACTIVE_HIGH },
{ "lubbock", 15, "b1vcc", GPIO_ACTIVE_HIGH },
{ },
},
};
static void lubbock_init_pcmcia(void)
{
struct clk *clk;
gpiod_add_lookup_table(&sa1111_pcmcia_gpio_table);
/* Add an alias for the SA1111 PCMCIA clock */
clk = clk_get_sys("pxa2xx-pcmcia", NULL);
if (!IS_ERR(clk)) {
clkdev_create(clk, NULL, "1800");
clk_put(clk);
}
}
static struct resource sa1111_resources[] = {
[0] = {
.start = 0x10000000,
.end = 0x10001fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = LUBBOCK_SA1111_IRQ,
.end = LUBBOCK_SA1111_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct sa1111_platform_data sa1111_info = {
.irq_base = LUBBOCK_SA1111_IRQ_BASE,
.disable_devs = SA1111_DEVID_SAC,
};
static struct platform_device sa1111_device = {
.name = "sa1111",
.id = -1,
.num_resources = ARRAY_SIZE(sa1111_resources),
.resource = sa1111_resources,
.dev = {
.platform_data = &sa1111_info,
},
};
/* ADS7846 is connected through SSP ... and if your board has J5 populated,
* you can select it to replace the ucb1400 by switching the touchscreen cable
* (to J5) and poking board registers (as done below). Else it's only useful
* for the temperature sensors.
*/
static struct pxa2xx_spi_controller pxa_ssp_master_info = {
.num_chipselect = 1,
};
static int lubbock_ads7846_pendown_state(void)
{
/* TS_BUSY is bit 8 in LUB_MISC_RD, but pendown is irq-only */
return 0;
}
static struct ads7846_platform_data ads_info = {
.model = 7846,
.vref_delay_usecs = 100, /* internal, no cap */
.get_pendown_state = lubbock_ads7846_pendown_state,
// .x_plate_ohms = 500, /* GUESS! */
// .y_plate_ohms = 500, /* GUESS! */
};
static struct gpiod_lookup_table ads7846_cs_gpios = {
.dev_id = "ads7846",
.table = {
GPIO_LOOKUP("lubbock", 11, "cs", GPIO_ACTIVE_LOW),
{}
},
};
static struct pxa2xx_spi_chip ads_hw = {
.tx_threshold = 1,
.rx_threshold = 2,
};
static struct spi_board_info spi_board_info[] __initdata = { {
.modalias = "ads7846",
.platform_data = &ads_info,
.controller_data = &ads_hw,
.irq = LUBBOCK_BB_IRQ,
.max_speed_hz = 120000 /* max sample rate at 3V */
* 26 /* command + data + overhead */,
.bus_num = 1,
.chip_select = 0,
},
};
static struct resource smc91x_resources[] = {
[0] = {
.name = "smc91x-regs",
.start = 0x0c000c00,
.end = 0x0c0fffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = LUBBOCK_ETH_IRQ,
.end = LUBBOCK_ETH_IRQ,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
},
[2] = {
.name = "smc91x-attrib",
.start = 0x0e000000,
.end = 0x0e0fffff,
.flags = IORESOURCE_MEM,
},
};
static struct smc91x_platdata lubbock_smc91x_info = {
.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_IO_SHIFT_2,
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = -1,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
.dev = {
.platform_data = &lubbock_smc91x_info,
},
};
static struct resource flash_resources[] = {
[0] = {
.start = 0x00000000,
.end = SZ_64M - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0x04000000,
.end = 0x04000000 + SZ_64M - 1,
.flags = IORESOURCE_MEM,
},
};
static struct mtd_partition lubbock_partitions[] = {
{
.name = "Bootloader",
.size = 0x00040000,
.offset = 0,
.mask_flags = MTD_WRITEABLE /* force read-only */
},{
.name = "Kernel",
.size = 0x00100000,
.offset = 0x00040000,
},{
.name = "Filesystem",
.size = MTDPART_SIZ_FULL,
.offset = 0x00140000
}
};
static struct flash_platform_data lubbock_flash_data[2] = {
{
.map_name = "cfi_probe",
.parts = lubbock_partitions,
.nr_parts = ARRAY_SIZE(lubbock_partitions),
}, {
.map_name = "cfi_probe",
.parts = NULL,
.nr_parts = 0,
}
};
static struct platform_device lubbock_flash_device[2] = {
{
.name = "pxa2xx-flash",
.id = 0,
.dev = {
.platform_data = &lubbock_flash_data[0],
},
.resource = &flash_resources[0],
.num_resources = 1,
},
{
.name = "pxa2xx-flash",
.id = 1,
.dev = {
.platform_data = &lubbock_flash_data[1],
},
.resource = &flash_resources[1],
.num_resources = 1,
},
};
static struct resource lubbock_cplds_resources[] = {
[0] = {
.start = LUBBOCK_FPGA_PHYS + 0xc0,
.end = LUBBOCK_FPGA_PHYS + 0xe0 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PXA_GPIO_TO_IRQ(0),
.end = PXA_GPIO_TO_IRQ(0),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
},
[2] = {
.start = LUBBOCK_IRQ(0),
.end = LUBBOCK_IRQ(6),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device lubbock_cplds_device = {
.name = "pxa_cplds_irqs",
.id = -1,
.resource = &lubbock_cplds_resources[0],
.num_resources = 3,
};
static struct platform_device *devices[] __initdata = {
&sa1111_device,
&smc91x_device,
&lubbock_flash_device[0],
&lubbock_flash_device[1],
&lubbock_cplds_device,
};
static struct pxafb_mode_info sharp_lm8v31_mode = {
.pixclock = 270000,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 1,
.left_margin = 3,
.right_margin = 3,
.vsync_len = 1,
.upper_margin = 0,
.lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.cmap_greyscale = 0,
};
static struct pxafb_mach_info sharp_lm8v31 = {
.modes = &sharp_lm8v31_mode,
.num_modes = 1,
.cmap_inverse = 0,
.cmap_static = 0,
.lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL |
LCD_AC_BIAS_FREQ(255),
};
#define MMC_POLL_RATE msecs_to_jiffies(1000)
static irq_handler_t mmc_detect_int;
static void *mmc_detect_int_data;
static struct timer_list mmc_timer;
static void lubbock_mmc_poll(struct timer_list *unused)
{
unsigned long flags;
/* clear any previous irq state, then ... */
local_irq_save(flags);
LUB_IRQ_SET_CLR &= ~(1 << 0);
local_irq_restore(flags);
/* poll until mmc/sd card is removed */
if (LUB_IRQ_SET_CLR & (1 << 0))
mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE);
else {
(void) mmc_detect_int(LUBBOCK_SD_IRQ, mmc_detect_int_data);
enable_irq(LUBBOCK_SD_IRQ);
}
}
static irqreturn_t lubbock_detect_int(int irq, void *data)
{
/* IRQ is level triggered; disable, and poll for removal */
disable_irq(irq);
mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE);
return mmc_detect_int(irq, data);
}
static int lubbock_mci_init(struct device *dev,
irq_handler_t detect_int,
void *data)
{
/* detect card insert/eject */
mmc_detect_int = detect_int;
mmc_detect_int_data = data;
timer_setup(&mmc_timer, lubbock_mmc_poll, 0);
return request_irq(LUBBOCK_SD_IRQ, lubbock_detect_int,
0, "lubbock-sd-detect", data);
}
static int lubbock_mci_get_ro(struct device *dev)
{
return (LUB_MISC_RD & (1 << 2)) != 0;
}
static void lubbock_mci_exit(struct device *dev, void *data)
{
free_irq(LUBBOCK_SD_IRQ, data);
del_timer_sync(&mmc_timer);
}
static struct pxamci_platform_data lubbock_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.detect_delay_ms = 10,
.init = lubbock_mci_init,
.get_ro = lubbock_mci_get_ro,
.exit = lubbock_mci_exit,
};
static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
{
unsigned long flags;
local_irq_save(flags);
if (mode & IR_SIRMODE) {
lubbock_set_misc_wr(BIT(4), 0);
} else if (mode & IR_FIRMODE) {
lubbock_set_misc_wr(BIT(4), BIT(4));
}
pxa2xx_transceiver_mode(dev, mode);
local_irq_restore(flags);
}
static struct pxaficp_platform_data lubbock_ficp_platform_data = {
.gpio_pwdown = -1,
.transceiver_cap = IR_SIRMODE | IR_FIRMODE,
.transceiver_mode = lubbock_irda_transceiver_mode,
};
static void __init lubbock_init(void)
{
int flashboot = (LUB_CONF_SWITCHES & 1);
pxa2xx_mfp_config(ARRAY_AND_SIZE(lubbock_pin_config));
lubbock_misc_wr_gc = gpio_reg_init(NULL, (void *)&LUB_MISC_WR,
-1, 16, "lubbock", 0, LUB_MISC_WR,
NULL, NULL, NULL);
if (IS_ERR(lubbock_misc_wr_gc)) {
pr_err("Lubbock: unable to register lubbock GPIOs: %ld\n",
PTR_ERR(lubbock_misc_wr_gc));
lubbock_misc_wr_gc = NULL;
}
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
lubbock_init_pcmcia();
clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL);
/* lubbock has two extra IRQs */
pxa25x_device_udc.resource = lubbock_udc_resources;
pxa25x_device_udc.num_resources = ARRAY_SIZE(lubbock_udc_resources);
pxa_set_udc_info(&udc_info);
pxa_set_fb_info(NULL, &sharp_lm8v31);
pxa_set_mci_info(&lubbock_mci_platform_data);
pxa_set_ficp_info(&lubbock_ficp_platform_data);
pxa_set_ac97_info(NULL);
lubbock_flash_data[0].width = lubbock_flash_data[1].width =
(__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
/* Compensate for the nROMBT switch which swaps the flash banks */
printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n",
flashboot?"Flash":"ROM", flashboot);
lubbock_flash_data[flashboot^1].name = "application-flash";
lubbock_flash_data[flashboot].name = "boot-rom";
(void) platform_add_devices(devices, ARRAY_SIZE(devices));
gpiod_add_lookup_table(&ads7846_cs_gpios);
pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
}
static struct map_desc lubbock_io_desc[] __initdata = {
{ /* CPLD */
.virtual = LUBBOCK_FPGA_VIRT,
.pfn = __phys_to_pfn(LUBBOCK_FPGA_PHYS),
.length = 0x00100000,
.type = MT_DEVICE
}
};
static void __init lubbock_map_io(void)
{
pxa25x_map_io();
iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc));
PCFR |= PCFR_OPDE;
}
/*
* Driver for the 8 discrete LEDs available for general use:
* Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays
* so be sure to not monkey with them here.
*/
#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
struct lubbock_led {
struct led_classdev cdev;
u8 mask;
};
/*
* The triggers lines up below will only be used if the
* LED triggers are compiled in.
*/
static const struct {
const char *name;
const char *trigger;
} lubbock_leds[] = {
{ "lubbock:D28", "default-on", },
{ "lubbock:D27", "cpu0", },
{ "lubbock:D26", "heartbeat" },
{ "lubbock:D25", },
{ "lubbock:D24", },
{ "lubbock:D23", },
{ "lubbock:D22", },
{ "lubbock:D21", },
};
static void lubbock_led_set(struct led_classdev *cdev,
enum led_brightness b)
{
struct lubbock_led *led = container_of(cdev,
struct lubbock_led, cdev);
u32 reg = LUB_DISC_BLNK_LED;
if (b != LED_OFF)
reg |= led->mask;
else
reg &= ~led->mask;
LUB_DISC_BLNK_LED = reg;
}
static enum led_brightness lubbock_led_get(struct led_classdev *cdev)
{
struct lubbock_led *led = container_of(cdev,
struct lubbock_led, cdev);
u32 reg = LUB_DISC_BLNK_LED;
return (reg & led->mask) ? LED_FULL : LED_OFF;
}
static int __init lubbock_leds_init(void)
{
int i;
if (!machine_is_lubbock())
return -ENODEV;
/* All ON */
LUB_DISC_BLNK_LED |= 0xff;
for (i = 0; i < ARRAY_SIZE(lubbock_leds); i++) {
struct lubbock_led *led;
led = kzalloc(sizeof(*led), GFP_KERNEL);
if (!led)
break;
led->cdev.name = lubbock_leds[i].name;
led->cdev.brightness_set = lubbock_led_set;
led->cdev.brightness_get = lubbock_led_get;
led->cdev.default_trigger = lubbock_leds[i].trigger;
led->mask = BIT(i);
if (led_classdev_register(NULL, &led->cdev) < 0) {
kfree(led);
break;
}
}
return 0;
}
/*
* Since we may have triggers on any subsystem, defer registration
* until after subsystem_init.
*/
fs_initcall(lubbock_leds_init);
#endif
MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)")
/* Maintainer: MontaVista Software Inc. */
.map_io = lubbock_map_io,
.nr_irqs = LUBBOCK_NR_IRQS,
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = lubbock_init,
.restart = pxa_restart,
MACHINE_END

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arch/arm/mach-pxa/lubbock.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Author: Nicolas Pitre
* Created: Jun 15, 2001
* Copyright: MontaVista Software Inc.
*/
#include "irqs.h"
#define LUBBOCK_ETH_PHYS PXA_CS3_PHYS
#define LUBBOCK_FPGA_PHYS PXA_CS2_PHYS
#define LUBBOCK_FPGA_VIRT (0xf0000000)
#define LUB_P2V(x) ((x) - LUBBOCK_FPGA_PHYS + LUBBOCK_FPGA_VIRT)
#define LUB_V2P(x) ((x) - LUBBOCK_FPGA_VIRT + LUBBOCK_FPGA_PHYS)
#ifndef __ASSEMBLY__
# define __LUB_REG(x) (*((volatile unsigned long *)LUB_P2V(x)))
#else
# define __LUB_REG(x) LUB_P2V(x)
#endif
/* FPGA register virtual addresses */
#define LUB_WHOAMI __LUB_REG(LUBBOCK_FPGA_PHYS + 0x000)
#define LUB_DISC_BLNK_LED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x040)
#define LUB_CONF_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x050)
#define LUB_USER_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x060)
#define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080)
#define LUB_MISC_RD __LUB_REG(LUBBOCK_FPGA_PHYS + 0x090)
#define LUB_IRQ_MASK_EN __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0c0)
#define LUB_IRQ_SET_CLR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0d0)
#define LUB_GP __LUB_REG(LUBBOCK_FPGA_PHYS + 0x100)
/* Board specific IRQs */
#define LUBBOCK_NR_IRQS IRQ_BOARD_START
#define LUBBOCK_IRQ(x) (LUBBOCK_NR_IRQS + (x))
#define LUBBOCK_SD_IRQ LUBBOCK_IRQ(0)
#define LUBBOCK_SA1111_IRQ LUBBOCK_IRQ(1)
#define LUBBOCK_USB_IRQ LUBBOCK_IRQ(2) /* usb connect */
#define LUBBOCK_ETH_IRQ LUBBOCK_IRQ(3)
#define LUBBOCK_UCB1400_IRQ LUBBOCK_IRQ(4)
#define LUBBOCK_BB_IRQ LUBBOCK_IRQ(5)
#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */
#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6)
#define LUBBOCK_SA1111_IRQ_BASE (LUBBOCK_NR_IRQS + 32)

1112
arch/arm/mach-pxa/magician.c
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arch/arm/mach-pxa/magician.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* GPIO and IRQ definitions for HTC Magician PDA phones
*
* Copyright (c) 2007 Philipp Zabel
*/
#ifndef _MAGICIAN_H_
#define _MAGICIAN_H_
#include <linux/gpio.h>
#include "irqs.h"
/*
* PXA GPIOs
*/
#define GPIO0_MAGICIAN_KEY_POWER 0
#define GPIO9_MAGICIAN_UNKNOWN 9
#define GPIO10_MAGICIAN_GSM_IRQ 10
#define GPIO11_MAGICIAN_GSM_OUT1 11
#define GPIO13_MAGICIAN_CPLD_IRQ 13
#define GPIO14_MAGICIAN_TSC2046_CS 14
#define GPIO18_MAGICIAN_UNKNOWN 18
#define GPIO22_MAGICIAN_VIBRA_EN 22
#define GPIO26_MAGICIAN_GSM_POWER 26
#define GPIO27_MAGICIAN_USBC_PUEN 27
#define GPIO30_MAGICIAN_BQ24022_nCHARGE_EN 30
#define GPIO37_MAGICIAN_KEY_HANGUP 37
#define GPIO38_MAGICIAN_KEY_CONTACTS 38
#define GPIO40_MAGICIAN_GSM_OUT2 40
#define GPIO48_MAGICIAN_UNKNOWN 48
#define GPIO56_MAGICIAN_UNKNOWN 56
#define GPIO57_MAGICIAN_CAM_RESET 57
#define GPIO75_MAGICIAN_SAMSUNG_POWER 75
#define GPIO83_MAGICIAN_nIR_EN 83
#define GPIO86_MAGICIAN_GSM_RESET 86
#define GPIO87_MAGICIAN_GSM_SELECT 87
#define GPIO90_MAGICIAN_KEY_CALENDAR 90
#define GPIO91_MAGICIAN_KEY_CAMERA 91
#define GPIO93_MAGICIAN_KEY_UP 93
#define GPIO94_MAGICIAN_KEY_DOWN 94
#define GPIO95_MAGICIAN_KEY_LEFT 95
#define GPIO96_MAGICIAN_KEY_RIGHT 96
#define GPIO97_MAGICIAN_KEY_ENTER 97
#define GPIO98_MAGICIAN_KEY_RECORD 98
#define GPIO99_MAGICIAN_HEADPHONE_IN 99
#define GPIO100_MAGICIAN_KEY_VOL_UP 100
#define GPIO101_MAGICIAN_KEY_VOL_DOWN 101
#define GPIO102_MAGICIAN_KEY_PHONE 102
#define GPIO103_MAGICIAN_LED_KP 103
#define GPIO104_MAGICIAN_LCD_VOFF_EN 104
#define GPIO105_MAGICIAN_LCD_VON_EN 105
#define GPIO106_MAGICIAN_LCD_DCDC_NRESET 106
#define GPIO107_MAGICIAN_DS1WM_IRQ 107
#define GPIO108_MAGICIAN_GSM_READY 108
#define GPIO114_MAGICIAN_UNKNOWN 114
#define GPIO115_MAGICIAN_nPEN_IRQ 115
#define GPIO116_MAGICIAN_nCAM_EN 116
#define GPIO119_MAGICIAN_UNKNOWN 119
#define GPIO120_MAGICIAN_UNKNOWN 120
/*
* CPLD IRQs
*/
#define IRQ_MAGICIAN_SD (IRQ_BOARD_START + 0)
#define IRQ_MAGICIAN_EP (IRQ_BOARD_START + 1)
#define IRQ_MAGICIAN_BT (IRQ_BOARD_START + 2)
#define IRQ_MAGICIAN_VBUS (IRQ_BOARD_START + 3)
#define MAGICIAN_NR_IRQS (IRQ_BOARD_START + 8)
/*
* CPLD EGPIOs
*/
#define MAGICIAN_EGPIO_BASE PXA_NR_BUILTIN_GPIO
#define MAGICIAN_EGPIO(reg,bit) \
(MAGICIAN_EGPIO_BASE + 8*reg + bit)
/* output */
#define EGPIO_MAGICIAN_TOPPOLY_POWER MAGICIAN_EGPIO(0, 2)
#define EGPIO_MAGICIAN_LED_POWER MAGICIAN_EGPIO(0, 5)
#define EGPIO_MAGICIAN_GSM_RESET MAGICIAN_EGPIO(0, 6)
#define EGPIO_MAGICIAN_LCD_POWER MAGICIAN_EGPIO(0, 7)
#define EGPIO_MAGICIAN_SPK_POWER MAGICIAN_EGPIO(1, 0)
#define EGPIO_MAGICIAN_EP_POWER MAGICIAN_EGPIO(1, 1)
#define EGPIO_MAGICIAN_IN_SEL0 MAGICIAN_EGPIO(1, 2)
#define EGPIO_MAGICIAN_IN_SEL1 MAGICIAN_EGPIO(1, 3)
#define EGPIO_MAGICIAN_MIC_POWER MAGICIAN_EGPIO(1, 4)
#define EGPIO_MAGICIAN_CODEC_RESET MAGICIAN_EGPIO(1, 5)
#define EGPIO_MAGICIAN_CODEC_POWER MAGICIAN_EGPIO(1, 6)
#define EGPIO_MAGICIAN_BL_POWER MAGICIAN_EGPIO(1, 7)
#define EGPIO_MAGICIAN_SD_POWER MAGICIAN_EGPIO(2, 0)
#define EGPIO_MAGICIAN_CARKIT_MIC MAGICIAN_EGPIO(2, 1)
#define EGPIO_MAGICIAN_IR_RX_SHUTDOWN MAGICIAN_EGPIO(2, 2)
#define EGPIO_MAGICIAN_FLASH_VPP MAGICIAN_EGPIO(2, 3)
#define EGPIO_MAGICIAN_BL_POWER2 MAGICIAN_EGPIO(2, 4)
#define EGPIO_MAGICIAN_BQ24022_ISET2 MAGICIAN_EGPIO(2, 5)
#define EGPIO_MAGICIAN_NICD_CHARGE MAGICIAN_EGPIO(2, 6)
#define EGPIO_MAGICIAN_GSM_POWER MAGICIAN_EGPIO(2, 7)
/* input */
/* USB or AC charger type */
#define EGPIO_MAGICIAN_CABLE_TYPE MAGICIAN_EGPIO(4, 0)
/*
* Vbus is detected
* FIXME behaves like (6,3), may differ for host/device
*/
#define EGPIO_MAGICIAN_CABLE_VBUS MAGICIAN_EGPIO(4, 1)
#define EGPIO_MAGICIAN_BOARD_ID0 MAGICIAN_EGPIO(5, 0)
#define EGPIO_MAGICIAN_BOARD_ID1 MAGICIAN_EGPIO(5, 1)
#define EGPIO_MAGICIAN_BOARD_ID2 MAGICIAN_EGPIO(5, 2)
#define EGPIO_MAGICIAN_LCD_SELECT MAGICIAN_EGPIO(5, 3)
#define EGPIO_MAGICIAN_nSD_READONLY MAGICIAN_EGPIO(5, 4)
#define EGPIO_MAGICIAN_EP_INSERT MAGICIAN_EGPIO(6, 1)
/* FIXME behaves like (4,1), may differ for host/device */
#define EGPIO_MAGICIAN_CABLE_INSERTED MAGICIAN_EGPIO(6, 3)
#endif /* _MAGICIAN_H_ */

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arch/arm/mach-pxa/mainstone.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/mainstone.c
*
* Support for the Intel HCDDBBVA0 Development Platform.
* (go figure how they came up with such name...)
*
* Author: Nicolas Pitre
* Created: Nov 05, 2002
* Copyright: MontaVista Software Inc.
*/
#include <linux/gpio.h>
#include <linux/gpio/gpio-reg.h>
#include <linux/gpio/machine.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/syscore_ops.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/bitops.h>
#include <linux/fb.h>
#include <linux/ioport.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/gpio_keys.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/smc91x.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/slab.h>
#include <linux/leds.h>
#include <asm/types.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <linux/sizes.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/flash.h>
#include "pxa27x.h"
#include "mainstone.h"
#include <linux/platform_data/asoc-pxa.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/irda-pxaficp.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/keypad-pxa27x.h>
#include "addr-map.h"
#include "smemc.h"
#include "generic.h"
#include "devices.h"
static unsigned long mainstone_pin_config[] = {
/* Chip Select */
GPIO15_nCS_1,
/* LCD - 16bpp Active TFT */
GPIOxx_LCD_TFT_16BPP,
GPIO16_PWM0_OUT, /* Backlight */
/* MMC */
GPIO32_MMC_CLK,
GPIO112_MMC_CMD,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
/* USB Host Port 1 */
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
/* PC Card */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO85_nPCE_1,
GPIO54_nPCE_2,
GPIO79_PSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO45_AC97_SYSCLK,
/* Keypad */
GPIO93_KP_DKIN_0,
GPIO94_KP_DKIN_1,
GPIO95_KP_DKIN_2,
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
GPIO103_KP_MKOUT_0,
GPIO104_KP_MKOUT_1,
GPIO105_KP_MKOUT_2,
GPIO106_KP_MKOUT_3,
GPIO107_KP_MKOUT_4,
GPIO108_KP_MKOUT_5,
GPIO96_KP_MKOUT_6,
/* I2C */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
/* GPIO */
GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
};
static struct resource smc91x_resources[] = {
[0] = {
.start = (MST_ETH_PHYS + 0x300),
.end = (MST_ETH_PHYS + 0xfffff),
.flags = IORESOURCE_MEM,
},
[1] = {
.start = MAINSTONE_IRQ(3),
.end = MAINSTONE_IRQ(3),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
};
static struct smc91x_platdata mainstone_smc91x_info = {
.flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
SMC91X_NOWAIT | SMC91X_USE_DMA,
.pxa_u16_align4 = true,
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
.dev = {
.platform_data = &mainstone_smc91x_info,
},
};
static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
{
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
return 0;
}
static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
{
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
}
static long mst_audio_suspend_mask;
static void mst_audio_suspend(void *priv)
{
mst_audio_suspend_mask = MST_MSCWR2;
MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
}
static void mst_audio_resume(void *priv)
{
MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
}
static pxa2xx_audio_ops_t mst_audio_ops = {
.startup = mst_audio_startup,
.shutdown = mst_audio_shutdown,
.suspend = mst_audio_suspend,
.resume = mst_audio_resume,
};
static struct resource flash_resources[] = {
[0] = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_64M - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PXA_CS1_PHYS,
.end = PXA_CS1_PHYS + SZ_64M - 1,
.flags = IORESOURCE_MEM,
},
};
static struct mtd_partition mainstoneflash0_partitions[] = {
{
.name = "Bootloader",
.size = 0x00040000,
.offset = 0,
.mask_flags = MTD_WRITEABLE /* force read-only */
},{
.name = "Kernel",
.size = 0x00400000,
.offset = 0x00040000,
},{
.name = "Filesystem",
.size = MTDPART_SIZ_FULL,
.offset = 0x00440000
}
};
static struct flash_platform_data mst_flash_data[2] = {
{
.map_name = "cfi_probe",
.parts = mainstoneflash0_partitions,
.nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
}, {
.map_name = "cfi_probe",
.parts = NULL,
.nr_parts = 0,
}
};
static struct platform_device mst_flash_device[2] = {
{
.name = "pxa2xx-flash",
.id = 0,
.dev = {
.platform_data = &mst_flash_data[0],
},
.resource = &flash_resources[0],
.num_resources = 1,
},
{
.name = "pxa2xx-flash",
.id = 1,
.dev = {
.platform_data = &mst_flash_data[1],
},
.resource = &flash_resources[1],
.num_resources = 1,
},
};
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static struct pwm_lookup mainstone_pwm_lookup[] = {
PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 78770,
PWM_POLARITY_NORMAL),
};
static struct platform_pwm_backlight_data mainstone_backlight_data = {
.max_brightness = 1023,
.dft_brightness = 1023,
};
static struct platform_device mainstone_backlight_device = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa27x_device_pwm0.dev,
.platform_data = &mainstone_backlight_data,
},
};
static void __init mainstone_backlight_register(void)
{
int ret;
pwm_add_table(mainstone_pwm_lookup, ARRAY_SIZE(mainstone_pwm_lookup));
ret = platform_device_register(&mainstone_backlight_device);
if (ret) {
printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
pwm_remove_table(mainstone_pwm_lookup,
ARRAY_SIZE(mainstone_pwm_lookup));
}
}
#else
#define mainstone_backlight_register() do { } while (0)
#endif
static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
.pixclock = 50000,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 1,
.left_margin = 0x9f,
.right_margin = 1,
.vsync_len = 44,
.upper_margin = 0,
.lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
};
static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
.pixclock = 110000,
.xres = 240,
.yres = 320,
.bpp = 16,
.hsync_len = 4,
.left_margin = 8,
.right_margin = 20,
.vsync_len = 3,
.upper_margin = 1,
.lower_margin = 10,
.sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
};
static struct pxafb_mach_info mainstone_pxafb_info = {
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
{
int err;
/* make sure SD/Memory Stick multiplexer's signals
* are routed to MMC controller
*/
MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, 0,
"MMC card detect", data);
if (err)
printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
return err;
}
static int mainstone_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data* p_d = dev->platform_data;
if (( 1 << vdd) & p_d->ocr_mask) {
printk(KERN_DEBUG "%s: on\n", __func__);
MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
} else {
printk(KERN_DEBUG "%s: off\n", __func__);
MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
}
return 0;
}
static void mainstone_mci_exit(struct device *dev, void *data)
{
free_irq(MAINSTONE_MMC_IRQ, data);
}
static struct pxamci_platform_data mainstone_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = mainstone_mci_init,
.setpower = mainstone_mci_setpower,
.exit = mainstone_mci_exit,
};
static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
{
unsigned long flags;
local_irq_save(flags);
if (mode & IR_SIRMODE) {
MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
} else if (mode & IR_FIRMODE) {
MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
}
pxa2xx_transceiver_mode(dev, mode);
if (mode & IR_OFF) {
MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
} else {
MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
}
local_irq_restore(flags);
}
static struct pxaficp_platform_data mainstone_ficp_platform_data = {
.gpio_pwdown = -1,
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
.transceiver_mode = mainstone_irda_transceiver_mode,
};
static struct gpio_keys_button gpio_keys_button[] = {
[0] = {
.desc = "wakeup",
.code = KEY_SUSPEND,
.type = EV_KEY,
.gpio = 1,
.wakeup = 1,
},
};
static struct gpio_keys_platform_data mainstone_gpio_keys = {
.buttons = gpio_keys_button,
.nbuttons = 1,
};
static struct platform_device mst_gpio_keys_device = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &mainstone_gpio_keys,
},
};
static struct resource mst_cplds_resources[] = {
[0] = {
.start = MST_FPGA_PHYS + 0xc0,
.end = MST_FPGA_PHYS + 0xe0 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PXA_GPIO_TO_IRQ(0),
.end = PXA_GPIO_TO_IRQ(0),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
},
[2] = {
.start = MAINSTONE_IRQ(0),
.end = MAINSTONE_IRQ(15),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mst_cplds_device = {
.name = "pxa_cplds_irqs",
.id = -1,
.resource = &mst_cplds_resources[0],
.num_resources = 3,
};
static struct platform_device *platform_devices[] __initdata = {
&smc91x_device,
&mst_flash_device[0],
&mst_flash_device[1],
&mst_gpio_keys_device,
&mst_cplds_device,
};
static struct pxaohci_platform_data mainstone_ohci_platform_data = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
};
#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
static const unsigned int mainstone_matrix_keys[] = {
KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
KEY(0, 4, KEY_DOT), /* . */
KEY(1, 4, KEY_CLOSE), /* @ */
KEY(4, 4, KEY_SLASH),
KEY(5, 4, KEY_BACKSLASH),
KEY(0, 5, KEY_HOME),
KEY(1, 5, KEY_LEFTSHIFT),
KEY(2, 5, KEY_SPACE),
KEY(3, 5, KEY_SPACE),
KEY(4, 5, KEY_ENTER),
KEY(5, 5, KEY_BACKSPACE),
KEY(0, 6, KEY_UP),
KEY(1, 6, KEY_DOWN),
KEY(2, 6, KEY_LEFT),
KEY(3, 6, KEY_RIGHT),
KEY(4, 6, KEY_SELECT),
};
static struct matrix_keymap_data mainstone_matrix_keymap_data = {
.keymap = mainstone_matrix_keys,
.keymap_size = ARRAY_SIZE(mainstone_matrix_keys),
};
struct pxa27x_keypad_platform_data mainstone_keypad_info = {
.matrix_key_rows = 6,
.matrix_key_cols = 7,
.matrix_keymap_data = &mainstone_matrix_keymap_data,
.enable_rotary0 = 1,
.rotary0_up_key = KEY_UP,
.rotary0_down_key = KEY_DOWN,
.debounce_interval = 30,
};
static void __init mainstone_init_keypad(void)
{
pxa_set_keypad_info(&mainstone_keypad_info);
}
#else
static inline void mainstone_init_keypad(void) {}
#endif
static int mst_pcmcia0_irqs[11] = {
[0 ... 4] = -1,
[5] = MAINSTONE_S0_CD_IRQ,
[6 ... 7] = -1,
[8] = MAINSTONE_S0_STSCHG_IRQ,
[9] = -1,
[10] = MAINSTONE_S0_IRQ,
};
static int mst_pcmcia1_irqs[11] = {
[0 ... 4] = -1,
[5] = MAINSTONE_S1_CD_IRQ,
[6 ... 7] = -1,
[8] = MAINSTONE_S1_STSCHG_IRQ,
[9] = -1,
[10] = MAINSTONE_S1_IRQ,
};
static struct gpiod_lookup_table mainstone_pcmcia_gpio_table = {
.dev_id = "pxa2xx-pcmcia",
.table = {
GPIO_LOOKUP("mst-pcmcia0", 0, "a0vpp", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia0", 1, "a1vpp", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia0", 2, "a0vcc", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia0", 3, "a1vcc", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia0", 4, "areset", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia0", 5, "adetect", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("mst-pcmcia0", 6, "avs1", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("mst-pcmcia0", 7, "avs2", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("mst-pcmcia0", 8, "abvd1", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia0", 9, "abvd2", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia0", 10, "aready", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia1", 0, "b0vpp", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia1", 1, "b1vpp", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia1", 2, "b0vcc", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia1", 3, "b1vcc", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia1", 4, "breset", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia1", 5, "bdetect", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("mst-pcmcia1", 6, "bvs1", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("mst-pcmcia1", 7, "bvs2", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("mst-pcmcia1", 8, "bbvd1", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia1", 9, "bbvd2", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("mst-pcmcia1", 10, "bready", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct gpiod_lookup_table mainstone_wm97xx_gpio_table = {
.dev_id = "wm97xx-touch",
.table = {
GPIO_LOOKUP("gpio-pxa", 4, "touch", GPIO_ACTIVE_HIGH),
{ },
},
};
static void __init mainstone_init(void)
{
int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
/* Register board control register(s) as GPIOs */
gpio_reg_init(NULL, (void __iomem *)&MST_PCMCIA0, -1, 11,
"mst-pcmcia0", MST_PCMCIA_INPUTS, 0, NULL,
NULL, mst_pcmcia0_irqs);
gpio_reg_init(NULL, (void __iomem *)&MST_PCMCIA1, -1, 11,
"mst-pcmcia1", MST_PCMCIA_INPUTS, 0, NULL,
NULL, mst_pcmcia1_irqs);
gpiod_add_lookup_table(&mainstone_pcmcia_gpio_table);
gpiod_add_lookup_table(&mainstone_wm97xx_gpio_table);
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
mst_flash_data[1].width = 4;
/* Compensate for SW7 which swaps the flash banks */
mst_flash_data[SW7].name = "processor-flash";
mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
mst_flash_data[0].name);
/* system bus arbiter setting
* - Core_Park
* - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
*/
ARB_CNTRL = ARB_CORE_PARK | 0x234;
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
/* reading Mainstone's "Virtual Configuration Register"
might be handy to select LCD type here */
if (0)
mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
else
mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
pxa_set_fb_info(NULL, &mainstone_pxafb_info);
mainstone_backlight_register();
pxa_set_mci_info(&mainstone_mci_platform_data);
pxa_set_ficp_info(&mainstone_ficp_platform_data);
pxa_set_ohci_info(&mainstone_ohci_platform_data);
pxa_set_i2c_info(NULL);
pxa_set_ac97_info(&mst_audio_ops);
mainstone_init_keypad();
}
static struct map_desc mainstone_io_desc[] __initdata = {
{ /* CPLD */
.virtual = MST_FPGA_VIRT,
.pfn = __phys_to_pfn(MST_FPGA_PHYS),
.length = 0x00100000,
.type = MT_DEVICE
}
};
static void __init mainstone_map_io(void)
{
pxa27x_map_io();
iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
/* for use I SRAM as framebuffer. */
PSLR |= 0xF04;
PCFR = 0x66;
}
/*
* Driver for the 8 discrete LEDs available for general use:
* Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays
* so be sure to not monkey with them here.
*/
#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
struct mainstone_led {
struct led_classdev cdev;
u8 mask;
};
/*
* The triggers lines up below will only be used if the
* LED triggers are compiled in.
*/
static const struct {
const char *name;
const char *trigger;
} mainstone_leds[] = {
{ "mainstone:D28", "default-on", },
{ "mainstone:D27", "cpu0", },
{ "mainstone:D26", "heartbeat" },
{ "mainstone:D25", },
{ "mainstone:D24", },
{ "mainstone:D23", },
{ "mainstone:D22", },
{ "mainstone:D21", },
};
static void mainstone_led_set(struct led_classdev *cdev,
enum led_brightness b)
{
struct mainstone_led *led = container_of(cdev,
struct mainstone_led, cdev);
u32 reg = MST_LEDCTRL;
if (b != LED_OFF)
reg |= led->mask;
else
reg &= ~led->mask;
MST_LEDCTRL = reg;
}
static enum led_brightness mainstone_led_get(struct led_classdev *cdev)
{
struct mainstone_led *led = container_of(cdev,
struct mainstone_led, cdev);
u32 reg = MST_LEDCTRL;
return (reg & led->mask) ? LED_FULL : LED_OFF;
}
static int __init mainstone_leds_init(void)
{
int i;
if (!machine_is_mainstone())
return -ENODEV;
/* All ON */
MST_LEDCTRL |= 0xff;
for (i = 0; i < ARRAY_SIZE(mainstone_leds); i++) {
struct mainstone_led *led;
led = kzalloc(sizeof(*led), GFP_KERNEL);
if (!led)
break;
led->cdev.name = mainstone_leds[i].name;
led->cdev.brightness_set = mainstone_led_set;
led->cdev.brightness_get = mainstone_led_get;
led->cdev.default_trigger = mainstone_leds[i].trigger;
led->mask = BIT(i);
if (led_classdev_register(NULL, &led->cdev) < 0) {
kfree(led);
break;
}
}
return 0;
}
/*
* Since we may have triggers on any subsystem, defer registration
* until after subsystem_init.
*/
fs_initcall(mainstone_leds_init);
#endif
MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
/* Maintainer: MontaVista Software Inc. */
.atag_offset = 0x100, /* BLOB boot parameter setting */
.map_io = mainstone_map_io,
.nr_irqs = MAINSTONE_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = mainstone_init,
.restart = pxa_restart,
MACHINE_END

140
arch/arm/mach-pxa/mainstone.h
View File

@ -1,140 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Author: Nicolas Pitre
* Created: Nov 14, 2002
* Copyright: MontaVista Software Inc.
*/
#ifndef ASM_ARCH_MAINSTONE_H
#define ASM_ARCH_MAINSTONE_H
#include "irqs.h"
#define MST_ETH_PHYS PXA_CS4_PHYS
#define MST_FPGA_PHYS PXA_CS2_PHYS
#define MST_FPGA_VIRT (0xf0000000)
#define MST_P2V(x) ((x) - MST_FPGA_PHYS + MST_FPGA_VIRT)
#define MST_V2P(x) ((x) - MST_FPGA_VIRT + MST_FPGA_PHYS)
#ifndef __ASSEMBLY__
# define __MST_REG(x) (*((volatile unsigned long *)MST_P2V(x)))
#else
# define __MST_REG(x) MST_P2V(x)
#endif
/* board level registers in the FPGA */
#define MST_LEDDAT1 __MST_REG(0x08000010)
#define MST_LEDDAT2 __MST_REG(0x08000014)
#define MST_LEDCTRL __MST_REG(0x08000040)
#define MST_GPSWR __MST_REG(0x08000060)
#define MST_MSCWR1 __MST_REG(0x08000080)
#define MST_MSCWR2 __MST_REG(0x08000084)
#define MST_MSCWR3 __MST_REG(0x08000088)
#define MST_MSCRD __MST_REG(0x08000090)
#define MST_INTMSKENA __MST_REG(0x080000c0)
#define MST_INTSETCLR __MST_REG(0x080000d0)
#define MST_PCMCIA0 __MST_REG(0x080000e0)
#define MST_PCMCIA1 __MST_REG(0x080000e4)
#define MST_MSCWR1_CAMERA_ON (1 << 15) /* Camera interface power control */
#define MST_MSCWR1_CAMERA_SEL (1 << 14) /* Camera interface mux control */
#define MST_MSCWR1_LCD_CTL (1 << 13) /* General-purpose LCD control */
#define MST_MSCWR1_MS_ON (1 << 12) /* Memory Stick power control */
#define MST_MSCWR1_MMC_ON (1 << 11) /* MultiMediaCard* power control */
#define MST_MSCWR1_MS_SEL (1 << 10) /* SD/MS multiplexer control */
#define MST_MSCWR1_BB_SEL (1 << 9) /* PCMCIA/Baseband multiplexer */
#define MST_MSCWR1_BT_ON (1 << 8) /* Bluetooth UART transceiver */
#define MST_MSCWR1_BTDTR (1 << 7) /* Bluetooth UART DTR */
#define MST_MSCWR1_IRDA_MASK (3 << 5) /* IrDA transceiver mode */
#define MST_MSCWR1_IRDA_FULL (0 << 5) /* full distance power */
#define MST_MSCWR1_IRDA_OFF (1 << 5) /* shutdown */
#define MST_MSCWR1_IRDA_MED (2 << 5) /* 2/3 distance power */
#define MST_MSCWR1_IRDA_LOW (3 << 5) /* 1/3 distance power */
#define MST_MSCWR1_IRDA_FIR (1 << 4) /* IrDA transceiver SIR/FIR */
#define MST_MSCWR1_GREENLED (1 << 3) /* LED D1 control */
#define MST_MSCWR1_PDC_CTL (1 << 2) /* reserved */
#define MST_MSCWR1_MTR_ON (1 << 1) /* Silent alert motor */
#define MST_MSCWR1_SYSRESET (1 << 0) /* System reset */
#define MST_MSCWR2_USB_OTG_RST (1 << 6) /* USB On The Go reset */
#define MST_MSCWR2_USB_OTG_SEL (1 << 5) /* USB On The Go control */
#define MST_MSCWR2_nUSBC_SC (1 << 4) /* USB client soft connect control */
#define MST_MSCWR2_I2S_SPKROFF (1 << 3) /* I2S CODEC amplifier control */
#define MST_MSCWR2_AC97_SPKROFF (1 << 2) /* AC97 CODEC amplifier control */
#define MST_MSCWR2_RADIO_PWR (1 << 1) /* Radio module power control */
#define MST_MSCWR2_RADIO_WAKE (1 << 0) /* Radio module wake-up signal */
#define MST_MSCWR3_GPIO_RESET_EN (1 << 2) /* Enable GPIO Reset */
#define MST_MSCWR3_GPIO_RESET (1 << 1) /* Initiate a GPIO Reset */
#define MST_MSCWR3_COMMS_SW_RESET (1 << 0) /* Communications Processor Reset Control */
#define MST_MSCRD_nPENIRQ (1 << 9) /* ADI7873* nPENIRQ signal */
#define MST_MSCRD_nMEMSTK_CD (1 << 8) /* Memory Stick detection signal */
#define MST_MSCRD_nMMC_CD (1 << 7) /* SD/MMC card detection signal */
#define MST_MSCRD_nUSIM_CD (1 << 6) /* USIM card detection signal */
#define MST_MSCRD_USB_CBL (1 << 5) /* USB client cable status */
#define MST_MSCRD_TS_BUSY (1 << 4) /* ADI7873 busy */
#define MST_MSCRD_BTDSR (1 << 3) /* Bluetooth UART DSR */
#define MST_MSCRD_BTRI (1 << 2) /* Bluetooth UART Ring Indicator */
#define MST_MSCRD_BTDCD (1 << 1) /* Bluetooth UART DCD */
#define MST_MSCRD_nMMC_WP (1 << 0) /* SD/MMC write-protect status */
#define MST_INT_S1_IRQ (1 << 15) /* PCMCIA socket 1 IRQ */
#define MST_INT_S1_STSCHG (1 << 14) /* PCMCIA socket 1 status changed */
#define MST_INT_S1_CD (1 << 13) /* PCMCIA socket 1 card detection */
#define MST_INT_S0_IRQ (1 << 11) /* PCMCIA socket 0 IRQ */
#define MST_INT_S0_STSCHG (1 << 10) /* PCMCIA socket 0 status changed */
#define MST_INT_S0_CD (1 << 9) /* PCMCIA socket 0 card detection */
#define MST_INT_nEXBRD_INT (1 << 7) /* Expansion board IRQ */
#define MST_INT_MSINS (1 << 6) /* Memory Stick* detection */
#define MST_INT_PENIRQ (1 << 5) /* ADI7873* touch-screen IRQ */
#define MST_INT_AC97 (1 << 4) /* AC'97 CODEC IRQ */
#define MST_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */
#define MST_INT_USBC (1 << 2) /* USB client cable detection IRQ */
#define MST_INT_USIM (1 << 1) /* USIM card detection IRQ */
#define MST_INT_MMC (1 << 0) /* MMC/SD card detection IRQ */
#define MST_PCMCIA_nIRQ (1 << 10) /* IRQ / ready signal */
#define MST_PCMCIA_nSPKR_BVD2 (1 << 9) /* VDD sense / digital speaker */
#define MST_PCMCIA_nSTSCHG_BVD1 (1 << 8) /* VDD sense / card status changed */
#define MST_PCMCIA_nVS2 (1 << 7) /* VSS voltage sense */
#define MST_PCMCIA_nVS1 (1 << 6) /* VSS voltage sense */
#define MST_PCMCIA_nCD (1 << 5) /* Card detection signal */
#define MST_PCMCIA_RESET (1 << 4) /* Card reset signal */
#define MST_PCMCIA_PWR_MASK (0x000f) /* MAX1602 power-supply controls */
#define MST_PCMCIA_PWR_VPP_0 0x0 /* voltage VPP = 0V */
#define MST_PCMCIA_PWR_VPP_120 0x2 /* voltage VPP = 12V*/
#define MST_PCMCIA_PWR_VPP_VCC 0x1 /* voltage VPP = VCC */
#define MST_PCMCIA_PWR_VCC_0 0x0 /* voltage VCC = 0V */
#define MST_PCMCIA_PWR_VCC_33 0x8 /* voltage VCC = 3.3V */
#define MST_PCMCIA_PWR_VCC_50 0x4 /* voltage VCC = 5.0V */
#define MST_PCMCIA_INPUTS \
(MST_PCMCIA_nIRQ | MST_PCMCIA_nSPKR_BVD2 | MST_PCMCIA_nSTSCHG_BVD1 | \
MST_PCMCIA_nVS2 | MST_PCMCIA_nVS1 | MST_PCMCIA_nCD)
/* board specific IRQs */
#define MAINSTONE_NR_IRQS IRQ_BOARD_START
#define MAINSTONE_IRQ(x) (MAINSTONE_NR_IRQS + (x))
#define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0)
#define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1)
#define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2)
#define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3)
#define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4)
#define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5)
#define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6)
#define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7)
#define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9)
#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10)
#define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11)
#define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13)
#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15)
#endif

458
arch/arm/mach-pxa/mfp-pxa320.h
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@ -1,458 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* arch/arm/mach-pxa/include/mach/mfp-pxa320.h
*
* PXA320 specific MFP configuration definitions
*
* Copyright (C) 2007 Marvell International Ltd.
* 2007-08-21: eric miao <eric.miao@marvell.com>
* initial version
*/
#ifndef __ASM_ARCH_MFP_PXA320_H
#define __ASM_ARCH_MFP_PXA320_H
#include "mfp-pxa3xx.h"
/* GPIO */
#define GPIO46_GPIO MFP_CFG(GPIO46, AF0)
#define GPIO49_GPIO MFP_CFG(GPIO49, AF0)
#define GPIO50_GPIO MFP_CFG(GPIO50, AF0)
#define GPIO51_GPIO MFP_CFG(GPIO51, AF0)
#define GPIO52_GPIO MFP_CFG(GPIO52, AF0)
#define GPIO7_2_GPIO MFP_CFG(GPIO7_2, AF0)
#define GPIO8_2_GPIO MFP_CFG(GPIO8_2, AF0)
#define GPIO9_2_GPIO MFP_CFG(GPIO9_2, AF0)
#define GPIO10_2_GPIO MFP_CFG(GPIO10_2, AF0)
#define GPIO11_2_GPIO MFP_CFG(GPIO11_2, AF0)
#define GPIO12_2_GPIO MFP_CFG(GPIO12_2, AF0)
#define GPIO13_2_GPIO MFP_CFG(GPIO13_2, AF0)
#define GPIO14_2_GPIO MFP_CFG(GPIO14_2, AF0)
#define GPIO15_2_GPIO MFP_CFG(GPIO15_2, AF0)
#define GPIO16_2_GPIO MFP_CFG(GPIO16_2, AF0)
#define GPIO17_2_GPIO MFP_CFG(GPIO17_2, AF0)
/* Chip Select */
#define GPIO3_nCS2 MFP_CFG(GPIO3, AF1)
#define GPIO4_nCS3 MFP_CFG(GPIO4, AF1)
/* AC97 */
#define GPIO34_AC97_SYSCLK MFP_CFG(GPIO34, AF1)
#define GPIO39_AC97_BITCLK MFP_CFG(GPIO39, AF1)
#define GPIO40_AC97_nACRESET MFP_CFG(GPIO40, AF1)
#define GPIO35_AC97_SDATA_IN_0 MFP_CFG(GPIO35, AF1)
#define GPIO36_AC97_SDATA_IN_1 MFP_CFG(GPIO36, AF1)
#define GPIO32_AC97_SDATA_IN_2 MFP_CFG(GPIO32, AF2)
#define GPIO33_AC97_SDATA_IN_3 MFP_CFG(GPIO33, AF2)
#define GPIO11_AC97_SDATA_IN_2 MFP_CFG(GPIO11, AF3)
#define GPIO12_AC97_SDATA_IN_3 MFP_CFG(GPIO12, AF3)
#define GPIO37_AC97_SDATA_OUT MFP_CFG(GPIO37, AF1)
#define GPIO38_AC97_SYNC MFP_CFG(GPIO38, AF1)
/* I2C */
#define GPIO32_I2C_SCL MFP_CFG_LPM(GPIO32, AF1, PULL_HIGH)
#define GPIO33_I2C_SDA MFP_CFG_LPM(GPIO33, AF1, PULL_HIGH)
/* QCI */
#define GPIO49_CI_DD_0 MFP_CFG_DRV(GPIO49, AF1, DS04X)
#define GPIO50_CI_DD_1 MFP_CFG_DRV(GPIO50, AF1, DS04X)
#define GPIO51_CI_DD_2 MFP_CFG_DRV(GPIO51, AF1, DS04X)
#define GPIO52_CI_DD_3 MFP_CFG_DRV(GPIO52, AF1, DS04X)
#define GPIO53_CI_DD_4 MFP_CFG_DRV(GPIO53, AF1, DS04X)
#define GPIO54_CI_DD_5 MFP_CFG_DRV(GPIO54, AF1, DS04X)
#define GPIO55_CI_DD_6 MFP_CFG_DRV(GPIO55, AF1, DS04X)
#define GPIO56_CI_DD_7 MFP_CFG_DRV(GPIO56, AF0, DS04X)
#define GPIO57_CI_DD_8 MFP_CFG_DRV(GPIO57, AF1, DS04X)
#define GPIO58_CI_DD_9 MFP_CFG_DRV(GPIO58, AF1, DS04X)
#define GPIO59_CI_MCLK MFP_CFG_DRV(GPIO59, AF0, DS04X)
#define GPIO60_CI_PCLK MFP_CFG_DRV(GPIO60, AF0, DS04X)
#define GPIO61_CI_HSYNC MFP_CFG_DRV(GPIO61, AF0, DS04X)
#define GPIO62_CI_VSYNC MFP_CFG_DRV(GPIO62, AF0, DS04X)
#define GPIO31_CIR_OUT MFP_CFG(GPIO31, AF5)
#define GPIO0_2_CLK_EXT MFP_CFG(GPIO0_2, AF3)
#define GPIO0_DRQ MFP_CFG(GPIO0, AF2)
#define GPIO11_EXT_SYNC0 MFP_CFG(GPIO11, AF5)
#define GPIO12_EXT_SYNC1 MFP_CFG(GPIO12, AF6)
#define GPIO0_2_HZ_CLK MFP_CFG(GPIO0_2, AF1)
#define GPIO14_HZ_CLK MFP_CFG(GPIO14, AF4)
#define GPIO30_ICP_RXD MFP_CFG(GPIO30, AF1)
#define GPIO31_ICP_TXD MFP_CFG(GPIO31, AF1)
#define GPIO83_KP_DKIN_0 MFP_CFG_LPM(GPIO83, AF3, FLOAT)
#define GPIO84_KP_DKIN_1 MFP_CFG_LPM(GPIO84, AF3, FLOAT)
#define GPIO85_KP_DKIN_2 MFP_CFG_LPM(GPIO85, AF3, FLOAT)
#define GPIO86_KP_DKIN_3 MFP_CFG_LPM(GPIO86, AF3, FLOAT)
#define GPIO105_KP_DKIN_0 MFP_CFG_LPM(GPIO105, AF2, FLOAT)
#define GPIO106_KP_DKIN_1 MFP_CFG_LPM(GPIO106, AF2, FLOAT)
#define GPIO107_KP_DKIN_2 MFP_CFG_LPM(GPIO107, AF2, FLOAT)
#define GPIO108_KP_DKIN_3 MFP_CFG_LPM(GPIO108, AF2, FLOAT)
#define GPIO109_KP_DKIN_4 MFP_CFG_LPM(GPIO109, AF2, FLOAT)
#define GPIO110_KP_DKIN_5 MFP_CFG_LPM(GPIO110, AF2, FLOAT)
#define GPIO111_KP_DKIN_6 MFP_CFG_LPM(GPIO111, AF2, FLOAT)
#define GPIO112_KP_DKIN_7 MFP_CFG_LPM(GPIO112, AF2, FLOAT)
#define GPIO113_KP_DKIN_0 MFP_CFG_LPM(GPIO113, AF2, FLOAT)
#define GPIO114_KP_DKIN_1 MFP_CFG_LPM(GPIO114, AF2, FLOAT)
#define GPIO115_KP_DKIN_2 MFP_CFG_LPM(GPIO115, AF2, FLOAT)
#define GPIO116_KP_DKIN_3 MFP_CFG_LPM(GPIO116, AF2, FLOAT)
#define GPIO117_KP_DKIN_4 MFP_CFG_LPM(GPIO117, AF2, FLOAT)
#define GPIO118_KP_DKIN_5 MFP_CFG_LPM(GPIO118, AF2, FLOAT)
#define GPIO119_KP_DKIN_6 MFP_CFG_LPM(GPIO119, AF2, FLOAT)
#define GPIO120_KP_DKIN_7 MFP_CFG_LPM(GPIO120, AF2, FLOAT)
#define GPIO127_KP_DKIN_0 MFP_CFG_LPM(GPIO127, AF2, FLOAT)
#define GPIO126_KP_DKIN_1 MFP_CFG_LPM(GPIO126, AF2, FLOAT)
#define GPIO2_2_KP_DKIN_0 MFP_CFG_LPM(GPIO2_2, AF2, FLOAT)
#define GPIO3_2_KP_DKIN_1 MFP_CFG_LPM(GPIO3_2, AF2, FLOAT)
#define GPIO125_KP_DKIN_2 MFP_CFG_LPM(GPIO125, AF2, FLOAT)
#define GPIO124_KP_DKIN_3 MFP_CFG_LPM(GPIO124, AF2, FLOAT)
#define GPIO123_KP_DKIN_4 MFP_CFG_LPM(GPIO123, AF2, FLOAT)
#define GPIO122_KP_DKIN_5 MFP_CFG_LPM(GPIO122, AF2, FLOAT)
#define GPIO121_KP_DKIN_6 MFP_CFG_LPM(GPIO121, AF2, FLOAT)
#define GPIO4_2_KP_DKIN_7 MFP_CFG_LPM(GPIO4_2, AF2, FLOAT)
#define GPIO113_KP_MKIN_0 MFP_CFG_LPM(GPIO113, AF1, FLOAT)
#define GPIO114_KP_MKIN_1 MFP_CFG_LPM(GPIO114, AF1, FLOAT)
#define GPIO115_KP_MKIN_2 MFP_CFG_LPM(GPIO115, AF1, FLOAT)
#define GPIO116_KP_MKIN_3 MFP_CFG_LPM(GPIO116, AF1, FLOAT)
#define GPIO117_KP_MKIN_4 MFP_CFG_LPM(GPIO117, AF1, FLOAT)
#define GPIO118_KP_MKIN_5 MFP_CFG_LPM(GPIO118, AF1, FLOAT)
#define GPIO119_KP_MKIN_6 MFP_CFG_LPM(GPIO119, AF1, FLOAT)
#define GPIO120_KP_MKIN_7 MFP_CFG_LPM(GPIO120, AF1, FLOAT)
#define GPIO83_KP_MKOUT_0 MFP_CFG_LPM(GPIO83, AF2, DRIVE_HIGH)
#define GPIO84_KP_MKOUT_1 MFP_CFG_LPM(GPIO84, AF2, DRIVE_HIGH)
#define GPIO85_KP_MKOUT_2 MFP_CFG_LPM(GPIO85, AF2, DRIVE_HIGH)
#define GPIO86_KP_MKOUT_3 MFP_CFG_LPM(GPIO86, AF2, DRIVE_HIGH)
#define GPIO13_KP_MKOUT_4 MFP_CFG_LPM(GPIO13, AF3, DRIVE_HIGH)
#define GPIO14_KP_MKOUT_5 MFP_CFG_LPM(GPIO14, AF3, DRIVE_HIGH)
#define GPIO121_KP_MKOUT_0 MFP_CFG_LPM(GPIO121, AF1, DRIVE_HIGH)
#define GPIO122_KP_MKOUT_1 MFP_CFG_LPM(GPIO122, AF1, DRIVE_HIGH)
#define GPIO123_KP_MKOUT_2 MFP_CFG_LPM(GPIO123, AF1, DRIVE_HIGH)
#define GPIO124_KP_MKOUT_3 MFP_CFG_LPM(GPIO124, AF1, DRIVE_HIGH)
#define GPIO125_KP_MKOUT_4 MFP_CFG_LPM(GPIO125, AF1, DRIVE_HIGH)
#define GPIO126_KP_MKOUT_5 MFP_CFG_LPM(GPIO126, AF1, DRIVE_HIGH)
#define GPIO127_KP_MKOUT_6 MFP_CFG_LPM(GPIO127, AF1, DRIVE_HIGH)
#define GPIO5_2_KP_MKOUT_7 MFP_CFG_LPM(GPIO5_2, AF1, DRIVE_HIGH)
/* LCD */
#define GPIO6_2_LCD_LDD_0 MFP_CFG_DRV(GPIO6_2, AF1, DS01X)
#define GPIO7_2_LCD_LDD_1 MFP_CFG_DRV(GPIO7_2, AF1, DS01X)
#define GPIO8_2_LCD_LDD_2 MFP_CFG_DRV(GPIO8_2, AF1, DS01X)
#define GPIO9_2_LCD_LDD_3 MFP_CFG_DRV(GPIO9_2, AF1, DS01X)
#define GPIO10_2_LCD_LDD_4 MFP_CFG_DRV(GPIO10_2, AF1, DS01X)
#define GPIO11_2_LCD_LDD_5 MFP_CFG_DRV(GPIO11_2, AF1, DS01X)
#define GPIO12_2_LCD_LDD_6 MFP_CFG_DRV(GPIO12_2, AF1, DS01X)
#define GPIO13_2_LCD_LDD_7 MFP_CFG_DRV(GPIO13_2, AF1, DS01X)
#define GPIO63_LCD_LDD_8 MFP_CFG_DRV(GPIO63, AF1, DS01X)
#define GPIO64_LCD_LDD_9 MFP_CFG_DRV(GPIO64, AF1, DS01X)
#define GPIO65_LCD_LDD_10 MFP_CFG_DRV(GPIO65, AF1, DS01X)
#define GPIO66_LCD_LDD_11 MFP_CFG_DRV(GPIO66, AF1, DS01X)
#define GPIO67_LCD_LDD_12 MFP_CFG_DRV(GPIO67, AF1, DS01X)
#define GPIO68_LCD_LDD_13 MFP_CFG_DRV(GPIO68, AF1, DS01X)
#define GPIO69_LCD_LDD_14 MFP_CFG_DRV(GPIO69, AF1, DS01X)
#define GPIO70_LCD_LDD_15 MFP_CFG_DRV(GPIO70, AF1, DS01X)
#define GPIO71_LCD_LDD_16 MFP_CFG_DRV(GPIO71, AF1, DS01X)
#define GPIO72_LCD_LDD_17 MFP_CFG_DRV(GPIO72, AF1, DS01X)
#define GPIO73_LCD_CS_N MFP_CFG_DRV(GPIO73, AF2, DS01X)
#define GPIO74_LCD_VSYNC MFP_CFG_DRV(GPIO74, AF2, DS01X)
#define GPIO14_2_LCD_FCLK MFP_CFG_DRV(GPIO14_2, AF1, DS01X)
#define GPIO15_2_LCD_LCLK MFP_CFG_DRV(GPIO15_2, AF1, DS01X)
#define GPIO16_2_LCD_PCLK MFP_CFG_DRV(GPIO16_2, AF1, DS01X)
#define GPIO17_2_LCD_BIAS MFP_CFG_DRV(GPIO17_2, AF1, DS01X)
#define GPIO64_LCD_VSYNC MFP_CFG_DRV(GPIO64, AF2, DS01X)
#define GPIO63_LCD_CS_N MFP_CFG_DRV(GPIO63, AF2, DS01X)
#define GPIO6_2_MLCD_DD_0 MFP_CFG_DRV(GPIO6_2, AF7, DS08X)
#define GPIO7_2_MLCD_DD_1 MFP_CFG_DRV(GPIO7_2, AF7, DS08X)
#define GPIO8_2_MLCD_DD_2 MFP_CFG_DRV(GPIO8_2, AF7, DS08X)
#define GPIO9_2_MLCD_DD_3 MFP_CFG_DRV(GPIO9_2, AF7, DS08X)
#define GPIO10_2_MLCD_DD_4 MFP_CFG_DRV(GPIO10_2, AF7, DS08X)
#define GPIO11_2_MLCD_DD_5 MFP_CFG_DRV(GPIO11_2, AF7, DS08X)
#define GPIO12_2_MLCD_DD_6 MFP_CFG_DRV(GPIO12_2, AF7, DS08X)
#define GPIO13_2_MLCD_DD_7 MFP_CFG_DRV(GPIO13_2, AF7, DS08X)
#define GPIO63_MLCD_DD_8 MFP_CFG_DRV(GPIO63, AF7, DS08X)
#define GPIO64_MLCD_DD_9 MFP_CFG_DRV(GPIO64, AF7, DS08X)
#define GPIO65_MLCD_DD_10 MFP_CFG_DRV(GPIO65, AF7, DS08X)
#define GPIO66_MLCD_DD_11 MFP_CFG_DRV(GPIO66, AF7, DS08X)
#define GPIO67_MLCD_DD_12 MFP_CFG_DRV(GPIO67, AF7, DS08X)
#define GPIO68_MLCD_DD_13 MFP_CFG_DRV(GPIO68, AF7, DS08X)
#define GPIO69_MLCD_DD_14 MFP_CFG_DRV(GPIO69, AF7, DS08X)
#define GPIO70_MLCD_DD_15 MFP_CFG_DRV(GPIO70, AF7, DS08X)
#define GPIO71_MLCD_DD_16 MFP_CFG_DRV(GPIO71, AF7, DS08X)
#define GPIO72_MLCD_DD_17 MFP_CFG_DRV(GPIO72, AF7, DS08X)
#define GPIO73_MLCD_CS MFP_CFG_DRV(GPIO73, AF7, DS08X)
#define GPIO74_MLCD_VSYNC MFP_CFG_DRV(GPIO74, AF7, DS08X)
#define GPIO14_2_MLCD_FCLK MFP_CFG_DRV(GPIO14_2, AF7, DS08X)
#define GPIO15_2_MLCD_LCLK MFP_CFG_DRV(GPIO15_2, AF7, DS08X)
#define GPIO16_2_MLCD_PCLK MFP_CFG_DRV(GPIO16_2, AF7, DS08X)
#define GPIO17_2_MLCD_BIAS MFP_CFG_DRV(GPIO17_2, AF7, DS08X)
/* MMC1 */
#define GPIO9_MMC1_CMD MFP_CFG_LPM(GPIO9, AF4, DRIVE_HIGH)
#define GPIO22_MMC1_CLK MFP_CFG_LPM(GPIO22, AF4, DRIVE_HIGH)
#define GPIO23_MMC1_CMD MFP_CFG_LPM(GPIO23, AF4, DRIVE_HIGH)
#define GPIO30_MMC1_CLK MFP_CFG_LPM(GPIO30, AF4, DRIVE_HIGH)
#define GPIO31_MMC1_CMD MFP_CFG_LPM(GPIO31, AF4, DRIVE_HIGH)
#define GPIO5_MMC1_DAT0 MFP_CFG_LPM(GPIO5, AF4, DRIVE_HIGH)
#define GPIO6_MMC1_DAT1 MFP_CFG_LPM(GPIO6, AF4, DRIVE_HIGH)
#define GPIO7_MMC1_DAT2 MFP_CFG_LPM(GPIO7, AF4, DRIVE_HIGH)
#define GPIO8_MMC1_DAT3 MFP_CFG_LPM(GPIO8, AF4, DRIVE_HIGH)
#define GPIO18_MMC1_DAT0 MFP_CFG_LPM(GPIO18, AF4, DRIVE_HIGH)
#define GPIO19_MMC1_DAT1 MFP_CFG_LPM(GPIO19, AF4, DRIVE_HIGH)
#define GPIO20_MMC1_DAT2 MFP_CFG_LPM(GPIO20, AF4, DRIVE_HIGH)
#define GPIO21_MMC1_DAT3 MFP_CFG_LPM(GPIO21, AF4, DRIVE_HIGH)
#define GPIO28_MMC2_CLK MFP_CFG_LPM(GPIO28, AF4, PULL_HIGH)
#define GPIO29_MMC2_CMD MFP_CFG_LPM(GPIO29, AF4, PULL_HIGH)
#define GPIO30_MMC2_CLK MFP_CFG_LPM(GPIO30, AF3, PULL_HIGH)
#define GPIO31_MMC2_CMD MFP_CFG_LPM(GPIO31, AF3, PULL_HIGH)
#define GPIO79_MMC2_CLK MFP_CFG_LPM(GPIO79, AF4, PULL_HIGH)
#define GPIO80_MMC2_CMD MFP_CFG_LPM(GPIO80, AF4, PULL_HIGH)
#define GPIO5_MMC2_DAT0 MFP_CFG_LPM(GPIO5, AF2, PULL_HIGH)
#define GPIO6_MMC2_DAT1 MFP_CFG_LPM(GPIO6, AF2, PULL_HIGH)
#define GPIO7_MMC2_DAT2 MFP_CFG_LPM(GPIO7, AF2, PULL_HIGH)
#define GPIO8_MMC2_DAT3 MFP_CFG_LPM(GPIO8, AF2, PULL_HIGH)
#define GPIO24_MMC2_DAT0 MFP_CFG_LPM(GPIO24, AF4, PULL_HIGH)
#define GPIO75_MMC2_DAT0 MFP_CFG_LPM(GPIO75, AF4, PULL_HIGH)
#define GPIO25_MMC2_DAT1 MFP_CFG_LPM(GPIO25, AF4, PULL_HIGH)
#define GPIO76_MMC2_DAT1 MFP_CFG_LPM(GPIO76, AF4, PULL_HIGH)
#define GPIO26_MMC2_DAT2 MFP_CFG_LPM(GPIO26, AF4, PULL_HIGH)
#define GPIO77_MMC2_DAT2 MFP_CFG_LPM(GPIO77, AF4, PULL_HIGH)
#define GPIO27_MMC2_DAT3 MFP_CFG_LPM(GPIO27, AF4, PULL_HIGH)
#define GPIO78_MMC2_DAT3 MFP_CFG_LPM(GPIO78, AF4, PULL_HIGH)
/* 1-Wire */
#define GPIO14_ONE_WIRE MFP_CFG_LPM(GPIO14, AF5, FLOAT)
#define GPIO0_2_ONE_WIRE MFP_CFG_LPM(GPIO0_2, AF2, FLOAT)
/* SSP1 */
#define GPIO87_SSP1_EXTCLK MFP_CFG(GPIO87, AF1)
#define GPIO88_SSP1_SYSCLK MFP_CFG(GPIO88, AF1)
#define GPIO83_SSP1_SCLK MFP_CFG(GPIO83, AF1)
#define GPIO84_SSP1_SFRM MFP_CFG(GPIO84, AF1)
#define GPIO85_SSP1_RXD MFP_CFG(GPIO85, AF6)
#define GPIO85_SSP1_TXD MFP_CFG(GPIO85, AF1)
#define GPIO86_SSP1_RXD MFP_CFG(GPIO86, AF1)
#define GPIO86_SSP1_TXD MFP_CFG(GPIO86, AF6)
/* SSP2 */
#define GPIO39_SSP2_EXTCLK MFP_CFG(GPIO39, AF2)
#define GPIO40_SSP2_SYSCLK MFP_CFG(GPIO40, AF2)
#define GPIO12_SSP2_SCLK MFP_CFG(GPIO12, AF2)
#define GPIO35_SSP2_SCLK MFP_CFG(GPIO35, AF2)
#define GPIO36_SSP2_SFRM MFP_CFG(GPIO36, AF2)
#define GPIO37_SSP2_RXD MFP_CFG(GPIO37, AF5)
#define GPIO37_SSP2_TXD MFP_CFG(GPIO37, AF2)
#define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2)
#define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5)
#define GPIO69_SSP3_SCLK MFP_CFG_X(GPIO69, AF2, DS08X, FLOAT)
#define GPIO70_SSP3_FRM MFP_CFG_X(GPIO70, AF2, DS08X, DRIVE_LOW)
#define GPIO89_SSP3_SCLK MFP_CFG_X(GPIO89, AF1, DS08X, FLOAT)
#define GPIO90_SSP3_FRM MFP_CFG_X(GPIO90, AF1, DS08X, DRIVE_LOW)
#define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT)
#define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW)
#define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT)
#define GPIO72_SSP3_TXD MFP_CFG_X(GPIO72, AF5, DS08X, DRIVE_LOW)
#define GPIO91_SSP3_RXD MFP_CFG_X(GPIO91, AF5, DS08X, FLOAT)
#define GPIO91_SSP3_TXD MFP_CFG_X(GPIO91, AF1, DS08X, DRIVE_LOW)
#define GPIO92_SSP3_RXD MFP_CFG_X(GPIO92, AF1, DS08X, FLOAT)
#define GPIO92_SSP3_TXD MFP_CFG_X(GPIO92, AF5, DS08X, DRIVE_LOW)
#define GPIO93_SSP4_SCLK MFP_CFG_LPM(GPIO93, AF1, PULL_HIGH)
#define GPIO94_SSP4_FRM MFP_CFG_LPM(GPIO94, AF1, PULL_HIGH)
#define GPIO94_SSP4_RXD MFP_CFG_LPM(GPIO94, AF5, PULL_HIGH)
#define GPIO95_SSP4_RXD MFP_CFG_LPM(GPIO95, AF5, PULL_HIGH)
#define GPIO95_SSP4_TXD MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH)
#define GPIO96_SSP4_RXD MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH)
#define GPIO96_SSP4_TXD MFP_CFG_LPM(GPIO96, AF5, PULL_HIGH)
/* UART1 */
#define GPIO41_UART1_RXD MFP_CFG_LPM(GPIO41, AF2, FLOAT)
#define GPIO41_UART1_TXD MFP_CFG_LPM(GPIO41, AF4, FLOAT)
#define GPIO42_UART1_RXD MFP_CFG_LPM(GPIO42, AF4, FLOAT)
#define GPIO42_UART1_TXD MFP_CFG_LPM(GPIO42, AF2, FLOAT)
#define GPIO75_UART1_RXD MFP_CFG_LPM(GPIO75, AF1, FLOAT)
#define GPIO76_UART1_RXD MFP_CFG_LPM(GPIO76, AF3, FLOAT)
#define GPIO76_UART1_TXD MFP_CFG_LPM(GPIO76, AF1, FLOAT)
#define GPIO97_UART1_RXD MFP_CFG_LPM(GPIO97, AF1, FLOAT)
#define GPIO97_UART1_TXD MFP_CFG_LPM(GPIO97, AF6, FLOAT)
#define GPIO98_UART1_RXD MFP_CFG_LPM(GPIO98, AF6, FLOAT)
#define GPIO98_UART1_TXD MFP_CFG_LPM(GPIO98, AF1, FLOAT)
#define GPIO43_UART1_CTS MFP_CFG_LPM(GPIO43, AF2, FLOAT)
#define GPIO43_UART1_RTS MFP_CFG_LPM(GPIO43, AF4, FLOAT)
#define GPIO48_UART1_CTS MFP_CFG_LPM(GPIO48, AF4, FLOAT)
#define GPIO48_UART1_RTS MFP_CFG_LPM(GPIO48, AF2, FLOAT)
#define GPIO77_UART1_CTS MFP_CFG_LPM(GPIO77, AF1, FLOAT)
#define GPIO82_UART1_RTS MFP_CFG_LPM(GPIO82, AF1, FLOAT)
#define GPIO82_UART1_CTS MFP_CFG_LPM(GPIO82, AF3, FLOAT)
#define GPIO99_UART1_CTS MFP_CFG_LPM(GPIO99, AF1, FLOAT)
#define GPIO99_UART1_RTS MFP_CFG_LPM(GPIO99, AF6, FLOAT)
#define GPIO104_UART1_CTS MFP_CFG_LPM(GPIO104, AF6, FLOAT)
#define GPIO104_UART1_RTS MFP_CFG_LPM(GPIO104, AF1, FLOAT)
#define GPIO45_UART1_DTR MFP_CFG_LPM(GPIO45, AF4, FLOAT)
#define GPIO45_UART1_DSR MFP_CFG_LPM(GPIO45, AF2, FLOAT)
#define GPIO47_UART1_DTR MFP_CFG_LPM(GPIO47, AF2, FLOAT)
#define GPIO47_UART1_DSR MFP_CFG_LPM(GPIO47, AF4, FLOAT)
#define GPIO79_UART1_DSR MFP_CFG_LPM(GPIO79, AF1, FLOAT)
#define GPIO81_UART1_DTR MFP_CFG_LPM(GPIO81, AF1, FLOAT)
#define GPIO81_UART1_DSR MFP_CFG_LPM(GPIO81, AF3, FLOAT)
#define GPIO101_UART1_DTR MFP_CFG_LPM(GPIO101, AF6, FLOAT)
#define GPIO101_UART1_DSR MFP_CFG_LPM(GPIO101, AF1, FLOAT)
#define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF1, FLOAT)
#define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF6, FLOAT)
#define GPIO44_UART1_DCD MFP_CFG_LPM(GPIO44, AF2, FLOAT)
#define GPIO78_UART1_DCD MFP_CFG_LPM(GPIO78, AF1, FLOAT)
#define GPIO100_UART1_DCD MFP_CFG_LPM(GPIO100, AF1, FLOAT)
#define GPIO46_UART1_RI MFP_CFG_LPM(GPIO46, AF2, FLOAT)
#define GPIO80_UART1_RI MFP_CFG_LPM(GPIO80, AF1, FLOAT)
#define GPIO102_UART1_RI MFP_CFG_LPM(GPIO102, AF1, FLOAT)
/* UART2 */
#define GPIO109_UART2_CTS MFP_CFG_LPM(GPIO109, AF3, FLOAT)
#define GPIO109_UART2_RTS MFP_CFG_LPM(GPIO109, AF1, FLOAT)
#define GPIO112_UART2_CTS MFP_CFG_LPM(GPIO112, AF1, FLOAT)
#define GPIO112_UART2_RTS MFP_CFG_LPM(GPIO112, AF3, FLOAT)
#define GPIO110_UART2_RXD MFP_CFG_LPM(GPIO110, AF1, FLOAT)
#define GPIO110_UART2_TXD MFP_CFG_LPM(GPIO110, AF3, FLOAT)
#define GPIO111_UART2_RXD MFP_CFG_LPM(GPIO111, AF3, FLOAT)
#define GPIO111_UART2_TXD MFP_CFG_LPM(GPIO111, AF1, FLOAT)
/* UART3 */
#define GPIO89_UART3_CTS MFP_CFG_LPM(GPIO89, AF2, FLOAT)
#define GPIO89_UART3_RTS MFP_CFG_LPM(GPIO89, AF4, FLOAT)
#define GPIO90_UART3_CTS MFP_CFG_LPM(GPIO90, AF4, FLOAT)
#define GPIO90_UART3_RTS MFP_CFG_LPM(GPIO90, AF2, FLOAT)
#define GPIO105_UART3_CTS MFP_CFG_LPM(GPIO105, AF1, FLOAT)
#define GPIO105_UART3_RTS MFP_CFG_LPM(GPIO105, AF3, FLOAT)
#define GPIO106_UART3_CTS MFP_CFG_LPM(GPIO106, AF3, FLOAT)
#define GPIO106_UART3_RTS MFP_CFG_LPM(GPIO106, AF1, FLOAT)
#define GPIO30_UART3_RXD MFP_CFG_LPM(GPIO30, AF2, FLOAT)
#define GPIO30_UART3_TXD MFP_CFG_LPM(GPIO30, AF6, FLOAT)
#define GPIO31_UART3_RXD MFP_CFG_LPM(GPIO31, AF6, FLOAT)
#define GPIO31_UART3_TXD MFP_CFG_LPM(GPIO31, AF2, FLOAT)
#define GPIO91_UART3_RXD MFP_CFG_LPM(GPIO91, AF4, FLOAT)
#define GPIO91_UART3_TXD MFP_CFG_LPM(GPIO91, AF2, FLOAT)
#define GPIO92_UART3_RXD MFP_CFG_LPM(GPIO92, AF2, FLOAT)
#define GPIO92_UART3_TXD MFP_CFG_LPM(GPIO92, AF4, FLOAT)
#define GPIO107_UART3_RXD MFP_CFG_LPM(GPIO107, AF3, FLOAT)
#define GPIO107_UART3_TXD MFP_CFG_LPM(GPIO107, AF1, FLOAT)
#define GPIO108_UART3_RXD MFP_CFG_LPM(GPIO108, AF1, FLOAT)
#define GPIO108_UART3_TXD MFP_CFG_LPM(GPIO108, AF3, FLOAT)
/* USB 2.0 UTMI */
#define GPIO10_UTM_CLK MFP_CFG(GPIO10, AF1)
#define GPIO36_U2D_RXERROR MFP_CFG(GPIO36, AF3)
#define GPIO60_U2D_RXERROR MFP_CFG(GPIO60, AF1)
#define GPIO87_U2D_RXERROR MFP_CFG(GPIO87, AF5)
#define GPIO34_UTM_RXVALID MFP_CFG(GPIO34, AF3)
#define GPIO58_UTM_RXVALID MFP_CFG(GPIO58, AF2)
#define GPIO85_UTM_RXVALID MFP_CFG(GPIO85, AF5)
#define GPIO35_UTM_RXACTIVE MFP_CFG(GPIO35, AF3)
#define GPIO59_UTM_RXACTIVE MFP_CFG(GPIO59, AF1)
#define GPIO86_UTM_RXACTIVE MFP_CFG(GPIO86, AF5)
#define GPIO73_UTM_TXREADY MFP_CFG(GPIO73, AF1)
#define GPIO68_UTM_LINESTATE_0 MFP_CFG(GPIO68, AF3)
#define GPIO90_UTM_LINESTATE_0 MFP_CFG(GPIO90, AF3)
#define GPIO102_UTM_LINESTATE_0 MFP_CFG(GPIO102, AF3)
#define GPIO107_UTM_LINESTATE_0 MFP_CFG(GPIO107, AF4)
#define GPIO69_UTM_LINESTATE_1 MFP_CFG(GPIO69, AF3)
#define GPIO91_UTM_LINESTATE_1 MFP_CFG(GPIO91, AF3)
#define GPIO103_UTM_LINESTATE_1 MFP_CFG(GPIO103, AF3)
#define GPIO41_U2D_PHYDATA_0 MFP_CFG(GPIO41, AF3)
#define GPIO42_U2D_PHYDATA_1 MFP_CFG(GPIO42, AF3)
#define GPIO43_U2D_PHYDATA_2 MFP_CFG(GPIO43, AF3)
#define GPIO44_U2D_PHYDATA_3 MFP_CFG(GPIO44, AF3)
#define GPIO45_U2D_PHYDATA_4 MFP_CFG(GPIO45, AF3)
#define GPIO46_U2D_PHYDATA_5 MFP_CFG(GPIO46, AF3)
#define GPIO47_U2D_PHYDATA_6 MFP_CFG(GPIO47, AF3)
#define GPIO48_U2D_PHYDATA_7 MFP_CFG(GPIO48, AF3)
#define GPIO49_U2D_PHYDATA_0 MFP_CFG(GPIO49, AF3)
#define GPIO50_U2D_PHYDATA_1 MFP_CFG(GPIO50, AF3)
#define GPIO51_U2D_PHYDATA_2 MFP_CFG(GPIO51, AF3)
#define GPIO52_U2D_PHYDATA_3 MFP_CFG(GPIO52, AF3)
#define GPIO53_U2D_PHYDATA_4 MFP_CFG(GPIO53, AF3)
#define GPIO54_U2D_PHYDATA_5 MFP_CFG(GPIO54, AF3)
#define GPIO55_U2D_PHYDATA_6 MFP_CFG(GPIO55, AF3)
#define GPIO56_U2D_PHYDATA_7 MFP_CFG(GPIO56, AF3)
#define GPIO37_U2D_OPMODE0 MFP_CFG(GPIO37, AF4)
#define GPIO61_U2D_OPMODE0 MFP_CFG(GPIO61, AF2)
#define GPIO88_U2D_OPMODE0 MFP_CFG(GPIO88, AF7)
#define GPIO38_U2D_OPMODE1 MFP_CFG(GPIO38, AF4)
#define GPIO62_U2D_OPMODE1 MFP_CFG(GPIO62, AF2)
#define GPIO104_U2D_OPMODE1 MFP_CFG(GPIO104, AF4)
#define GPIO108_U2D_OPMODE1 MFP_CFG(GPIO108, AF5)
#define GPIO74_U2D_RESET MFP_CFG(GPIO74, AF1)
#define GPIO93_U2D_RESET MFP_CFG(GPIO93, AF2)
#define GPIO98_U2D_RESET MFP_CFG(GPIO98, AF3)
#define GPIO67_U2D_SUSPEND MFP_CFG(GPIO67, AF3)
#define GPIO96_U2D_SUSPEND MFP_CFG(GPIO96, AF2)
#define GPIO101_U2D_SUSPEND MFP_CFG(GPIO101, AF3)
#define GPIO66_U2D_TERM_SEL MFP_CFG(GPIO66, AF5)
#define GPIO95_U2D_TERM_SEL MFP_CFG(GPIO95, AF3)
#define GPIO97_U2D_TERM_SEL MFP_CFG(GPIO97, AF7)
#define GPIO100_U2D_TERM_SEL MFP_CFG(GPIO100, AF5)
#define GPIO39_U2D_TXVALID MFP_CFG(GPIO39, AF4)
#define GPIO70_U2D_TXVALID MFP_CFG(GPIO70, AF5)
#define GPIO83_U2D_TXVALID MFP_CFG(GPIO83, AF7)
#define GPIO65_U2D_XCVR_SEL MFP_CFG(GPIO65, AF5)
#define GPIO94_U2D_XCVR_SEL MFP_CFG(GPIO94, AF3)
#define GPIO99_U2D_XCVR_SEL MFP_CFG(GPIO99, AF5)
/* USB Host 1.1 */
#define GPIO2_2_USBH_PEN MFP_CFG(GPIO2_2, AF1)
#define GPIO3_2_USBH_PWR MFP_CFG(GPIO3_2, AF1)
/* USB P2 */
#define GPIO97_USB_P2_2 MFP_CFG(GPIO97, AF2)
#define GPIO97_USB_P2_6 MFP_CFG(GPIO97, AF4)
#define GPIO98_USB_P2_2 MFP_CFG(GPIO98, AF4)
#define GPIO98_USB_P2_6 MFP_CFG(GPIO98, AF2)
#define GPIO99_USB_P2_1 MFP_CFG(GPIO99, AF2)
#define GPIO100_USB_P2_4 MFP_CFG(GPIO100, AF2)
#define GPIO101_USB_P2_8 MFP_CFG(GPIO101, AF2)
#define GPIO102_USB_P2_3 MFP_CFG(GPIO102, AF2)
#define GPIO103_USB_P2_5 MFP_CFG(GPIO103, AF2)
#define GPIO104_USB_P2_7 MFP_CFG(GPIO104, AF2)
/* USB P3 */
#define GPIO75_USB_P3_1 MFP_CFG(GPIO75, AF2)
#define GPIO76_USB_P3_2 MFP_CFG(GPIO76, AF2)
#define GPIO77_USB_P3_3 MFP_CFG(GPIO77, AF2)
#define GPIO78_USB_P3_4 MFP_CFG(GPIO78, AF2)
#define GPIO79_USB_P3_5 MFP_CFG(GPIO79, AF2)
#define GPIO80_USB_P3_6 MFP_CFG(GPIO80, AF2)
#define GPIO13_CHOUT0 MFP_CFG(GPIO13, AF6)
#define GPIO14_CHOUT1 MFP_CFG(GPIO14, AF6)
#define GPIO2_RDY MFP_CFG(GPIO2, AF1)
#define GPIO5_NPIOR MFP_CFG(GPIO5, AF3)
#define GPIO6_NPIOW MFP_CFG(GPIO6, AF3)
#define GPIO7_NPIOS16 MFP_CFG(GPIO7, AF3)
#define GPIO8_NPWAIT MFP_CFG(GPIO8, AF3)
#define GPIO11_PWM0_OUT MFP_CFG(GPIO11, AF1)
#define GPIO12_PWM1_OUT MFP_CFG(GPIO12, AF1)
#define GPIO13_PWM2_OUT MFP_CFG(GPIO13, AF1)
#define GPIO14_PWM3_OUT MFP_CFG(GPIO14, AF1)
#endif /* __ASM_ARCH_MFP_PXA320_H */

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arch/arm/mach-pxa/mioa701.c
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@ -1,784 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Handles the Mitac Mio A701 Board
*
* Copyright (C) 2008 Robert Jarzmik
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/syscore_ops.h>
#include <linux/input.h>
#include <linux/delay.h>
#include <linux/gpio_keys.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/rtc.h>
#include <linux/leds.h>
#include <linux/gpio.h>
#include <linux/gpio/machine.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/pda_power.h>
#include <linux/power_supply.h>
#include <linux/wm97xx.h>
#include <linux/mtd/physmap.h>
#include <linux/reboot.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/max1586.h>
#include <linux/slab.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "pxa27x.h"
#include "regs-rtc.h"
#include <linux/platform_data/keypad-pxa27x.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include "udc.h"
#include "pxa27x-udc.h"
#include <linux/platform_data/media/camera-pxa.h>
#include <linux/platform_data/asoc-pxa.h>
#include "smemc.h"
#include "mioa701.h"
#include "generic.h"
#include "devices.h"
static unsigned long mioa701_pin_config[] = {
/* Mio global */
MIO_CFG_OUT(GPIO9_CHARGE_EN, AF0, DRIVE_LOW),
MIO_CFG_OUT(GPIO18_POWEROFF, AF0, DRIVE_LOW),
MFP_CFG_OUT(GPIO3, AF0, DRIVE_HIGH),
MFP_CFG_OUT(GPIO4, AF0, DRIVE_HIGH),
MIO_CFG_IN(GPIO80_MAYBE_CHARGE_VDROP, AF0),
/* Backlight PWM 0 */
GPIO16_PWM0_OUT,
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
MIO_CFG_IN(GPIO78_SDIO_RO, AF0),
MIO_CFG_IN(GPIO15_SDIO_INSERT, AF0),
MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW),
/* USB */
MIO_CFG_IN(GPIO13_nUSB_DETECT, AF0),
MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW),
/* LCD */
GPIOxx_LCD_TFT_16BPP,
/* QCI */
GPIO12_CIF_DD_7,
GPIO17_CIF_DD_6,
GPIO50_CIF_DD_3,
GPIO51_CIF_DD_2,
GPIO52_CIF_DD_4,
GPIO53_CIF_MCLK,
GPIO54_CIF_PCLK,
GPIO55_CIF_DD_1,
GPIO81_CIF_DD_0,
GPIO82_CIF_DD_5,
GPIO84_CIF_FV,
GPIO85_CIF_LV,
MIO_CFG_OUT(GPIO56_MT9M111_nOE, AF0, DRIVE_LOW),
/* Bluetooth */
MIO_CFG_IN(GPIO14_BT_nACTIVITY, AF0),
GPIO44_BTUART_CTS,
GPIO42_BTUART_RXD,
GPIO45_BTUART_RTS,
GPIO43_BTUART_TXD,
MIO_CFG_OUT(GPIO83_BT_ON, AF0, DRIVE_LOW),
MIO_CFG_OUT(GPIO77_BT_UNKNOWN1, AF0, DRIVE_HIGH),
MIO_CFG_OUT(GPIO86_BT_MAYBE_nRESET, AF0, DRIVE_HIGH),
/* GPS */
MIO_CFG_OUT(GPIO23_GPS_UNKNOWN1, AF0, DRIVE_LOW),
MIO_CFG_OUT(GPIO26_GPS_ON, AF0, DRIVE_LOW),
MIO_CFG_OUT(GPIO27_GPS_RESET, AF0, DRIVE_LOW),
MIO_CFG_OUT(GPIO106_GPS_UNKNOWN2, AF0, DRIVE_LOW),
MIO_CFG_OUT(GPIO107_GPS_UNKNOWN3, AF0, DRIVE_LOW),
GPIO46_STUART_RXD,
GPIO47_STUART_TXD,
/* GSM */
MIO_CFG_OUT(GPIO24_GSM_MOD_RESET_CMD, AF0, DRIVE_LOW),
MIO_CFG_OUT(GPIO88_GSM_nMOD_ON_CMD, AF0, DRIVE_HIGH),
MIO_CFG_OUT(GPIO90_GSM_nMOD_OFF_CMD, AF0, DRIVE_HIGH),
MIO_CFG_OUT(GPIO114_GSM_nMOD_DTE_UART_STATE, AF0, DRIVE_HIGH),
MIO_CFG_IN(GPIO25_GSM_MOD_ON_STATE, AF0),
MIO_CFG_IN(GPIO113_GSM_EVENT, AF0) | WAKEUP_ON_EDGE_BOTH,
GPIO34_FFUART_RXD,
GPIO35_FFUART_CTS,
GPIO36_FFUART_DCD,
GPIO37_FFUART_DSR,
GPIO39_FFUART_TXD,
GPIO40_FFUART_DTR,
GPIO41_FFUART_RTS,
/* Sound */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO89_AC97_SYSCLK,
MIO_CFG_IN(GPIO12_HPJACK_INSERT, AF0),
/* Leds */
MIO_CFG_OUT(GPIO10_LED_nCharging, AF0, DRIVE_HIGH),
MIO_CFG_OUT(GPIO97_LED_nBlue, AF0, DRIVE_HIGH),
MIO_CFG_OUT(GPIO98_LED_nOrange, AF0, DRIVE_HIGH),
MIO_CFG_OUT(GPIO82_LED_nVibra, AF0, DRIVE_HIGH),
MIO_CFG_OUT(GPIO115_LED_nKeyboard, AF0, DRIVE_HIGH),
/* Keyboard */
MIO_CFG_IN(GPIO0_KEY_POWER, AF0) | WAKEUP_ON_EDGE_BOTH,
MIO_CFG_IN(GPIO93_KEY_VOLUME_UP, AF0),
MIO_CFG_IN(GPIO94_KEY_VOLUME_DOWN, AF0),
GPIO100_KP_MKIN_0,
GPIO101_KP_MKIN_1,
GPIO102_KP_MKIN_2,
GPIO103_KP_MKOUT_0,
GPIO104_KP_MKOUT_1,
GPIO105_KP_MKOUT_2,
/* I2C */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
/* Unknown */
MFP_CFG_IN(GPIO20, AF0),
MFP_CFG_IN(GPIO21, AF0),
MFP_CFG_IN(GPIO33, AF0),
MFP_CFG_OUT(GPIO49, AF0, DRIVE_HIGH),
MFP_CFG_OUT(GPIO57, AF0, DRIVE_HIGH),
MFP_CFG_IN(GPIO96, AF0),
MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH),
};
static struct pwm_lookup mioa701_pwm_lookup[] = {
PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight", NULL, 4000 * 1024,
PWM_POLARITY_NORMAL),
};
/* LCD Screen and Backlight */
static struct platform_pwm_backlight_data mioa701_backlight_data = {
.max_brightness = 100,
.dft_brightness = 50,
};
/*
* LTM0305A776C LCD panel timings
*
* see:
* - the LTM0305A776C datasheet,
* - and the PXA27x Programmers' manual
*/
static struct pxafb_mode_info mioa701_ltm0305a776c = {
.pixclock = 220000, /* CLK=4.545 MHz */
.xres = 240,
.yres = 320,
.bpp = 16,
.hsync_len = 4,
.vsync_len = 2,
.left_margin = 6,
.right_margin = 4,
.upper_margin = 5,
.lower_margin = 3,
};
static void mioa701_lcd_power(int on, struct fb_var_screeninfo *si)
{
gpio_set_value(GPIO87_LCD_POWER, on);
}
static struct pxafb_mach_info mioa701_pxafb_info = {
.modes = &mioa701_ltm0305a776c,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
.pxafb_lcd_power = mioa701_lcd_power,
};
/*
* Keyboard configuration
*/
static const unsigned int mioa701_matrix_keys[] = {
KEY(0, 0, KEY_UP),
KEY(0, 1, KEY_RIGHT),
KEY(0, 2, KEY_MEDIA),
KEY(1, 0, KEY_DOWN),
KEY(1, 1, KEY_ENTER),
KEY(1, 2, KEY_CONNECT), /* GPS key */
KEY(2, 0, KEY_LEFT),
KEY(2, 1, KEY_PHONE), /* Phone Green key */
KEY(2, 2, KEY_CAMERA) /* Camera key */
};
static struct matrix_keymap_data mioa701_matrix_keymap_data = {
.keymap = mioa701_matrix_keys,
.keymap_size = ARRAY_SIZE(mioa701_matrix_keys),
};
static struct pxa27x_keypad_platform_data mioa701_keypad_info = {
.matrix_key_rows = 3,
.matrix_key_cols = 3,
.matrix_keymap_data = &mioa701_matrix_keymap_data,
};
/*
* GPIO Key Configuration
*/
#define MIO_KEY(key, _gpio, _desc, _wakeup) \
{ .code = (key), .gpio = (_gpio), .active_low = 0, \
.desc = (_desc), .type = EV_KEY, .wakeup = (_wakeup) }
static struct gpio_keys_button mioa701_button_table[] = {
MIO_KEY(KEY_EXIT, GPIO0_KEY_POWER, "Power button", 1),
MIO_KEY(KEY_VOLUMEUP, GPIO93_KEY_VOLUME_UP, "Volume up", 0),
MIO_KEY(KEY_VOLUMEDOWN, GPIO94_KEY_VOLUME_DOWN, "Volume down", 0),
MIO_KEY(KEY_HP, GPIO12_HPJACK_INSERT, "HP jack detect", 0)
};
static struct gpio_keys_platform_data mioa701_gpio_keys_data = {
.buttons = mioa701_button_table,
.nbuttons = ARRAY_SIZE(mioa701_button_table),
};
/*
* Leds and vibrator
*/
#define ONE_LED(_gpio, _name) \
{ .gpio = (_gpio), .name = (_name), .active_low = true }
static struct gpio_led gpio_leds[] = {
ONE_LED(GPIO10_LED_nCharging, "mioa701:charging"),
ONE_LED(GPIO97_LED_nBlue, "mioa701:blue"),
ONE_LED(GPIO98_LED_nOrange, "mioa701:orange"),
ONE_LED(GPIO82_LED_nVibra, "mioa701:vibra"),
ONE_LED(GPIO115_LED_nKeyboard, "mioa701:keyboard")
};
static struct gpio_led_platform_data gpio_led_info = {
.leds = gpio_leds,
.num_leds = ARRAY_SIZE(gpio_leds),
};
/*
* GSM Sagem XS200 chip
*
* GSM handling was purged from kernel. For history, this is the way to go :
* - init : GPIO24_GSM_MOD_RESET_CMD = 0, GPIO114_GSM_nMOD_DTE_UART_STATE = 1
* GPIO88_GSM_nMOD_ON_CMD = 1, GPIO90_GSM_nMOD_OFF_CMD = 1
* - reset : GPIO24_GSM_MOD_RESET_CMD = 1, msleep(100),
* GPIO24_GSM_MOD_RESET_CMD = 0
* - turn on : GPIO88_GSM_nMOD_ON_CMD = 0, msleep(1000),
* GPIO88_GSM_nMOD_ON_CMD = 1
* - turn off : GPIO90_GSM_nMOD_OFF_CMD = 0, msleep(1000),
* GPIO90_GSM_nMOD_OFF_CMD = 1
*/
static int is_gsm_on(void)
{
int is_on;
is_on = !!gpio_get_value(GPIO25_GSM_MOD_ON_STATE);
return is_on;
}
irqreturn_t gsm_on_irq(int irq, void *p)
{
printk(KERN_DEBUG "Mioa701: GSM status changed to %s\n",
is_gsm_on() ? "on" : "off");
return IRQ_HANDLED;
}
static struct gpio gsm_gpios[] = {
{ GPIO25_GSM_MOD_ON_STATE, GPIOF_IN, "GSM state" },
{ GPIO113_GSM_EVENT, GPIOF_IN, "GSM event" },
};
static int __init gsm_init(void)
{
int rc;
rc = gpio_request_array(ARRAY_AND_SIZE(gsm_gpios));
if (rc)
goto err_gpio;
rc = request_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), gsm_on_irq,
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
"GSM XS200 Power Irq", NULL);
if (rc)
goto err_irq;
gpio_set_wake(GPIO113_GSM_EVENT, 1);
return 0;
err_irq:
printk(KERN_ERR "Mioa701: Can't request GSM_ON irq\n");
gpio_free_array(ARRAY_AND_SIZE(gsm_gpios));
err_gpio:
printk(KERN_ERR "Mioa701: gsm not available\n");
return rc;
}
static void gsm_exit(void)
{
free_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), NULL);
gpio_free_array(ARRAY_AND_SIZE(gsm_gpios));
}
/*
* Bluetooth BRF6150 chip
*
* BT handling was purged from kernel. For history, this is the way to go :
* - turn on : GPIO83_BT_ON = 1
* - turn off : GPIO83_BT_ON = 0
*/
/*
* GPS Sirf Star III chip
*
* GPS handling was purged from kernel. For history, this is the way to go :
* - init : GPIO23_GPS_UNKNOWN1 = 1, GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0
* GPIO106_GPS_UNKNOWN2 = 0, GPIO107_GPS_UNKNOWN3 = 0
* - turn on : GPIO27_GPS_RESET = 1, GPIO26_GPS_ON = 1
* - turn off : GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0
*/
/*
* USB UDC
*/
static int is_usb_connected(void)
{
return !gpio_get_value(GPIO13_nUSB_DETECT);
}
static struct pxa2xx_udc_mach_info mioa701_udc_info = {
.udc_is_connected = is_usb_connected,
.gpio_pullup = GPIO22_USB_ENABLE,
};
static struct gpiod_lookup_table gpio_vbus_gpiod_table = {
.dev_id = "gpio-vbus",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO13_nUSB_DETECT,
"vbus", GPIO_ACTIVE_LOW),
{ },
},
};
/*
* SDIO/MMC Card controller
*/
/**
* The card detect interrupt isn't debounced so we delay it by 250ms
* to give the card a chance to fully insert/eject.
*/
static struct pxamci_platform_data mioa701_mci_info = {
.detect_delay_ms = 250,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
};
static struct gpiod_lookup_table mioa701_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
/* Card detect on GPIO 15 */
GPIO_LOOKUP("gpio-pxa", GPIO15_SDIO_INSERT,
"cd", GPIO_ACTIVE_LOW),
/* Write protect on GPIO 78 */
GPIO_LOOKUP("gpio-pxa", GPIO78_SDIO_RO,
"wp", GPIO_ACTIVE_LOW),
/* Power on GPIO 91 */
GPIO_LOOKUP("gpio-pxa", GPIO91_SDIO_EN,
"power", GPIO_ACTIVE_HIGH),
{ },
},
};
/* FlashRAM */
static struct resource docg3_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_8K - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device docg3 = {
.name = "docg3",
.id = -1,
.resource = &docg3_resource,
.num_resources = 1,
.dev = {
.platform_data = NULL,
},
};
/*
* Suspend/Resume bootstrap management
*
* MIO A701 reboot sequence is highly ROM dependent. From the one dissassembled,
* this sequence is as follows :
* - disables interrupts
* - initialize SDRAM (self refresh RAM into active RAM)
* - initialize GPIOs (depends on value at 0xa020b020)
* - initialize coprossessors
* - if edge detect on PWR_SCL(GPIO3), then proceed to cold start
* - or if value at 0xa020b000 not equal to 0x0f0f0f0f, proceed to cold start
* - else do a resume, ie. jump to addr 0xa0100000
*/
#define RESUME_ENABLE_ADDR 0xa020b000
#define RESUME_ENABLE_VAL 0x0f0f0f0f
#define RESUME_BT_ADDR 0xa020b020
#define RESUME_UNKNOWN_ADDR 0xa020b024
#define RESUME_VECTOR_ADDR 0xa0100000
#define BOOTSTRAP_WORDS mioa701_bootstrap_lg/4
static u32 *save_buffer;
static void install_bootstrap(void)
{
int i;
u32 *rom_bootstrap = phys_to_virt(RESUME_VECTOR_ADDR);
u32 *src = &mioa701_bootstrap;
for (i = 0; i < BOOTSTRAP_WORDS; i++)
rom_bootstrap[i] = src[i];
}
static int mioa701_sys_suspend(void)
{
int i = 0, is_bt_on;
u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR);
u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR);
u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR);
u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR);
/* Devices prepare suspend */
is_bt_on = !!gpio_get_value(GPIO83_BT_ON);
pxa2xx_mfp_set_lpm(GPIO83_BT_ON,
is_bt_on ? MFP_LPM_DRIVE_HIGH : MFP_LPM_DRIVE_LOW);
for (i = 0; i < BOOTSTRAP_WORDS; i++)
save_buffer[i] = mem_resume_vector[i];
save_buffer[i++] = *mem_resume_enabler;
save_buffer[i++] = *mem_resume_bt;
save_buffer[i++] = *mem_resume_unknown;
*mem_resume_enabler = RESUME_ENABLE_VAL;
*mem_resume_bt = is_bt_on;
install_bootstrap();
return 0;
}
static void mioa701_sys_resume(void)
{
int i = 0;
u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR);
u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR);
u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR);
u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR);
for (i = 0; i < BOOTSTRAP_WORDS; i++)
mem_resume_vector[i] = save_buffer[i];
*mem_resume_enabler = save_buffer[i++];
*mem_resume_bt = save_buffer[i++];
*mem_resume_unknown = save_buffer[i++];
}
static struct syscore_ops mioa701_syscore_ops = {
.suspend = mioa701_sys_suspend,
.resume = mioa701_sys_resume,
};
static int __init bootstrap_init(void)
{
int save_size = mioa701_bootstrap_lg + (sizeof(u32) * 3);
register_syscore_ops(&mioa701_syscore_ops);
save_buffer = kmalloc(save_size, GFP_KERNEL);
if (!save_buffer)
return -ENOMEM;
printk(KERN_INFO "MioA701: allocated %d bytes for bootstrap\n",
save_size);
return 0;
}
static void bootstrap_exit(void)
{
kfree(save_buffer);
unregister_syscore_ops(&mioa701_syscore_ops);
printk(KERN_CRIT "Unregistering mioa701 suspend will hang next"
"resume !!!\n");
}
/*
* Power Supply
*/
static char *supplicants[] = {
"mioa701_battery"
};
static int is_ac_connected(void)
{
return gpio_get_value(GPIO96_AC_DETECT);
}
static void mioa701_set_charge(int flags)
{
gpio_set_value(GPIO9_CHARGE_EN, (flags == PDA_POWER_CHARGE_USB));
}
static struct pda_power_pdata power_pdata = {
.is_ac_online = is_ac_connected,
.is_usb_online = is_usb_connected,
.set_charge = mioa701_set_charge,
.supplied_to = supplicants,
.num_supplicants = ARRAY_SIZE(supplicants),
};
static struct resource power_resources[] = {
[0] = {
.name = "ac",
.start = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
.end = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
IORESOURCE_IRQ_LOWEDGE,
},
[1] = {
.name = "usb",
.start = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
.end = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
IORESOURCE_IRQ_LOWEDGE,
},
};
static struct platform_device power_dev = {
.name = "pda-power",
.id = -1,
.resource = power_resources,
.num_resources = ARRAY_SIZE(power_resources),
.dev = {
.platform_data = &power_pdata,
},
};
static struct wm97xx_batt_pdata mioa701_battery_data = {
.batt_aux = WM97XX_AUX_ID1,
.temp_aux = -1,
.min_voltage = 0xc00,
.max_voltage = 0xfc0,
.batt_tech = POWER_SUPPLY_TECHNOLOGY_LION,
.batt_div = 1,
.batt_mult = 1,
.batt_name = "mioa701_battery",
};
static struct wm97xx_pdata mioa701_wm97xx_pdata = {
.batt_pdata = &mioa701_battery_data,
};
/*
* Voltage regulation
*/
static struct regulator_consumer_supply max1586_consumers[] = {
REGULATOR_SUPPLY("vcc_core", NULL),
};
static struct regulator_init_data max1586_v3_info = {
.constraints = {
.name = "vcc_core range",
.min_uV = 1000000,
.max_uV = 1705000,
.always_on = 1,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
},
.num_consumer_supplies = ARRAY_SIZE(max1586_consumers),
.consumer_supplies = max1586_consumers,
};
static struct max1586_subdev_data max1586_subdevs[] = {
{ .name = "vcc_core", .id = MAX1586_V3,
.platform_data = &max1586_v3_info },
};
static struct max1586_platform_data max1586_info = {
.subdevs = max1586_subdevs,
.num_subdevs = ARRAY_SIZE(max1586_subdevs),
.v3_gain = MAX1586_GAIN_NO_R24, /* 700..1475 mV */
};
/*
* Camera interface
*/
struct pxacamera_platform_data mioa701_pxacamera_platform_data = {
.flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 |
PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN,
.mclk_10khz = 5000,
.sensor_i2c_adapter_id = 0,
.sensor_i2c_address = 0x5d,
};
static struct i2c_board_info __initdata mioa701_pi2c_devices[] = {
{
I2C_BOARD_INFO("max1586", 0x14),
.platform_data = &max1586_info,
},
};
/* Board I2C devices. */
static struct i2c_board_info mioa701_i2c_devices[] = {
{
I2C_BOARD_INFO("mt9m111", 0x5d),
},
};
struct i2c_pxa_platform_data i2c_pdata = {
.fast_mode = 1,
};
static pxa2xx_audio_ops_t mioa701_ac97_info = {
.reset_gpio = 95,
.codec_pdata = { &mioa701_wm97xx_pdata, },
};
/*
* Mio global
*/
/* Devices */
#define MIO_PARENT_DEV(var, strname, tparent, pdata) \
static struct platform_device var = { \
.name = strname, \
.id = -1, \
.dev = { \
.platform_data = pdata, \
.parent = tparent, \
}, \
};
#define MIO_SIMPLE_DEV(var, strname, pdata) \
MIO_PARENT_DEV(var, strname, NULL, pdata)
MIO_SIMPLE_DEV(mioa701_gpio_keys, "gpio-keys", &mioa701_gpio_keys_data)
MIO_PARENT_DEV(mioa701_backlight, "pwm-backlight", &pxa27x_device_pwm0.dev,
&mioa701_backlight_data);
MIO_SIMPLE_DEV(mioa701_led, "leds-gpio", &gpio_led_info)
MIO_SIMPLE_DEV(pxa2xx_pcm, "pxa2xx-pcm", NULL)
MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL)
MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL)
MIO_SIMPLE_DEV(gpio_vbus, "gpio-vbus", NULL);
static struct platform_device *devices[] __initdata = {
&mioa701_gpio_keys,
&mioa701_backlight,
&mioa701_led,
&pxa2xx_pcm,
&mioa701_sound,
&power_dev,
&docg3,
&gpio_vbus,
&mioa701_board,
};
static void mioa701_machine_exit(void);
static void mioa701_poweroff(void)
{
mioa701_machine_exit();
pxa_restart(REBOOT_SOFT, NULL);
}
static void mioa701_restart(enum reboot_mode c, const char *cmd)
{
mioa701_machine_exit();
pxa_restart(REBOOT_SOFT, cmd);
}
static struct gpio global_gpios[] = {
{ GPIO9_CHARGE_EN, GPIOF_OUT_INIT_HIGH, "Charger enable" },
{ GPIO18_POWEROFF, GPIOF_OUT_INIT_LOW, "Power Off" },
{ GPIO87_LCD_POWER, GPIOF_OUT_INIT_LOW, "LCD Power" },
{ GPIO56_MT9M111_nOE, GPIOF_OUT_INIT_LOW, "Camera nOE" },
};
static struct regulator_consumer_supply fixed_5v0_consumers[] = {
REGULATOR_SUPPLY("power", "pwm-backlight"),
};
static void __init mioa701_machine_init(void)
{
int rc;
PSLR = 0xff100000; /* SYSDEL=125ms, PWRDEL=125ms, PSLR_SL_ROD=1 */
PCFR = PCFR_DC_EN | PCFR_GPR_EN | PCFR_OPDE;
RTTR = 32768 - 1; /* Reset crazy WinCE value */
UP2OCR = UP2OCR_HXOE;
/*
* Set up the flash memory : DiskOnChip G3 on first static memory bank
*/
__raw_writel(0x7ff02dd8, MSC0);
__raw_writel(0x0001c391, MCMEM0);
__raw_writel(0x0001c391, MCATT0);
__raw_writel(0x0001c391, MCIO0);
pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
rc = gpio_request_array(ARRAY_AND_SIZE(global_gpios));
if (rc)
pr_err("MioA701: Failed to request GPIOs: %d", rc);
bootstrap_init();
pxa_set_fb_info(NULL, &mioa701_pxafb_info);
gpiod_add_lookup_table(&mioa701_mci_gpio_table);
pxa_set_mci_info(&mioa701_mci_info);
pxa_set_keypad_info(&mioa701_keypad_info);
pxa_set_udc_info(&mioa701_udc_info);
pxa_set_ac97_info(&mioa701_ac97_info);
pm_power_off = mioa701_poweroff;
pwm_add_table(mioa701_pwm_lookup, ARRAY_SIZE(mioa701_pwm_lookup));
gpiod_add_lookup_table(&gpio_vbus_gpiod_table);
platform_add_devices(devices, ARRAY_SIZE(devices));
gsm_init();
i2c_register_board_info(0, ARRAY_AND_SIZE(mioa701_i2c_devices));
i2c_register_board_info(1, ARRAY_AND_SIZE(mioa701_pi2c_devices));
pxa_set_i2c_info(&i2c_pdata);
pxa27x_set_i2c_power_info(NULL);
pxa_set_camera_info(&mioa701_pxacamera_platform_data);
regulator_register_always_on(0, "fixed-5.0V", fixed_5v0_consumers,
ARRAY_SIZE(fixed_5v0_consumers),
5000000);
regulator_has_full_constraints();
}
static void mioa701_machine_exit(void)
{
bootstrap_exit();
gsm_exit();
}
MACHINE_START(MIOA701, "MIO A701")
.atag_offset = 0x100,
.map_io = &pxa27x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = &pxa27x_init_irq,
.handle_irq = &pxa27x_handle_irq,
.init_machine = mioa701_machine_init,
.init_time = pxa_timer_init,
.restart = mioa701_restart,
MACHINE_END

76
arch/arm/mach-pxa/mioa701.h
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@ -1,76 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _MIOA701_H_
#define _MIOA701_H_
#define MIO_CFG_IN(pin, af) \
((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK)) |\
(MFP_PIN(pin) | MFP_##af | MFP_DIR_IN))
#define MIO_CFG_OUT(pin, af, state) \
((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK | MFP_LPM_STATE_MASK)) |\
(MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state))
/* Global GPIOs */
#define GPIO9_CHARGE_EN 9
#define GPIO18_POWEROFF 18
#define GPIO87_LCD_POWER 87
#define GPIO96_AC_DETECT 96
#define GPIO80_MAYBE_CHARGE_VDROP 80 /* Drop of 88mV */
/* USB */
#define GPIO13_nUSB_DETECT 13
#define GPIO22_USB_ENABLE 22
/* SDIO bits */
#define GPIO78_SDIO_RO 78
#define GPIO15_SDIO_INSERT 15
#define GPIO91_SDIO_EN 91
/* Bluetooth */
#define GPIO14_BT_nACTIVITY 14
#define GPIO83_BT_ON 83
#define GPIO77_BT_UNKNOWN1 77
#define GPIO86_BT_MAYBE_nRESET 86
/* GPS */
#define GPIO23_GPS_UNKNOWN1 23
#define GPIO26_GPS_ON 26
#define GPIO27_GPS_RESET 27
#define GPIO106_GPS_UNKNOWN2 106
#define GPIO107_GPS_UNKNOWN3 107
/* GSM */
#define GPIO24_GSM_MOD_RESET_CMD 24
#define GPIO88_GSM_nMOD_ON_CMD 88
#define GPIO90_GSM_nMOD_OFF_CMD 90
#define GPIO114_GSM_nMOD_DTE_UART_STATE 114
#define GPIO25_GSM_MOD_ON_STATE 25
#define GPIO113_GSM_EVENT 113
/* SOUND */
#define GPIO12_HPJACK_INSERT 12
/* LEDS */
#define GPIO10_LED_nCharging 10
#define GPIO97_LED_nBlue 97
#define GPIO98_LED_nOrange 98
#define GPIO82_LED_nVibra 82
#define GPIO115_LED_nKeyboard 115
/* Keyboard */
#define GPIO0_KEY_POWER 0
#define GPIO93_KEY_VOLUME_UP 93
#define GPIO94_KEY_VOLUME_DOWN 94
/* Camera */
#define GPIO56_MT9M111_nOE 56
extern struct input_dev *mioa701_evdev;
extern void mioa701_gpio_lpm_set(unsigned long mfp_pin);
/* Assembler externals mioa701_bootresume.S */
extern u32 mioa701_bootstrap;
extern u32 mioa701_jumpaddr;
extern u32 mioa701_bootstrap_lg;
#endif /* _MIOA701_H */

38
arch/arm/mach-pxa/mioa701_bootresume.S
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@ -1,38 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Bootloader to resume MIO A701
*
* 2007-1-12 Robert Jarzmik
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
/*
* Note: Yes, part of the following code is located into the .data section.
* This is to allow jumpaddr to be accessed with a relative load
* while we can't rely on any MMU translation. We could have put
* sleep_save_sp in the .text section as well, but some setups might
* insist on it to be truly read-only.
*/
.data
.align 2
ENTRY(mioa701_bootstrap)
0:
b 1f
ENTRY(mioa701_jumpaddr)
.word 0x40f00008 @ PSPR in no-MMU mode
1:
mov r0, #0xa0000000 @ Don't suppose memory access works
orr r0, r0, #0x00200000 @ even if it's supposed to
orr r0, r0, #0x0000b000
mov r1, #0
str r1, [r0] @ Early disable resume for next boot
ldr r0, mioa701_jumpaddr @ (Murphy's Law)
ldr r0, [r0]
ret r0
2:
ENTRY(mioa701_bootstrap_lg)
.data
.align 2
.word 2b-0b

101
arch/arm/mach-pxa/mp900.c
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@ -1,101 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/mp900.c
*
* Support for the NEC MobilePro900/C platform
*
* Based on mach-pxa/gumstix.c
*
* 2007, 2008 Kristoffer Ericson <kristoffer.ericson@gmail.com>
* 2007, 2008 Michael Petchkovsky <mkpetch@internode.on.net>
*/
#include <linux/init.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/usb/isp116x.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "pxa25x.h"
#include "generic.h"
static void isp116x_pfm_delay(struct device *dev, int delay)
{
/* 400MHz PXA2 = 2.5ns / instruction */
int cyc = delay / 10;
/* 4 Instructions = 4 x 2.5ns = 10ns */
__asm__ volatile ("0:\n"
"subs %0, %1, #1\n"
"bge 0b\n"
:"=r" (cyc)
:"0"(cyc)
);
}
static struct isp116x_platform_data isp116x_pfm_data = {
.remote_wakeup_enable = 1,
.delay = isp116x_pfm_delay,
};
static struct resource isp116x_pfm_resources[] = {
[0] = {
.start = 0x0d000000,
.end = 0x0d000000 + 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0x0d000000 + 4,
.end = 0x0d000000 + 5,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = 61,
.end = 61,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mp900c_dummy_device = {
.name = "mp900c_dummy",
.id = -1,
};
static struct platform_device mp900c_usb = {
.name = "isp116x-hcd",
.num_resources = ARRAY_SIZE(isp116x_pfm_resources),
.resource = isp116x_pfm_resources,
.dev.platform_data = &isp116x_pfm_data,
};
static struct platform_device *devices[] __initdata = {
&mp900c_dummy_device,
&mp900c_usb,
};
static void __init mp900c_init(void)
{
printk(KERN_INFO "MobilePro 900/C machine init\n");
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_add_devices(devices, ARRAY_SIZE(devices));
}
/* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */
MACHINE_START(NEC_MP900, "MobilePro900/C")
.atag_offset = 0x220100,
.init_time = pxa_timer_init,
.map_io = pxa25x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_machine = mp900c_init,
.restart = pxa_restart,
MACHINE_END

477
arch/arm/mach-pxa/mxm8x10.c
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@ -1,477 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/mxm8x10.c
*
* Support for the Embedian MXM-8x10 Computer on Module
*
* Copyright (C) 2006 Marvell International Ltd.
* Copyright (C) 2009 Embedian Inc.
* Copyright (C) 2009 TMT Services & Supplies (Pty) Ltd.
*
* 2007-09-04: eric miao <eric.y.miao@gmail.com>
* rewrite to align with latest kernel
*
* 2010-01-09: Edwin Peer <epeer@tmtservices.co.za>
* Hennie van der Merwe <hvdmerwe@tmtservices.co.za>
* rework for upstream merge
*/
#include <linux/serial_8250.h>
#include <linux/dm9000.h>
#include <linux/gpio/machine.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/asoc-pxa.h>
#include "pxa320.h"
#include "mxm8x10.h"
#include "devices.h"
#include "generic.h"
/* GPIO pin definition
External device stuff - Leave unconfigured for now...
---------------------
GPIO0 - DREQ (External DMA Request)
GPIO3 - nGCS2 (External Chip Select) Where is nGCS0; nGCS1; nGCS4; nGCS5 ?
GPIO4 - nGCS3
GPIO15 - EXT_GPIO1
GPIO16 - EXT_GPIO2
GPIO17 - EXT_GPIO3
GPIO24 - EXT_GPIO4
GPIO25 - EXT_GPIO5
GPIO26 - EXT_GPIO6
GPIO27 - EXT_GPIO7
GPIO28 - EXT_GPIO8
GPIO29 - EXT_GPIO9
GPIO30 - EXT_GPIO10
GPIO31 - EXT_GPIO11
GPIO57 - EXT_GPIO12
GPIO74 - EXT_IRQ1
GPIO75 - EXT_IRQ2
GPIO76 - EXT_IRQ3
GPIO77 - EXT_IRQ4
GPIO78 - EXT_IRQ5
GPIO79 - EXT_IRQ6
GPIO80 - EXT_IRQ7
GPIO81 - EXT_IRQ8
GPIO87 - VCCIO_PWREN (External Device PWREN)
Dallas 1-Wire - Leave unconfigured for now...
-------------
GPIO0_2 - DS - 1Wire
Ethernet
--------
GPIO1 - DM9000 PWR
GPIO9 - DM9K_nIRQ
GPIO36 - DM9K_RESET
Keypad - Leave unconfigured by for now...
------
GPIO1_2 - KP_DKIN0
GPIO5_2 - KP_MKOUT7
GPIO82 - KP_DKIN1
GPIO85 - KP_DKIN2
GPIO86 - KP_DKIN3
GPIO113 - KP_MKIN0
GPIO114 - KP_MKIN1
GPIO115 - KP_MKIN2
GPIO116 - KP_MKIN3
GPIO117 - KP_MKIN4
GPIO118 - KP_MKIN5
GPIO119 - KP_MKIN6
GPIO120 - KP_MKIN7
GPIO121 - KP_MKOUT0
GPIO122 - KP_MKOUT1
GPIO122 - KP_MKOUT2
GPIO123 - KP_MKOUT3
GPIO124 - KP_MKOUT4
GPIO125 - KP_MKOUT5
GPIO127 - KP_MKOUT6
Data Bus - Leave unconfigured for now...
--------
GPIO2 - nWait (Data Bus)
USB Device
----------
GPIO4_2 - USBD_PULLUP
GPIO10 - UTM_CLK (USB Device UTM Clk)
GPIO49 - USB 2.0 Device UTM_DATA0
GPIO50 - USB 2.0 Device UTM_DATA1
GPIO51 - USB 2.0 Device UTM_DATA2
GPIO52 - USB 2.0 Device UTM_DATA3
GPIO53 - USB 2.0 Device UTM_DATA4
GPIO54 - USB 2.0 Device UTM_DATA5
GPIO55 - USB 2.0 Device UTM_DATA6
GPIO56 - USB 2.0 Device UTM_DATA7
GPIO58 - UTM_RXVALID (USB 2.0 Device)
GPIO59 - UTM_RXACTIVE (USB 2.0 Device)
GPIO60 - UTM_RXERROR
GPIO61 - UTM_OPMODE0
GPIO62 - UTM_OPMODE1
GPIO71 - USBD_INT (USB Device?)
GPIO73 - UTM_TXREADY (USB 2.0 Device)
GPIO83 - UTM_TXVALID (USB 2.0 Device)
GPIO98 - UTM_RESET (USB 2.0 device)
GPIO99 - UTM_XCVR_SELECT
GPIO100 - UTM_TERM_SELECT
GPIO101 - UTM_SUSPENDM_X
GPIO102 - UTM_LINESTATE0
GPIO103 - UTM_LINESTATE1
Card-Bus Interface - Leave unconfigured for now...
------------------
GPIO5 - nPIOR (I/O space output enable)
GPIO6 - nPIOW (I/O space write enable)
GPIO7 - nIOS16 (Input from I/O space telling size of data bus)
GPIO8 - nPWAIT (Input for inserting wait states)
LCD
---
GPIO6_2 - LDD0
GPIO7_2 - LDD1
GPIO8_2 - LDD2
GPIO9_2 - LDD3
GPIO11_2 - LDD5
GPIO12_2 - LDD6
GPIO13_2 - LDD7
GPIO14_2 - VSYNC
GPIO15_2 - HSYNC
GPIO16_2 - VCLK
GPIO17_2 - HCLK
GPIO18_2 - VDEN
GPIO63 - LDD8 (CPU LCD)
GPIO64 - LDD9 (CPU LCD)
GPIO65 - LDD10 (CPU LCD)
GPIO66 - LDD11 (CPU LCD)
GPIO67 - LDD12 (CPU LCD)
GPIO68 - LDD13 (CPU LCD)
GPIO69 - LDD14 (CPU LCD)
GPIO70 - LDD15 (CPU LCD)
GPIO88 - VCCLCD_PWREN (LCD Panel PWREN)
GPIO97 - BACKLIGHT_EN
GPIO104 - LCD_PWREN
PWM - Leave unconfigured for now...
---
GPIO11 - PWM0
GPIO12 - PWM1
GPIO13 - PWM2
GPIO14 - PWM3
SD-CARD
-------
GPIO18 - SDDATA0
GPIO19 - SDDATA1
GPIO20 - SDDATA2
GPIO21 - SDDATA3
GPIO22 - SDCLK
GPIO23 - SDCMD
GPIO72 - SD_WP
GPIO84 - SD_nIRQ_CD (SD-Card)
I2C
---
GPIO32 - I2CSCL
GPIO33 - I2CSDA
AC97
----
GPIO35 - AC97_SDATA_IN
GPIO37 - AC97_SDATA_OUT
GPIO38 - AC97_SYNC
GPIO39 - AC97_BITCLK
GPIO40 - AC97_nRESET
UART1
-----
GPIO41 - UART_RXD1
GPIO42 - UART_TXD1
GPIO43 - UART_CTS1
GPIO44 - UART_DCD1
GPIO45 - UART_DSR1
GPIO46 - UART_nRI1
GPIO47 - UART_DTR1
GPIO48 - UART_RTS1
UART2
-----
GPIO109 - RTS2
GPIO110 - RXD2
GPIO111 - TXD2
GPIO112 - nCTS2
UART3
-----
GPIO105 - nCTS3
GPIO106 - nRTS3
GPIO107 - TXD3
GPIO108 - RXD3
SSP3 - Leave unconfigured for now...
----
GPIO89 - SSP3_CLK
GPIO90 - SSP3_SFRM
GPIO91 - SSP3_TXD
GPIO92 - SSP3_RXD
SSP4
GPIO93 - SSP4_CLK
GPIO94 - SSP4_SFRM
GPIO95 - SSP4_TXD
GPIO96 - SSP4_RXD
*/
static mfp_cfg_t mfp_cfg[] __initdata = {
/* USB */
GPIO10_UTM_CLK,
GPIO49_U2D_PHYDATA_0,
GPIO50_U2D_PHYDATA_1,
GPIO51_U2D_PHYDATA_2,
GPIO52_U2D_PHYDATA_3,
GPIO53_U2D_PHYDATA_4,
GPIO54_U2D_PHYDATA_5,
GPIO55_U2D_PHYDATA_6,
GPIO56_U2D_PHYDATA_7,
GPIO58_UTM_RXVALID,
GPIO59_UTM_RXACTIVE,
GPIO60_U2D_RXERROR,
GPIO61_U2D_OPMODE0,
GPIO62_U2D_OPMODE1,
GPIO71_GPIO, /* USBD_INT */
GPIO73_UTM_TXREADY,
GPIO83_U2D_TXVALID,
GPIO98_U2D_RESET,
GPIO99_U2D_XCVR_SEL,
GPIO100_U2D_TERM_SEL,
GPIO101_U2D_SUSPEND,
GPIO102_UTM_LINESTATE_0,
GPIO103_UTM_LINESTATE_1,
GPIO4_2_GPIO | MFP_PULL_HIGH, /* UTM_PULLUP */
/* DM9000 */
GPIO1_GPIO,
GPIO9_GPIO,
GPIO36_GPIO,
/* AC97 */
GPIO35_AC97_SDATA_IN_0,
GPIO37_AC97_SDATA_OUT,
GPIO38_AC97_SYNC,
GPIO39_AC97_BITCLK,
GPIO40_AC97_nACRESET,
/* UARTS */
GPIO41_UART1_RXD,
GPIO42_UART1_TXD,
GPIO43_UART1_CTS,
GPIO44_UART1_DCD,
GPIO45_UART1_DSR,
GPIO46_UART1_RI,
GPIO47_UART1_DTR,
GPIO48_UART1_RTS,
GPIO109_UART2_RTS,
GPIO110_UART2_RXD,
GPIO111_UART2_TXD,
GPIO112_UART2_CTS,
GPIO105_UART3_CTS,
GPIO106_UART3_RTS,
GPIO107_UART3_TXD,
GPIO108_UART3_RXD,
GPIO78_GPIO,
GPIO79_GPIO,
GPIO80_GPIO,
GPIO81_GPIO,
/* I2C */
GPIO32_I2C_SCL,
GPIO33_I2C_SDA,
/* MMC */
GPIO18_MMC1_DAT0,
GPIO19_MMC1_DAT1,
GPIO20_MMC1_DAT2,
GPIO21_MMC1_DAT3,
GPIO22_MMC1_CLK,
GPIO23_MMC1_CMD,
GPIO72_GPIO | MFP_PULL_HIGH, /* Card Detect */
GPIO84_GPIO | MFP_PULL_LOW, /* Write Protect */
/* IRQ */
GPIO74_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ1 */
GPIO75_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ2 */
GPIO76_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ3 */
GPIO77_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ4 */
GPIO78_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ5 */
GPIO79_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ6 */
GPIO80_GPIO | MFP_LPM_EDGE_RISE, /* EXT_IRQ7 */
GPIO81_GPIO | MFP_LPM_EDGE_RISE /* EXT_IRQ8 */
};
/* MMC/MCI Support */
#if defined(CONFIG_MMC)
static struct pxamci_platform_data mxm_8x10_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.detect_delay_ms = 10,
};
static struct gpiod_lookup_table mxm_8x10_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
/* Card detect on GPIO 72 */
GPIO_LOOKUP("gpio-pxa", MXM_8X10_SD_nCD,
"cd", GPIO_ACTIVE_LOW),
/* Write protect on GPIO 84 */
GPIO_LOOKUP("gpio-pxa", MXM_8X10_SD_WP,
"wp", GPIO_ACTIVE_LOW),
{ },
},
};
void __init mxm_8x10_mmc_init(void)
{
gpiod_add_lookup_table(&mxm_8x10_mci_gpio_table);
pxa_set_mci_info(&mxm_8x10_mci_platform_data);
}
#endif
/* USB Open Host Controller Interface */
static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = {
.port_mode = PMM_NPS_MODE,
.flags = ENABLE_PORT_ALL
};
void __init mxm_8x10_usb_host_init(void)
{
pxa_set_ohci_info(&mxm_8x10_ohci_platform_data);
}
void __init mxm_8x10_ac97_init(void)
{
pxa_set_ac97_info(NULL);
}
/* NAND flash Support */
#if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
#define NAND_BLOCK_SIZE SZ_128K
#define NB(x) (NAND_BLOCK_SIZE * (x))
static struct mtd_partition mxm_8x10_nand_partitions[] = {
[0] = {
.name = "boot",
.size = NB(0x002),
.offset = NB(0x000),
.mask_flags = MTD_WRITEABLE
},
[1] = {
.name = "kernel",
.size = NB(0x010),
.offset = NB(0x002),
.mask_flags = MTD_WRITEABLE
},
[2] = {
.name = "root",
.size = NB(0x36c),
.offset = NB(0x012)
},
[3] = {
.name = "bbt",
.size = NB(0x082),
.offset = NB(0x37e),
.mask_flags = MTD_WRITEABLE
}
};
static struct pxa3xx_nand_platform_data mxm_8x10_nand_info = {
.keep_config = 1,
.parts = mxm_8x10_nand_partitions,
.nr_parts = ARRAY_SIZE(mxm_8x10_nand_partitions)
};
static void __init mxm_8x10_nand_init(void)
{
pxa3xx_set_nand_info(&mxm_8x10_nand_info);
}
#else
static inline void mxm_8x10_nand_init(void) {}
#endif /* IS_ENABLED(CONFIG_MTD_NAND_MARVELL) */
/* Ethernet support: Davicom DM9000 */
static struct resource dm9k_resources[] = {
[0] = {
.start = MXM_8X10_ETH_PHYS + 0x300,
.end = MXM_8X10_ETH_PHYS + 0x300,
.flags = IORESOURCE_MEM
},
[1] = {
.start = MXM_8X10_ETH_PHYS + 0x308,
.end = MXM_8X10_ETH_PHYS + 0x308,
.flags = IORESOURCE_MEM
},
[2] = {
.start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
.end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
}
};
static struct dm9000_plat_data dm9k_plat_data = {
.flags = DM9000_PLATF_16BITONLY
};
static struct platform_device dm9k_device = {
.name = "dm9000",
.id = 0,
.num_resources = ARRAY_SIZE(dm9k_resources),
.resource = dm9k_resources,
.dev = {
.platform_data = &dm9k_plat_data
}
};
static void __init mxm_8x10_ethernet_init(void)
{
platform_device_register(&dm9k_device);
}
/* PXA UARTs */
static void __init mxm_8x10_uarts_init(void)
{
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
}
/* I2C and Real Time Clock */
static struct i2c_board_info __initdata mxm_8x10_i2c_devices[] = {
{
I2C_BOARD_INFO("ds1337", 0x68)
}
};
static void __init mxm_8x10_i2c_init(void)
{
i2c_register_board_info(0, mxm_8x10_i2c_devices,
ARRAY_SIZE(mxm_8x10_i2c_devices));
pxa_set_i2c_info(NULL);
}
void __init mxm_8x10_barebones_init(void)
{
pxa3xx_mfp_config(ARRAY_AND_SIZE(mfp_cfg));
mxm_8x10_uarts_init();
mxm_8x10_nand_init();
mxm_8x10_i2c_init();
mxm_8x10_ethernet_init();
}

22
arch/arm/mach-pxa/mxm8x10.h
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@ -1,22 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __MACH_MXM_8X10_H
#define __MACH_MXM_8X10_H
#define MXM_8X10_ETH_PHYS 0x13000000
#if defined(CONFIG_MMC)
#define MXM_8X10_SD_nCD (72)
#define MXM_8X10_SD_WP (84)
extern void mxm_8x10_mmc_init(void);
#else
static inline void mxm_8x10_mmc_init(void) {}
#endif
extern void mxm_8x10_usb_host_init(void);
extern void mxm_8x10_ac97_init(void);
extern void mxm_8x10_barebones_init(void);
#endif /* __MACH_MXM_8X10_H */

473
arch/arm/mach-pxa/palm27x.c
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@ -1,473 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Common code for Palm LD, T5, TX, Z72
*
* Copyright (C) 2010-2011 Marek Vasut <marek.vasut@gmail.com>
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/pda_power.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/gpio/machine.h>
#include <linux/gpio.h>
#include <linux/wm97xx.h>
#include <linux/power_supply.h>
#include <linux/regulator/max1586.h>
#include <linux/platform_data/i2c-pxa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "pxa27x.h"
#include <linux/platform_data/asoc-pxa.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/irda-pxaficp.h>
#include "udc.h"
#include <linux/platform_data/asoc-palm27x.h>
#include "palm27x.h"
#include "generic.h"
#include "devices.h"
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
static struct pxamci_platform_data palm27x_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.detect_delay_ms = 200,
};
void __init palm27x_mmc_init(struct gpiod_lookup_table *gtable)
{
if (gtable)
gpiod_add_lookup_table(gtable);
pxa_set_mci_info(&palm27x_mci_platform_data);
}
#endif
/******************************************************************************
* Power management - standby
******************************************************************************/
#if defined(CONFIG_SUSPEND)
void __init palm27x_pm_init(unsigned long str_base)
{
static const unsigned long resume[] = {
0xe3a00101, /* mov r0, #0x40000000 */
0xe380060f, /* orr r0, r0, #0x00f00000 */
0xe590f008, /* ldr pc, [r0, #0x08] */
};
/*
* Copy the bootloader.
* NOTE: PalmZ72 uses a different wakeup method!
*/
memcpy(phys_to_virt(str_base), resume, sizeof(resume));
}
#endif
/******************************************************************************
* Framebuffer
******************************************************************************/
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
struct pxafb_mode_info palm_320x480_lcd_mode = {
.pixclock = 57692,
.xres = 320,
.yres = 480,
.bpp = 16,
.left_margin = 32,
.right_margin = 1,
.upper_margin = 7,
.lower_margin = 1,
.hsync_len = 4,
.vsync_len = 1,
};
struct pxafb_mode_info palm_320x320_lcd_mode = {
.pixclock = 115384,
.xres = 320,
.yres = 320,
.bpp = 16,
.left_margin = 27,
.right_margin = 7,
.upper_margin = 7,
.lower_margin = 8,
.hsync_len = 6,
.vsync_len = 1,
};
struct pxafb_mode_info palm_320x320_new_lcd_mode = {
.pixclock = 86538,
.xres = 320,
.yres = 320,
.bpp = 16,
.left_margin = 20,
.right_margin = 8,
.upper_margin = 8,
.lower_margin = 5,
.hsync_len = 4,
.vsync_len = 1,
};
static struct pxafb_mach_info palm27x_lcd_screen = {
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
static int palm27x_lcd_power;
static void palm27x_lcd_ctl(int on, struct fb_var_screeninfo *info)
{
gpio_set_value(palm27x_lcd_power, on);
}
void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
{
palm27x_lcd_screen.modes = mode;
if (gpio_is_valid(power)) {
if (!gpio_request(power, "LCD power")) {
pr_err("Palm27x: failed to claim lcd power gpio!\n");
return;
}
if (!gpio_direction_output(power, 1)) {
pr_err("Palm27x: lcd power configuration failed!\n");
return;
}
palm27x_lcd_power = power;
palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl;
}
pxa_set_fb_info(NULL, &palm27x_lcd_screen);
}
#endif
/******************************************************************************
* USB Gadget
******************************************************************************/
#if defined(CONFIG_USB_PXA27X) || \
defined(CONFIG_USB_PXA27X_MODULE)
/* The actual GPIO offsets get filled in in the palm27x_udc_init() call */
static struct gpiod_lookup_table palm27x_udc_gpiod_table = {
.dev_id = "gpio-vbus",
.table = {
GPIO_LOOKUP("gpio-pxa", 0,
"vbus", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("gpio-pxa", 0,
"pullup", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct platform_device palm27x_gpio_vbus = {
.name = "gpio-vbus",
.id = -1,
};
void __init palm27x_udc_init(int vbus, int pullup, int vbus_inverted)
{
palm27x_udc_gpiod_table.table[0].chip_hwnum = vbus;
palm27x_udc_gpiod_table.table[1].chip_hwnum = pullup;
if (vbus_inverted)
palm27x_udc_gpiod_table.table[0].flags = GPIO_ACTIVE_LOW;
gpiod_add_lookup_table(&palm27x_udc_gpiod_table);
platform_device_register(&palm27x_gpio_vbus);
}
#endif
/******************************************************************************
* IrDA
******************************************************************************/
#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
static struct pxaficp_platform_data palm27x_ficp_platform_data = {
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
void __init palm27x_irda_init(int pwdn)
{
palm27x_ficp_platform_data.gpio_pwdown = pwdn;
pxa_set_ficp_info(&palm27x_ficp_platform_data);
}
#endif
/******************************************************************************
* WM97xx audio, battery
******************************************************************************/
#if defined(CONFIG_TOUCHSCREEN_WM97XX) || \
defined(CONFIG_TOUCHSCREEN_WM97XX_MODULE)
static struct wm97xx_batt_pdata palm27x_batt_pdata = {
.batt_aux = WM97XX_AUX_ID3,
.temp_aux = WM97XX_AUX_ID2,
.batt_mult = 1000,
.batt_div = 414,
.temp_mult = 1,
.temp_div = 1,
.batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO,
.batt_name = "main-batt",
};
static struct wm97xx_pdata palm27x_wm97xx_pdata = {
.batt_pdata = &palm27x_batt_pdata,
};
static pxa2xx_audio_ops_t palm27x_ac97_pdata = {
.codec_pdata = { &palm27x_wm97xx_pdata, },
};
static struct palm27x_asoc_info palm27x_asoc_pdata = {
.jack_gpio = -1,
};
static struct platform_device palm27x_asoc = {
.name = "palm27x-asoc",
.id = -1,
.dev = {
.platform_data = &palm27x_asoc_pdata,
},
};
void __init palm27x_ac97_init(int minv, int maxv, int jack, int reset)
{
palm27x_ac97_pdata.reset_gpio = reset;
palm27x_asoc_pdata.jack_gpio = jack;
if (minv < 0 || maxv < 0) {
palm27x_ac97_pdata.codec_pdata[0] = NULL;
pxa_set_ac97_info(&palm27x_ac97_pdata);
} else {
palm27x_batt_pdata.min_voltage = minv,
palm27x_batt_pdata.max_voltage = maxv,
pxa_set_ac97_info(&palm27x_ac97_pdata);
platform_device_register(&palm27x_asoc);
}
}
#endif
/******************************************************************************
* Backlight
******************************************************************************/
#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
static struct pwm_lookup palm27x_pwm_lookup[] = {
PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 3500 * 1024,
PWM_POLARITY_NORMAL),
};
static int palm_bl_power;
static int palm_lcd_power;
static int palm27x_backlight_init(struct device *dev)
{
int ret;
ret = gpio_request(palm_bl_power, "BL POWER");
if (ret)
goto err;
ret = gpio_direction_output(palm_bl_power, 0);
if (ret)
goto err2;
if (gpio_is_valid(palm_lcd_power)) {
ret = gpio_request(palm_lcd_power, "LCD POWER");
if (ret)
goto err2;
ret = gpio_direction_output(palm_lcd_power, 0);
if (ret)
goto err3;
}
return 0;
err3:
gpio_free(palm_lcd_power);
err2:
gpio_free(palm_bl_power);
err:
return ret;
}
static int palm27x_backlight_notify(struct device *dev, int brightness)
{
gpio_set_value(palm_bl_power, brightness);
if (gpio_is_valid(palm_lcd_power))
gpio_set_value(palm_lcd_power, brightness);
return brightness;
}
static void palm27x_backlight_exit(struct device *dev)
{
gpio_free(palm_bl_power);
if (gpio_is_valid(palm_lcd_power))
gpio_free(palm_lcd_power);
}
static struct platform_pwm_backlight_data palm27x_backlight_data = {
.max_brightness = 0xfe,
.dft_brightness = 0x7e,
.init = palm27x_backlight_init,
.notify = palm27x_backlight_notify,
.exit = palm27x_backlight_exit,
};
static struct platform_device palm27x_backlight = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa27x_device_pwm0.dev,
.platform_data = &palm27x_backlight_data,
},
};
void __init palm27x_pwm_init(int bl, int lcd)
{
palm_bl_power = bl;
palm_lcd_power = lcd;
pwm_add_table(palm27x_pwm_lookup, ARRAY_SIZE(palm27x_pwm_lookup));
platform_device_register(&palm27x_backlight);
}
#endif
/******************************************************************************
* Power supply
******************************************************************************/
#if defined(CONFIG_PDA_POWER) || defined(CONFIG_PDA_POWER_MODULE)
static int palm_ac_state;
static int palm_usb_state;
static int palm27x_power_supply_init(struct device *dev)
{
int ret;
ret = gpio_request(palm_ac_state, "AC state");
if (ret)
goto err1;
ret = gpio_direction_input(palm_ac_state);
if (ret)
goto err2;
if (gpio_is_valid(palm_usb_state)) {
ret = gpio_request(palm_usb_state, "USB state");
if (ret)
goto err2;
ret = gpio_direction_input(palm_usb_state);
if (ret)
goto err3;
}
return 0;
err3:
gpio_free(palm_usb_state);
err2:
gpio_free(palm_ac_state);
err1:
return ret;
}
static void palm27x_power_supply_exit(struct device *dev)
{
gpio_free(palm_usb_state);
gpio_free(palm_ac_state);
}
static int palm27x_is_ac_online(void)
{
return gpio_get_value(palm_ac_state);
}
static int palm27x_is_usb_online(void)
{
return !gpio_get_value(palm_usb_state);
}
static char *palm27x_supplicants[] = {
"main-battery",
};
static struct pda_power_pdata palm27x_ps_info = {
.init = palm27x_power_supply_init,
.exit = palm27x_power_supply_exit,
.is_ac_online = palm27x_is_ac_online,
.is_usb_online = palm27x_is_usb_online,
.supplied_to = palm27x_supplicants,
.num_supplicants = ARRAY_SIZE(palm27x_supplicants),
};
static struct platform_device palm27x_power_supply = {
.name = "pda-power",
.id = -1,
.dev = {
.platform_data = &palm27x_ps_info,
},
};
void __init palm27x_power_init(int ac, int usb)
{
palm_ac_state = ac;
palm_usb_state = usb;
platform_device_register(&palm27x_power_supply);
}
#endif
/******************************************************************************
* Core power regulator
******************************************************************************/
#if defined(CONFIG_REGULATOR_MAX1586) || \
defined(CONFIG_REGULATOR_MAX1586_MODULE)
static struct regulator_consumer_supply palm27x_max1587a_consumers[] = {
REGULATOR_SUPPLY("vcc_core", NULL),
};
static struct regulator_init_data palm27x_max1587a_v3_info = {
.constraints = {
.name = "vcc_core range",
.min_uV = 900000,
.max_uV = 1705000,
.always_on = 1,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
},
.consumer_supplies = palm27x_max1587a_consumers,
.num_consumer_supplies = ARRAY_SIZE(palm27x_max1587a_consumers),
};
static struct max1586_subdev_data palm27x_max1587a_subdevs[] = {
{
.name = "vcc_core",
.id = MAX1586_V3,
.platform_data = &palm27x_max1587a_v3_info,
}
};
static struct max1586_platform_data palm27x_max1587a_info = {
.subdevs = palm27x_max1587a_subdevs,
.num_subdevs = ARRAY_SIZE(palm27x_max1587a_subdevs),
.v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
};
static struct i2c_board_info __initdata palm27x_pi2c_board_info[] = {
{
I2C_BOARD_INFO("max1586", 0x14),
.platform_data = &palm27x_max1587a_info,
},
};
static struct i2c_pxa_platform_data palm27x_i2c_power_info = {
.use_pio = 1,
};
void __init palm27x_pmic_init(void)
{
i2c_register_board_info(1, ARRAY_AND_SIZE(palm27x_pi2c_board_info));
pxa27x_set_i2c_power_info(&palm27x_i2c_power_info);
}
#endif

77
arch/arm/mach-pxa/palm27x.h
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@ -1,77 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Common functions for Palm LD, T5, TX, Z72
*
* Copyright (C) 2010
* Marek Vasut <marek.vasut@gmail.com>
*/
#ifndef __INCLUDE_MACH_PALM27X__
#define __INCLUDE_MACH_PALM27X__
#include <linux/gpio/machine.h>
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
extern void __init palm27x_mmc_init(struct gpiod_lookup_table *gtable);
#else
static inline void palm27x_mmc_init(struct gpiod_lookup_table *gtable)
{}
#endif
#if defined(CONFIG_SUSPEND)
extern void __init palm27x_pm_init(unsigned long str_base);
#else
static inline void palm27x_pm_init(unsigned long str_base) {}
#endif
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
extern struct pxafb_mode_info palm_320x480_lcd_mode;
extern struct pxafb_mode_info palm_320x320_lcd_mode;
extern struct pxafb_mode_info palm_320x320_new_lcd_mode;
extern void __init palm27x_lcd_init(int power,
struct pxafb_mode_info *mode);
#else
#define palm27x_lcd_init(power, mode) do {} while (0)
#endif
#if defined(CONFIG_USB_PXA27X) || \
defined(CONFIG_USB_PXA27X_MODULE)
extern void __init palm27x_udc_init(int vbus, int pullup,
int vbus_inverted);
#else
static inline void palm27x_udc_init(int vbus, int pullup, int vbus_inverted) {}
#endif
#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
extern void __init palm27x_irda_init(int pwdn);
#else
static inline void palm27x_irda_init(int pwdn) {}
#endif
#if defined(CONFIG_TOUCHSCREEN_WM97XX) || \
defined(CONFIG_TOUCHSCREEN_WM97XX_MODULE)
extern void __init palm27x_ac97_init(int minv, int maxv, int jack,
int reset);
#else
static inline void palm27x_ac97_init(int minv, int maxv, int jack, int reset) {}
#endif
#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
extern void __init palm27x_pwm_init(int bl, int lcd);
#else
static inline void palm27x_pwm_init(int bl, int lcd) {}
#endif
#if defined(CONFIG_PDA_POWER) || defined(CONFIG_PDA_POWER_MODULE)
extern void __init palm27x_power_init(int ac, int usb);
#else
static inline void palm27x_power_init(int ac, int usb) {}
#endif
#if defined(CONFIG_REGULATOR_MAX1586) || \
defined(CONFIG_REGULATOR_MAX1586_MODULE)
extern void __init palm27x_pmic_init(void);
#else
static inline void palm27x_pmic_init(void) {}
#endif
#endif /* __INCLUDE_MACH_PALM27X__ */

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arch/arm/mach-pxa/palmld-pcmcia.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/drivers/pcmcia/pxa2xx_palmld.c
*
* Driver for Palm LifeDrive PCMCIA
*
* Copyright (C) 2006 Alex Osborne <ato@meshy.org>
* Copyright (C) 2007-2011 Marek Vasut <marek.vasut@gmail.com>
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <pcmcia/soc_common.h>
#include "palmld.h"
static struct gpio palmld_pcmcia_gpios[] = {
{ GPIO_NR_PALMLD_PCMCIA_POWER, GPIOF_INIT_LOW, "PCMCIA Power" },
{ GPIO_NR_PALMLD_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" },
};
static int palmld_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
{
int ret;
ret = gpio_request_array(palmld_pcmcia_gpios,
ARRAY_SIZE(palmld_pcmcia_gpios));
skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMLD_PCMCIA_READY;
skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready";
return ret;
}
static void palmld_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
{
gpio_free_array(palmld_pcmcia_gpios, ARRAY_SIZE(palmld_pcmcia_gpios));
}
static void palmld_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
struct pcmcia_state *state)
{
state->detect = 1; /* always inserted */
state->vs_3v = 1;
state->vs_Xv = 0;
}
static int palmld_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
const socket_state_t *state)
{
gpio_set_value(GPIO_NR_PALMLD_PCMCIA_POWER, 1);
gpio_set_value(GPIO_NR_PALMLD_PCMCIA_RESET,
!!(state->flags & SS_RESET));
return 0;
}
static struct pcmcia_low_level palmld_pcmcia_ops = {
.owner = THIS_MODULE,
.first = 1,
.nr = 1,
.hw_init = palmld_pcmcia_hw_init,
.hw_shutdown = palmld_pcmcia_hw_shutdown,
.socket_state = palmld_pcmcia_socket_state,
.configure_socket = palmld_pcmcia_configure_socket,
};
static struct platform_device *palmld_pcmcia_device;
static int __init palmld_pcmcia_init(void)
{
int ret;
if (!machine_is_palmld())
return -ENODEV;
palmld_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
if (!palmld_pcmcia_device)
return -ENOMEM;
ret = platform_device_add_data(palmld_pcmcia_device, &palmld_pcmcia_ops,
sizeof(palmld_pcmcia_ops));
if (!ret)
ret = platform_device_add(palmld_pcmcia_device);
if (ret)
platform_device_put(palmld_pcmcia_device);
return ret;
}
static void __exit palmld_pcmcia_exit(void)
{
platform_device_unregister(palmld_pcmcia_device);
}
module_init(palmld_pcmcia_init);
module_exit(palmld_pcmcia_exit);
MODULE_AUTHOR("Alex Osborne <ato@meshy.org>,"
" Marek Vasut <marek.vasut@gmail.com>");
MODULE_DESCRIPTION("PCMCIA support for Palm LifeDrive");
MODULE_ALIAS("platform:pxa2xx-pcmcia");
MODULE_LICENSE("GPL");

392
arch/arm/mach-pxa/palmld.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Hardware definitions for Palm LifeDrive
*
* Author: Marek Vasut <marek.vasut@gmail.com>
*
* Based on work of:
* Alex Osborne <ato@meshy.org>
*
* (find more info at www.hackndev.com)
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/pda_power.h>
#include <linux/pwm_backlight.h>
#include <linux/gpio.h>
#include <linux/wm97xx.h>
#include <linux/power_supply.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "pxa27x.h"
#include "palmld.h"
#include <linux/platform_data/asoc-pxa.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/irda-pxaficp.h>
#include <linux/platform_data/keypad-pxa27x.h>
#include <linux/platform_data/asoc-palm27x.h>
#include "palm27x.h"
#include "generic.h"
#include "devices.h"
/******************************************************************************
* Pin configuration
******************************************************************************/
static unsigned long palmld_pin_config[] __initdata = {
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO14_GPIO, /* SD detect */
GPIO114_GPIO, /* SD power */
GPIO116_GPIO, /* SD r/o switch */
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO89_AC97_SYSCLK,
GPIO95_AC97_nRESET,
/* IrDA */
GPIO108_GPIO, /* ir disable */
GPIO46_FICP_RXD,
GPIO47_FICP_TXD,
/* MATRIX KEYPAD */
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
GPIO103_KP_MKOUT_0,
GPIO104_KP_MKOUT_1,
GPIO105_KP_MKOUT_2,
/* LCD */
GPIOxx_LCD_TFT_16BPP,
/* PWM */
GPIO16_PWM0_OUT,
/* GPIO KEYS */
GPIO10_GPIO, /* hotsync button */
GPIO12_GPIO, /* power switch */
GPIO15_GPIO, /* lock switch */
/* LEDs */
GPIO52_GPIO, /* green led */
GPIO94_GPIO, /* orange led */
/* PCMCIA */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO85_nPCE_1,
GPIO54_nPCE_2,
GPIO79_PSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
GPIO36_GPIO, /* wifi power */
GPIO38_GPIO, /* wifi ready */
GPIO81_GPIO, /* wifi reset */
/* FFUART */
GPIO34_FFUART_RXD,
GPIO39_FFUART_TXD,
/* HDD */
GPIO98_GPIO, /* HDD reset */
GPIO115_GPIO, /* HDD power */
/* MISC */
GPIO13_GPIO, /* earphone detect */
};
/******************************************************************************
* NOR Flash
******************************************************************************/
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct mtd_partition palmld_partitions[] = {
{
.name = "Flash",
.offset = 0x00000000,
.size = MTDPART_SIZ_FULL,
.mask_flags = 0
}
};
static struct physmap_flash_data palmld_flash_data[] = {
{
.width = 2, /* bankwidth in bytes */
.parts = palmld_partitions,
.nr_parts = ARRAY_SIZE(palmld_partitions)
}
};
static struct resource palmld_flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_4M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device palmld_flash = {
.name = "physmap-flash",
.id = 0,
.resource = &palmld_flash_resource,
.num_resources = 1,
.dev = {
.platform_data = palmld_flash_data,
},
};
static void __init palmld_nor_init(void)
{
platform_device_register(&palmld_flash);
}
#else
static inline void palmld_nor_init(void) {}
#endif
/******************************************************************************
* GPIO keyboard
******************************************************************************/
#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
static const unsigned int palmld_matrix_keys[] = {
KEY(0, 1, KEY_F2),
KEY(0, 2, KEY_UP),
KEY(1, 0, KEY_F3),
KEY(1, 1, KEY_F4),
KEY(1, 2, KEY_RIGHT),
KEY(2, 0, KEY_F1),
KEY(2, 1, KEY_F5),
KEY(2, 2, KEY_DOWN),
KEY(3, 0, KEY_F6),
KEY(3, 1, KEY_ENTER),
KEY(3, 2, KEY_LEFT),
};
static struct matrix_keymap_data palmld_matrix_keymap_data = {
.keymap = palmld_matrix_keys,
.keymap_size = ARRAY_SIZE(palmld_matrix_keys),
};
static struct pxa27x_keypad_platform_data palmld_keypad_platform_data = {
.matrix_key_rows = 4,
.matrix_key_cols = 3,
.matrix_keymap_data = &palmld_matrix_keymap_data,
.debounce_interval = 30,
};
static void __init palmld_kpc_init(void)
{
pxa_set_keypad_info(&palmld_keypad_platform_data);
}
#else
static inline void palmld_kpc_init(void) {}
#endif
/******************************************************************************
* GPIO keys
******************************************************************************/
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
static struct gpio_keys_button palmld_pxa_buttons[] = {
{KEY_F8, GPIO_NR_PALMLD_HOTSYNC_BUTTON_N, 1, "HotSync Button" },
{KEY_F9, GPIO_NR_PALMLD_LOCK_SWITCH, 0, "Lock Switch" },
{KEY_POWER, GPIO_NR_PALMLD_POWER_SWITCH, 0, "Power Switch" },
};
static struct gpio_keys_platform_data palmld_pxa_keys_data = {
.buttons = palmld_pxa_buttons,
.nbuttons = ARRAY_SIZE(palmld_pxa_buttons),
};
static struct platform_device palmld_pxa_keys = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &palmld_pxa_keys_data,
},
};
static void __init palmld_keys_init(void)
{
platform_device_register(&palmld_pxa_keys);
}
#else
static inline void palmld_keys_init(void) {}
#endif
/******************************************************************************
* LEDs
******************************************************************************/
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
struct gpio_led gpio_leds[] = {
{
.name = "palmld:green:led",
.default_trigger = "none",
.gpio = GPIO_NR_PALMLD_LED_GREEN,
}, {
.name = "palmld:amber:led",
.default_trigger = "none",
.gpio = GPIO_NR_PALMLD_LED_AMBER,
},
};
static struct gpio_led_platform_data gpio_led_info = {
.leds = gpio_leds,
.num_leds = ARRAY_SIZE(gpio_leds),
};
static struct platform_device palmld_leds = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &gpio_led_info,
}
};
static void __init palmld_leds_init(void)
{
platform_device_register(&palmld_leds);
}
#else
static inline void palmld_leds_init(void) {}
#endif
/******************************************************************************
* HDD
******************************************************************************/
#if defined(CONFIG_PATA_PALMLD) || defined(CONFIG_PATA_PALMLD_MODULE)
static struct resource palmld_ide_resources[] = {
DEFINE_RES_MEM(PALMLD_IDE_PHYS, 0x1000),
};
static struct platform_device palmld_ide_device = {
.name = "pata_palmld",
.id = -1,
.resource = palmld_ide_resources,
.num_resources = ARRAY_SIZE(palmld_ide_resources),
};
static struct gpiod_lookup_table palmld_ide_gpio_table = {
.dev_id = "pata_palmld",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMLD_IDE_PWEN,
"power", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMLD_IDE_RESET,
"reset", GPIO_ACTIVE_LOW),
{ },
},
};
static void __init palmld_ide_init(void)
{
gpiod_add_lookup_table(&palmld_ide_gpio_table);
platform_device_register(&palmld_ide_device);
}
#else
static inline void palmld_ide_init(void) {}
#endif
/******************************************************************************
* Machine init
******************************************************************************/
static struct map_desc palmld_io_desc[] __initdata = {
{
.virtual = PALMLD_IDE_VIRT,
.pfn = __phys_to_pfn(PALMLD_IDE_PHYS),
.length = PALMLD_IDE_SIZE,
.type = MT_DEVICE
},
{
.virtual = PALMLD_USB_VIRT,
.pfn = __phys_to_pfn(PALMLD_USB_PHYS),
.length = PALMLD_USB_SIZE,
.type = MT_DEVICE
},
};
static void __init palmld_map_io(void)
{
pxa27x_map_io();
iotable_init(palmld_io_desc, ARRAY_SIZE(palmld_io_desc));
}
static struct gpiod_lookup_table palmld_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMLD_SD_DETECT_N,
"cd", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMLD_SD_READONLY,
"wp", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMLD_SD_POWER,
"power", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct gpiod_lookup_table palmld_wm97xx_touch_gpio_table = {
.dev_id = "wm97xx-touch",
.table = {
GPIO_LOOKUP("gpio-pxa", 27, "touch", GPIO_ACTIVE_HIGH),
{ },
},
};
static void __init palmld_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmld_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
palm27x_mmc_init(&palmld_mci_gpio_table);
gpiod_add_lookup_table(&palmld_wm97xx_touch_gpio_table);
palm27x_pm_init(PALMLD_STR_BASE);
palm27x_lcd_init(-1, &palm_320x480_lcd_mode);
palm27x_irda_init(GPIO_NR_PALMLD_IR_DISABLE);
palm27x_ac97_init(PALMLD_BAT_MIN_VOLTAGE, PALMLD_BAT_MAX_VOLTAGE,
GPIO_NR_PALMLD_EARPHONE_DETECT, 95);
palm27x_pwm_init(GPIO_NR_PALMLD_BL_POWER, GPIO_NR_PALMLD_LCD_POWER);
palm27x_power_init(GPIO_NR_PALMLD_POWER_DETECT,
GPIO_NR_PALMLD_USB_DETECT_N);
palm27x_pmic_init();
palmld_kpc_init();
palmld_keys_init();
palmld_nor_init();
palmld_leds_init();
palmld_ide_init();
}
MACHINE_START(PALMLD, "Palm LifeDrive")
.atag_offset = 0x100,
.map_io = palmld_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = palmld_init,
.restart = pxa_restart,
MACHINE_END

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* GPIOs and interrupts for Palm LifeDrive Handheld Computer
*
* Authors: Alex Osborne <ato@meshy.org>
* Marek Vasut <marek.vasut@gmail.com>
*/
#ifndef _INCLUDE_PALMLD_H_
#define _INCLUDE_PALMLD_H_
#include "irqs.h" /* PXA_GPIO_TO_IRQ */
/** HERE ARE GPIOs **/
/* GPIOs */
#define GPIO_NR_PALMLD_GPIO_RESET 1
#define GPIO_NR_PALMLD_POWER_DETECT 4
#define GPIO_NR_PALMLD_HOTSYNC_BUTTON_N 10
#define GPIO_NR_PALMLD_POWER_SWITCH 12
#define GPIO_NR_PALMLD_EARPHONE_DETECT 13
#define GPIO_NR_PALMLD_LOCK_SWITCH 15
/* SD/MMC */
#define GPIO_NR_PALMLD_SD_DETECT_N 14
#define GPIO_NR_PALMLD_SD_POWER 114
#define GPIO_NR_PALMLD_SD_READONLY 116
/* TOUCHSCREEN */
#define GPIO_NR_PALMLD_WM9712_IRQ 27
/* IRDA */
#define GPIO_NR_PALMLD_IR_DISABLE 108
/* LCD/BACKLIGHT */
#define GPIO_NR_PALMLD_BL_POWER 19
#define GPIO_NR_PALMLD_LCD_POWER 96
/* LCD BORDER */
#define GPIO_NR_PALMLD_BORDER_SWITCH 21
#define GPIO_NR_PALMLD_BORDER_SELECT 22
/* BLUETOOTH */
#define GPIO_NR_PALMLD_BT_POWER 17
#define GPIO_NR_PALMLD_BT_RESET 83
/* PCMCIA (WiFi) */
#define GPIO_NR_PALMLD_PCMCIA_READY 38
#define GPIO_NR_PALMLD_PCMCIA_POWER 36
#define GPIO_NR_PALMLD_PCMCIA_RESET 81
/* LEDs */
#define GPIO_NR_PALMLD_LED_GREEN 52
#define GPIO_NR_PALMLD_LED_AMBER 94
/* IDE */
#define GPIO_NR_PALMLD_IDE_RESET 98
#define GPIO_NR_PALMLD_IDE_PWEN 115
/* USB */
#define GPIO_NR_PALMLD_USB_DETECT_N 3
#define GPIO_NR_PALMLD_USB_READY 86
#define GPIO_NR_PALMLD_USB_RESET 88
#define GPIO_NR_PALMLD_USB_INT 106
#define GPIO_NR_PALMLD_USB_POWER 118
/* 20, 53 and 86 are usb related too */
/* INTERRUPTS */
#define IRQ_GPIO_PALMLD_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_GPIO_RESET)
#define IRQ_GPIO_PALMLD_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_SD_DETECT_N)
#define IRQ_GPIO_PALMLD_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_WM9712_IRQ)
#define IRQ_GPIO_PALMLD_IDE_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_IDE_IRQ)
/** HERE ARE INIT VALUES **/
/* IO mappings */
#define PALMLD_USB_PHYS PXA_CS2_PHYS
#define PALMLD_USB_VIRT 0xf0000000
#define PALMLD_USB_SIZE 0x00100000
#define PALMLD_IDE_PHYS 0x20000000
#define PALMLD_IDE_VIRT 0xf1000000
#define PALMLD_IDE_SIZE 0x00100000
#define PALMLD_PHYS_IO_START 0x40000000
#define PALMLD_STR_BASE 0xa0200000
/* BATTERY */
#define PALMLD_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */
#define PALMLD_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */
#define PALMLD_BAT_MAX_CURRENT 0 /* unknown */
#define PALMLD_BAT_MIN_CURRENT 0 /* unknown */
#define PALMLD_BAT_MAX_CHARGE 1 /* unknown */
#define PALMLD_BAT_MIN_CHARGE 1 /* unknown */
#define PALMLD_MAX_LIFE_MINS 240 /* on-life in minutes */
#define PALMLD_BAT_MEASURE_DELAY (HZ * 1)
/* BACKLIGHT */
#define PALMLD_MAX_INTENSITY 0xFE
#define PALMLD_DEFAULT_INTENSITY 0x7E
#define PALMLD_LIMIT_MASK 0x7F
#define PALMLD_PRESCALER 0x3F
#define PALMLD_PERIOD_NS 3500
#endif

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arch/arm/mach-pxa/palmt5.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Hardware definitions for Palm Tungsten|T5
*
* Author: Marek Vasut <marek.vasut@gmail.com>
*
* Based on work of:
* Ales Snuparek <snuparek@atlas.cz>
* Justin Kendrick <twilightsentry@gmail.com>
* RichardT5 <richard_t5@users.sourceforge.net>
*
* (find more info at www.hackndev.com)
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/memblock.h>
#include <linux/pda_power.h>
#include <linux/pwm_backlight.h>
#include <linux/gpio.h>
#include <linux/wm97xx.h>
#include <linux/power_supply.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "pxa27x.h"
#include <linux/platform_data/asoc-pxa.h>
#include "palmt5.h"
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/irda-pxaficp.h>
#include <linux/platform_data/keypad-pxa27x.h>
#include "udc.h"
#include <linux/platform_data/asoc-palm27x.h>
#include "palm27x.h"
#include "generic.h"
#include "devices.h"
/******************************************************************************
* Pin configuration
******************************************************************************/
static unsigned long palmt5_pin_config[] __initdata = {
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO14_GPIO, /* SD detect */
GPIO114_GPIO, /* SD power */
GPIO115_GPIO, /* SD r/o switch */
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO89_AC97_SYSCLK,
GPIO95_AC97_nRESET,
/* IrDA */
GPIO40_GPIO, /* ir disable */
GPIO46_FICP_RXD,
GPIO47_FICP_TXD,
/* USB */
GPIO15_GPIO, /* usb detect */
GPIO93_GPIO, /* usb power */
/* MATRIX KEYPAD */
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
GPIO103_KP_MKOUT_0,
GPIO104_KP_MKOUT_1,
GPIO105_KP_MKOUT_2,
/* LCD */
GPIOxx_LCD_TFT_16BPP,
/* PWM */
GPIO16_PWM0_OUT,
/* FFUART */
GPIO34_FFUART_RXD,
GPIO39_FFUART_TXD,
/* MISC */
GPIO10_GPIO, /* hotsync button */
GPIO90_GPIO, /* power detect */
GPIO107_GPIO, /* earphone detect */
};
/******************************************************************************
* GPIO keyboard
******************************************************************************/
#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
static const unsigned int palmt5_matrix_keys[] = {
KEY(0, 0, KEY_POWER),
KEY(0, 1, KEY_F1),
KEY(0, 2, KEY_ENTER),
KEY(1, 0, KEY_F2),
KEY(1, 1, KEY_F3),
KEY(1, 2, KEY_F4),
KEY(2, 0, KEY_UP),
KEY(2, 2, KEY_DOWN),
KEY(3, 0, KEY_RIGHT),
KEY(3, 2, KEY_LEFT),
};
static struct matrix_keymap_data palmt5_matrix_keymap_data = {
.keymap = palmt5_matrix_keys,
.keymap_size = ARRAY_SIZE(palmt5_matrix_keys),
};
static struct pxa27x_keypad_platform_data palmt5_keypad_platform_data = {
.matrix_key_rows = 4,
.matrix_key_cols = 3,
.matrix_keymap_data = &palmt5_matrix_keymap_data,
.debounce_interval = 30,
};
static void __init palmt5_kpc_init(void)
{
pxa_set_keypad_info(&palmt5_keypad_platform_data);
}
#else
static inline void palmt5_kpc_init(void) {}
#endif
/******************************************************************************
* GPIO keys
******************************************************************************/
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
static struct gpio_keys_button palmt5_pxa_buttons[] = {
{KEY_F8, GPIO_NR_PALMT5_HOTSYNC_BUTTON_N, 1, "HotSync Button" },
};
static struct gpio_keys_platform_data palmt5_pxa_keys_data = {
.buttons = palmt5_pxa_buttons,
.nbuttons = ARRAY_SIZE(palmt5_pxa_buttons),
};
static struct platform_device palmt5_pxa_keys = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &palmt5_pxa_keys_data,
},
};
static void __init palmt5_keys_init(void)
{
platform_device_register(&palmt5_pxa_keys);
}
#else
static inline void palmt5_keys_init(void) {}
#endif
/******************************************************************************
* Machine init
******************************************************************************/
static void __init palmt5_reserve(void)
{
memblock_reserve(0xa0200000, 0x1000);
}
static struct gpiod_lookup_table palmt5_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMT5_SD_DETECT_N,
"cd", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMT5_SD_READONLY,
"wp", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMT5_SD_POWER,
"power", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct gpiod_lookup_table palmt5_wm97xx_touch_gpio_table = {
.dev_id = "wm97xx-touch",
.table = {
GPIO_LOOKUP("gpio-pxa", 27, "touch", GPIO_ACTIVE_HIGH),
{ },
},
};
static void __init palmt5_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmt5_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
palm27x_mmc_init(&palmt5_mci_gpio_table);
gpiod_add_lookup_table(&palmt5_wm97xx_touch_gpio_table);
palm27x_pm_init(PALMT5_STR_BASE);
palm27x_lcd_init(-1, &palm_320x480_lcd_mode);
palm27x_udc_init(GPIO_NR_PALMT5_USB_DETECT_N,
GPIO_NR_PALMT5_USB_PULLUP, 1);
palm27x_irda_init(GPIO_NR_PALMT5_IR_DISABLE);
palm27x_ac97_init(PALMT5_BAT_MIN_VOLTAGE, PALMT5_BAT_MAX_VOLTAGE,
GPIO_NR_PALMT5_EARPHONE_DETECT, 95);
palm27x_pwm_init(GPIO_NR_PALMT5_BL_POWER, GPIO_NR_PALMT5_LCD_POWER);
palm27x_power_init(GPIO_NR_PALMT5_POWER_DETECT, -1);
palm27x_pmic_init();
palmt5_kpc_init();
palmt5_keys_init();
}
MACHINE_START(PALMT5, "Palm Tungsten|T5")
.atag_offset = 0x100,
.map_io = pxa27x_map_io,
.reserve = palmt5_reserve,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = palmt5_init,
.restart = pxa_restart,
MACHINE_END

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arch/arm/mach-pxa/palmt5.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* GPIOs and interrupts for Palm Tungsten|T5 Handheld Computer
*
* Authors: Ales Snuparek <snuparek@atlas.cz>
* Marek Vasut <marek.vasut@gmail.com>
* Justin Kendrick <twilightsentry@gmail.com>
* RichardT5 <richard_t5@users.sourceforge.net>
*/
#ifndef _INCLUDE_PALMT5_H_
#define _INCLUDE_PALMT5_H_
#include "irqs.h" /* PXA_GPIO_TO_IRQ */
/** HERE ARE GPIOs **/
/* GPIOs */
#define GPIO_NR_PALMT5_GPIO_RESET 1
#define GPIO_NR_PALMT5_POWER_DETECT 90
#define GPIO_NR_PALMT5_HOTSYNC_BUTTON_N 10
#define GPIO_NR_PALMT5_EARPHONE_DETECT 107
/* SD/MMC */
#define GPIO_NR_PALMT5_SD_DETECT_N 14
#define GPIO_NR_PALMT5_SD_POWER 114
#define GPIO_NR_PALMT5_SD_READONLY 115
/* TOUCHSCREEN */
#define GPIO_NR_PALMT5_WM9712_IRQ 27
/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
#define GPIO_NR_PALMT5_IR_DISABLE 40
/* USB */
#define GPIO_NR_PALMT5_USB_DETECT_N 15
#define GPIO_NR_PALMT5_USB_PULLUP 93
/* LCD/BACKLIGHT */
#define GPIO_NR_PALMT5_BL_POWER 84
#define GPIO_NR_PALMT5_LCD_POWER 96
/* BLUETOOTH */
#define GPIO_NR_PALMT5_BT_POWER 17
#define GPIO_NR_PALMT5_BT_RESET 83
/* INTERRUPTS */
#define IRQ_GPIO_PALMT5_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_SD_DETECT_N)
#define IRQ_GPIO_PALMT5_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_WM9712_IRQ)
#define IRQ_GPIO_PALMT5_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_USB_DETECT)
#define IRQ_GPIO_PALMT5_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_GPIO_RESET)
/** HERE ARE INIT VALUES **/
/* Various addresses */
#define PALMT5_PHYS_RAM_START 0xa0000000
#define PALMT5_PHYS_IO_START 0x40000000
#define PALMT5_STR_BASE 0xa0200000
/* TOUCHSCREEN */
#define AC97_LINK_FRAME 21
/* BATTERY */
#define PALMT5_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
#define PALMT5_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
#define PALMT5_BAT_MAX_CURRENT 0 /* unknown */
#define PALMT5_BAT_MIN_CURRENT 0 /* unknown */
#define PALMT5_BAT_MAX_CHARGE 1 /* unknown */
#define PALMT5_BAT_MIN_CHARGE 1 /* unknown */
#define PALMT5_MAX_LIFE_MINS 360 /* on-life in minutes */
#define PALMT5_BAT_MEASURE_DELAY (HZ * 1)
/* BACKLIGHT */
#define PALMT5_MAX_INTENSITY 0xFE
#define PALMT5_DEFAULT_INTENSITY 0x7E
#define PALMT5_LIMIT_MASK 0x7F
#define PALMT5_PRESCALER 0x3F
#define PALMT5_PERIOD_NS 3500
#endif

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arch/arm/mach-pxa/palmtc-pcmcia.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/drivers/pcmcia/pxa2xx_palmtc.c
*
* Driver for Palm Tungsten|C PCMCIA
*
* Copyright (C) 2008 Alex Osborne <ato@meshy.org>
* Copyright (C) 2009-2011 Marek Vasut <marek.vasut@gmail.com>
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <asm/mach-types.h>
#include "palmtc.h"
#include <pcmcia/soc_common.h>
static struct gpio palmtc_pcmcia_gpios[] = {
{ GPIO_NR_PALMTC_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" },
{ GPIO_NR_PALMTC_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" },
{ GPIO_NR_PALMTC_PCMCIA_POWER3, GPIOF_INIT_LOW, "PCMCIA Power 3" },
{ GPIO_NR_PALMTC_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" },
{ GPIO_NR_PALMTC_PCMCIA_PWRREADY, GPIOF_IN, "PCMCIA Power Ready" },
};
static int palmtc_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
{
int ret;
ret = gpio_request_array(palmtc_pcmcia_gpios,
ARRAY_SIZE(palmtc_pcmcia_gpios));
skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTC_PCMCIA_READY;
skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready";
return ret;
}
static void palmtc_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
{
gpio_free_array(palmtc_pcmcia_gpios, ARRAY_SIZE(palmtc_pcmcia_gpios));
}
static void palmtc_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
struct pcmcia_state *state)
{
state->detect = 1; /* always inserted */
state->vs_3v = 1;
state->vs_Xv = 0;
}
static int palmtc_wifi_powerdown(void)
{
gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1);
gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 0);
mdelay(40);
gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 0);
return 0;
}
static int palmtc_wifi_powerup(void)
{
int timeout = 50;
gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 1);
mdelay(50);
/* Power up the card, 1.8V first, after a while 3.3V */
gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 1);
mdelay(100);
gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 1);
/* Wait till the card is ready */
while (!gpio_get_value(GPIO_NR_PALMTC_PCMCIA_PWRREADY) &&
timeout) {
mdelay(1);
timeout--;
}
/* Power down the WiFi in case of error */
if (!timeout) {
palmtc_wifi_powerdown();
return 1;
}
/* Reset the card */
gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1);
mdelay(20);
gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 0);
mdelay(25);
gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 0);
return 0;
}
static int palmtc_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
const socket_state_t *state)
{
int ret = 1;
if (state->Vcc == 0)
ret = palmtc_wifi_powerdown();
else if (state->Vcc == 33)
ret = palmtc_wifi_powerup();
return ret;
}
static struct pcmcia_low_level palmtc_pcmcia_ops = {
.owner = THIS_MODULE,
.first = 0,
.nr = 1,
.hw_init = palmtc_pcmcia_hw_init,
.hw_shutdown = palmtc_pcmcia_hw_shutdown,
.socket_state = palmtc_pcmcia_socket_state,
.configure_socket = palmtc_pcmcia_configure_socket,
};
static struct platform_device *palmtc_pcmcia_device;
static int __init palmtc_pcmcia_init(void)
{
int ret;
if (!machine_is_palmtc())
return -ENODEV;
palmtc_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
if (!palmtc_pcmcia_device)
return -ENOMEM;
ret = platform_device_add_data(palmtc_pcmcia_device, &palmtc_pcmcia_ops,
sizeof(palmtc_pcmcia_ops));
if (!ret)
ret = platform_device_add(palmtc_pcmcia_device);
if (ret)
platform_device_put(palmtc_pcmcia_device);
return ret;
}
static void __exit palmtc_pcmcia_exit(void)
{
platform_device_unregister(palmtc_pcmcia_device);
}
module_init(palmtc_pcmcia_init);
module_exit(palmtc_pcmcia_exit);
MODULE_AUTHOR("Alex Osborne <ato@meshy.org>,"
" Marek Vasut <marek.vasut@gmail.com>");
MODULE_DESCRIPTION("PCMCIA support for Palm Tungsten|C");
MODULE_ALIAS("platform:pxa2xx-pcmcia");
MODULE_LICENSE("GPL");

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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/palmtc.c
*
* Support for the Palm Tungsten|C
*
* Author: Marek Vasut <marek.vasut@gmail.com>
*
* Based on work of:
* Petr Blaha <p3t3@centrum.cz>
* Chetan S. Kumar <shivakumar.chetan@gmail.com>
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/input.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/gpio/machine.h>
#include <linux/input/matrix_keypad.h>
#include <linux/ucb1400.h>
#include <linux/power_supply.h>
#include <linux/gpio_keys.h>
#include <linux/mtd/physmap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "pxa25x.h"
#include <linux/platform_data/asoc-pxa.h>
#include "palmtc.h"
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/irda-pxaficp.h>
#include "udc.h"
#include "generic.h"
#include "devices.h"
/******************************************************************************
* Pin configuration
******************************************************************************/
static unsigned long palmtc_pin_config[] __initdata = {
/* MMC */
GPIO6_MMC_CLK,
GPIO8_MMC_CS0,
GPIO12_GPIO, /* detect */
GPIO32_GPIO, /* power */
GPIO54_GPIO, /* r/o switch */
/* PCMCIA */
GPIO52_nPCE_1,
GPIO53_nPCE_2,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO49_nPWE,
GPIO48_nPOE,
GPIO52_nPCE_1,
GPIO53_nPCE_2,
GPIO57_nIOIS16,
GPIO56_nPWAIT,
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
/* IrDA */
GPIO45_GPIO, /* ir disable */
GPIO46_FICP_RXD,
GPIO47_FICP_TXD,
/* PWM */
GPIO17_PWM1_OUT,
/* USB */
GPIO4_GPIO, /* detect */
GPIO36_GPIO, /* pullup */
/* LCD */
GPIOxx_LCD_TFT_16BPP,
/* MATRIX KEYPAD */
GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 0 */
GPIO9_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 1 */
GPIO10_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 2 */
GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* in 3 */
GPIO18_GPIO | MFP_LPM_DRIVE_LOW, /* out 0 */
GPIO19_GPIO | MFP_LPM_DRIVE_LOW, /* out 1 */
GPIO20_GPIO | MFP_LPM_DRIVE_LOW, /* out 2 */
GPIO21_GPIO | MFP_LPM_DRIVE_LOW, /* out 3 */
GPIO22_GPIO | MFP_LPM_DRIVE_LOW, /* out 4 */
GPIO23_GPIO | MFP_LPM_DRIVE_LOW, /* out 5 */
GPIO24_GPIO | MFP_LPM_DRIVE_LOW, /* out 6 */
GPIO25_GPIO | MFP_LPM_DRIVE_LOW, /* out 7 */
GPIO26_GPIO | MFP_LPM_DRIVE_LOW, /* out 8 */
GPIO27_GPIO | MFP_LPM_DRIVE_LOW, /* out 9 */
GPIO79_GPIO | MFP_LPM_DRIVE_LOW, /* out 10 */
GPIO80_GPIO | MFP_LPM_DRIVE_LOW, /* out 11 */
/* PXA GPIO KEYS */
GPIO7_GPIO | WAKEUP_ON_EDGE_BOTH, /* hotsync button on cradle */
/* MISC */
GPIO1_RST, /* reset */
GPIO2_GPIO, /* earphone detect */
GPIO16_GPIO, /* backlight switch */
};
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
static struct pxamci_platform_data palmtc_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.detect_delay_ms = 200,
};
static struct gpiod_lookup_table palmtc_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_SD_DETECT_N,
"cd", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_SD_READONLY,
"wp", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_SD_POWER,
"power", GPIO_ACTIVE_HIGH),
{ },
},
};
static void __init palmtc_mmc_init(void)
{
gpiod_add_lookup_table(&palmtc_mci_gpio_table);
pxa_set_mci_info(&palmtc_mci_platform_data);
}
#else
static inline void palmtc_mmc_init(void) {}
#endif
/******************************************************************************
* GPIO keys
******************************************************************************/
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
static struct gpio_keys_button palmtc_pxa_buttons[] = {
{KEY_F8, GPIO_NR_PALMTC_HOTSYNC_BUTTON, 1, "HotSync Button", EV_KEY, 1},
};
static struct gpio_keys_platform_data palmtc_pxa_keys_data = {
.buttons = palmtc_pxa_buttons,
.nbuttons = ARRAY_SIZE(palmtc_pxa_buttons),
};
static struct platform_device palmtc_pxa_keys = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &palmtc_pxa_keys_data,
},
};
static void __init palmtc_keys_init(void)
{
platform_device_register(&palmtc_pxa_keys);
}
#else
static inline void palmtc_keys_init(void) {}
#endif
/******************************************************************************
* Backlight
******************************************************************************/
#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
static struct gpiod_lookup_table palmtc_pwm_bl_gpio_table = {
.dev_id = "pwm-backlight.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_BL_POWER,
"enable", GPIO_ACTIVE_HIGH),
},
};
static struct pwm_lookup palmtc_pwm_lookup[] = {
PWM_LOOKUP("pxa25x-pwm.1", 0, "pwm-backlight.0", NULL, PALMTC_PERIOD_NS,
PWM_POLARITY_NORMAL),
};
static struct platform_pwm_backlight_data palmtc_backlight_data = {
.max_brightness = PALMTC_MAX_INTENSITY,
.dft_brightness = PALMTC_MAX_INTENSITY,
};
static struct platform_device palmtc_backlight = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa25x_device_pwm1.dev,
.platform_data = &palmtc_backlight_data,
},
};
static void __init palmtc_pwm_init(void)
{
gpiod_add_lookup_table(&palmtc_pwm_bl_gpio_table);
pwm_add_table(palmtc_pwm_lookup, ARRAY_SIZE(palmtc_pwm_lookup));
platform_device_register(&palmtc_backlight);
}
#else
static inline void palmtc_pwm_init(void) {}
#endif
/******************************************************************************
* IrDA
******************************************************************************/
#if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
static struct pxaficp_platform_data palmtc_ficp_platform_data = {
.gpio_pwdown = GPIO_NR_PALMTC_IR_DISABLE,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
static void __init palmtc_irda_init(void)
{
pxa_set_ficp_info(&palmtc_ficp_platform_data);
}
#else
static inline void palmtc_irda_init(void) {}
#endif
/******************************************************************************
* Keyboard
******************************************************************************/
#if defined(CONFIG_KEYBOARD_MATRIX) || defined(CONFIG_KEYBOARD_MATRIX_MODULE)
static const uint32_t palmtc_matrix_keys[] = {
KEY(0, 0, KEY_F1),
KEY(0, 1, KEY_X),
KEY(0, 2, KEY_POWER),
KEY(0, 3, KEY_TAB),
KEY(0, 4, KEY_A),
KEY(0, 5, KEY_Q),
KEY(0, 6, KEY_LEFTSHIFT),
KEY(0, 7, KEY_Z),
KEY(0, 8, KEY_S),
KEY(0, 9, KEY_W),
KEY(0, 10, KEY_E),
KEY(0, 11, KEY_UP),
KEY(1, 0, KEY_F2),
KEY(1, 1, KEY_DOWN),
KEY(1, 3, KEY_D),
KEY(1, 4, KEY_C),
KEY(1, 5, KEY_F),
KEY(1, 6, KEY_R),
KEY(1, 7, KEY_SPACE),
KEY(1, 8, KEY_V),
KEY(1, 9, KEY_G),
KEY(1, 10, KEY_T),
KEY(1, 11, KEY_LEFT),
KEY(2, 0, KEY_F3),
KEY(2, 1, KEY_LEFTCTRL),
KEY(2, 3, KEY_H),
KEY(2, 4, KEY_Y),
KEY(2, 5, KEY_N),
KEY(2, 6, KEY_J),
KEY(2, 7, KEY_U),
KEY(2, 8, KEY_M),
KEY(2, 9, KEY_K),
KEY(2, 10, KEY_I),
KEY(2, 11, KEY_RIGHT),
KEY(3, 0, KEY_F4),
KEY(3, 1, KEY_ENTER),
KEY(3, 3, KEY_DOT),
KEY(3, 4, KEY_L),
KEY(3, 5, KEY_O),
KEY(3, 6, KEY_LEFTALT),
KEY(3, 7, KEY_ENTER),
KEY(3, 8, KEY_BACKSPACE),
KEY(3, 9, KEY_P),
KEY(3, 10, KEY_B),
KEY(3, 11, KEY_FN),
};
const struct matrix_keymap_data palmtc_keymap_data = {
.keymap = palmtc_matrix_keys,
.keymap_size = ARRAY_SIZE(palmtc_matrix_keys),
};
static const unsigned int palmtc_keypad_row_gpios[] = {
0, 9, 10, 11
};
static const unsigned int palmtc_keypad_col_gpios[] = {
18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80
};
static struct matrix_keypad_platform_data palmtc_keypad_platform_data = {
.keymap_data = &palmtc_keymap_data,
.row_gpios = palmtc_keypad_row_gpios,
.num_row_gpios = ARRAY_SIZE(palmtc_keypad_row_gpios),
.col_gpios = palmtc_keypad_col_gpios,
.num_col_gpios = ARRAY_SIZE(palmtc_keypad_col_gpios),
.active_low = 1,
.debounce_ms = 20,
.col_scan_delay_us = 5,
};
static struct platform_device palmtc_keyboard = {
.name = "matrix-keypad",
.id = -1,
.dev = {
.platform_data = &palmtc_keypad_platform_data,
},
};
static void __init palmtc_mkp_init(void)
{
platform_device_register(&palmtc_keyboard);
}
#else
static inline void palmtc_mkp_init(void) {}
#endif
/******************************************************************************
* UDC
******************************************************************************/
#if defined(CONFIG_USB_PXA25X)||defined(CONFIG_USB_PXA25X_MODULE)
static struct gpiod_lookup_table palmtc_udc_gpiod_table = {
.dev_id = "gpio-vbus",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_USB_DETECT_N,
"vbus", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTC_USB_POWER,
"pullup", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct platform_device palmtc_gpio_vbus = {
.name = "gpio-vbus",
.id = -1,
};
static void __init palmtc_udc_init(void)
{
gpiod_add_lookup_table(&palmtc_udc_gpiod_table);
platform_device_register(&palmtc_gpio_vbus);
};
#else
static inline void palmtc_udc_init(void) {}
#endif
/******************************************************************************
* Touchscreen / Battery / GPIO-extender
******************************************************************************/
#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
static struct platform_device palmtc_ucb1400_device = {
.name = "ucb1400_core",
.id = -1,
};
static void __init palmtc_ts_init(void)
{
pxa_set_ac97_info(NULL);
platform_device_register(&palmtc_ucb1400_device);
}
#else
static inline void palmtc_ts_init(void) {}
#endif
/******************************************************************************
* LEDs
******************************************************************************/
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
struct gpio_led palmtc_gpio_leds[] = {
{
.name = "palmtc:green:user",
.default_trigger = "none",
.gpio = GPIO_NR_PALMTC_LED_POWER,
.active_low = 1,
}, {
.name = "palmtc:vibra:vibra",
.default_trigger = "none",
.gpio = GPIO_NR_PALMTC_VIBRA_POWER,
.active_low = 1,
}
};
static struct gpio_led_platform_data palmtc_gpio_led_info = {
.leds = palmtc_gpio_leds,
.num_leds = ARRAY_SIZE(palmtc_gpio_leds),
};
static struct platform_device palmtc_leds = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &palmtc_gpio_led_info,
}
};
static void __init palmtc_leds_init(void)
{
platform_device_register(&palmtc_leds);
}
#else
static inline void palmtc_leds_init(void) {}
#endif
/******************************************************************************
* NOR Flash
******************************************************************************/
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct resource palmtc_flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_16M - 1,
.flags = IORESOURCE_MEM,
};
static struct mtd_partition palmtc_flash_parts[] = {
{
.name = "U-Boot Bootloader",
.offset = 0x0,
.size = 0x40000,
},
{
.name = "Linux Kernel",
.offset = 0x40000,
.size = 0x2c0000,
},
{
.name = "Filesystem",
.offset = 0x300000,
.size = 0xcc0000,
},
{
.name = "U-Boot Environment",
.offset = 0xfc0000,
.size = MTDPART_SIZ_FULL,
},
};
static struct physmap_flash_data palmtc_flash_data = {
.width = 4,
.parts = palmtc_flash_parts,
.nr_parts = ARRAY_SIZE(palmtc_flash_parts),
};
static struct platform_device palmtc_flash = {
.name = "physmap-flash",
.id = -1,
.resource = &palmtc_flash_resource,
.num_resources = 1,
.dev = {
.platform_data = &palmtc_flash_data,
},
};
static void __init palmtc_nor_init(void)
{
platform_device_register(&palmtc_flash);
}
#else
static inline void palmtc_nor_init(void) {}
#endif
/******************************************************************************
* Framebuffer
******************************************************************************/
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static struct pxafb_mode_info palmtc_lcd_modes[] = {
{
.pixclock = 115384,
.xres = 320,
.yres = 320,
.bpp = 16,
.left_margin = 27,
.right_margin = 7,
.upper_margin = 7,
.lower_margin = 8,
.hsync_len = 6,
.vsync_len = 1,
},
};
static struct pxafb_mach_info palmtc_lcd_screen = {
.modes = palmtc_lcd_modes,
.num_modes = ARRAY_SIZE(palmtc_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
static void __init palmtc_lcd_init(void)
{
pxa_set_fb_info(NULL, &palmtc_lcd_screen);
}
#else
static inline void palmtc_lcd_init(void) {}
#endif
/******************************************************************************
* Machine init
******************************************************************************/
static void __init palmtc_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_hwuart_info(NULL);
palmtc_mmc_init();
palmtc_keys_init();
palmtc_pwm_init();
palmtc_irda_init();
palmtc_mkp_init();
palmtc_udc_init();
palmtc_ts_init();
palmtc_nor_init();
palmtc_lcd_init();
palmtc_leds_init();
};
MACHINE_START(PALMTC, "Palm Tungsten|C")
.atag_offset = 0x100,
.map_io = pxa25x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = palmtc_init,
.restart = pxa_restart,
MACHINE_END

84
arch/arm/mach-pxa/palmtc.h
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@ -1,84 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* linux/include/asm-arm/arch-pxa/palmtc-gpio.h
*
* GPIOs and interrupts for Palm Tungsten|C Handheld Computer
*
* Authors: Alex Osborne <bobofdoom@gmail.com>
* Marek Vasut <marek.vasut@gmail.com>
* Holger Bocklet <bitz.email@gmx.net>
*/
#ifndef _INCLUDE_PALMTC_H_
#define _INCLUDE_PALMTC_H_
#include "irqs.h" /* PXA_GPIO_TO_IRQ */
/** HERE ARE GPIOs **/
/* GPIOs */
#define GPIO_NR_PALMTC_EARPHONE_DETECT 2
#define GPIO_NR_PALMTC_CRADLE_DETECT 5
#define GPIO_NR_PALMTC_HOTSYNC_BUTTON 7
/* SD/MMC */
#define GPIO_NR_PALMTC_SD_DETECT_N 12
#define GPIO_NR_PALMTC_SD_POWER 32
#define GPIO_NR_PALMTC_SD_READONLY 54
/* WLAN */
#define GPIO_NR_PALMTC_PCMCIA_READY 13
#define GPIO_NR_PALMTC_PCMCIA_PWRREADY 14
#define GPIO_NR_PALMTC_PCMCIA_POWER1 15
#define GPIO_NR_PALMTC_PCMCIA_POWER2 33
#define GPIO_NR_PALMTC_PCMCIA_POWER3 55
#define GPIO_NR_PALMTC_PCMCIA_RESET 78
/* UDC */
#define GPIO_NR_PALMTC_USB_DETECT_N 4
#define GPIO_NR_PALMTC_USB_POWER 36
/* LCD/BACKLIGHT */
#define GPIO_NR_PALMTC_BL_POWER 16
#define GPIO_NR_PALMTC_LCD_POWER 44
#define GPIO_NR_PALMTC_LCD_BLANK 38
/* UART */
#define GPIO_NR_PALMTC_RS232_POWER 37
/* IRDA */
#define GPIO_NR_PALMTC_IR_DISABLE 45
/* IRQs */
#define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N)
#define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY)
/* UCB1400 GPIOs */
#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00)
#define GPIO_NR_PALMTC_HEADPHONE_DETECT (0x80 | 0x01)
#define GPIO_NR_PALMTC_SPEAKER_ENABLE (0x80 | 0x03)
#define GPIO_NR_PALMTC_VIBRA_POWER (0x80 | 0x05)
#define GPIO_NR_PALMTC_LED_POWER (0x80 | 0x07)
/** HERE ARE INIT VALUES **/
#define PALMTC_UCB1400_GPIO_OFFSET 0x80
/* BATTERY */
#define PALMTC_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */
#define PALMTC_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */
#define PALMTC_BAT_MAX_CURRENT 0 /* unknown */
#define PALMTC_BAT_MIN_CURRENT 0 /* unknown */
#define PALMTC_BAT_MAX_CHARGE 1 /* unknown */
#define PALMTC_BAT_MIN_CHARGE 1 /* unknown */
#define PALMTC_MAX_LIFE_MINS 240 /* on-life in minutes */
#define PALMTC_BAT_MEASURE_DELAY (HZ * 1)
/* BACKLIGHT */
#define PALMTC_MAX_INTENSITY 0xFE
#define PALMTC_DEFAULT_INTENSITY 0x7E
#define PALMTC_LIMIT_MASK 0x7F
#define PALMTC_PRESCALER 0x3F
#define PALMTC_PERIOD_NS 3500
#endif

383
arch/arm/mach-pxa/palmte2.c
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@ -1,383 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Hardware definitions for Palm Tungsten|E2
*
* Author:
* Carlos Eduardo Medaglia Dyonisio <cadu@nerdfeliz.com>
*
* Rewrite for mainline:
* Marek Vasut <marek.vasut@gmail.com>
*
* (find more info at www.hackndev.com)
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/gpio_keys.h>
#include <linux/gpio/machine.h>
#include <linux/input.h>
#include <linux/pda_power.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/gpio.h>
#include <linux/wm97xx.h>
#include <linux/power_supply.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "pxa25x.h"
#include <linux/platform_data/asoc-pxa.h>
#include "palmte2.h"
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/irda-pxaficp.h>
#include "udc.h"
#include <linux/platform_data/asoc-palm27x.h>
#include "generic.h"
#include "devices.h"
/******************************************************************************
* Pin configuration
******************************************************************************/
static unsigned long palmte2_pin_config[] __initdata = {
/* MMC */
GPIO6_MMC_CLK,
GPIO8_MMC_CS0,
GPIO10_GPIO, /* SD detect */
GPIO55_GPIO, /* SD power */
GPIO51_GPIO, /* SD r/o switch */
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
/* PWM */
GPIO16_PWM0_OUT,
/* USB */
GPIO15_GPIO, /* usb detect */
GPIO53_GPIO, /* usb power */
/* IrDA */
GPIO48_GPIO, /* ir disable */
GPIO46_FICP_RXD,
GPIO47_FICP_TXD,
/* LCD */
GPIOxx_LCD_TFT_16BPP,
/* GPIO KEYS */
GPIO5_GPIO, /* notes */
GPIO7_GPIO, /* tasks */
GPIO11_GPIO, /* calendar */
GPIO13_GPIO, /* contacts */
GPIO14_GPIO, /* center */
GPIO19_GPIO, /* left */
GPIO20_GPIO, /* right */
GPIO21_GPIO, /* down */
GPIO22_GPIO, /* up */
/* MISC */
GPIO1_RST, /* reset */
GPIO4_GPIO, /* Hotsync button */
GPIO9_GPIO, /* power detect */
GPIO15_GPIO, /* earphone detect */
GPIO37_GPIO, /* LCD power */
GPIO56_GPIO, /* Backlight power */
};
/******************************************************************************
* SD/MMC card controller
******************************************************************************/
static struct pxamci_platform_data palmte2_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
};
static struct gpiod_lookup_table palmte2_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTE2_SD_DETECT_N,
"cd", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTE2_SD_READONLY,
"wp", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTE2_SD_POWER,
"power", GPIO_ACTIVE_HIGH),
{ },
},
};
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
/******************************************************************************
* GPIO keys
******************************************************************************/
static struct gpio_keys_button palmte2_pxa_buttons[] = {
{KEY_F1, GPIO_NR_PALMTE2_KEY_CONTACTS, 1, "Contacts" },
{KEY_F2, GPIO_NR_PALMTE2_KEY_CALENDAR, 1, "Calendar" },
{KEY_F3, GPIO_NR_PALMTE2_KEY_TASKS, 1, "Tasks" },
{KEY_F4, GPIO_NR_PALMTE2_KEY_NOTES, 1, "Notes" },
{KEY_ENTER, GPIO_NR_PALMTE2_KEY_CENTER, 1, "Center" },
{KEY_LEFT, GPIO_NR_PALMTE2_KEY_LEFT, 1, "Left" },
{KEY_RIGHT, GPIO_NR_PALMTE2_KEY_RIGHT, 1, "Right" },
{KEY_DOWN, GPIO_NR_PALMTE2_KEY_DOWN, 1, "Down" },
{KEY_UP, GPIO_NR_PALMTE2_KEY_UP, 1, "Up" },
};
static struct gpio_keys_platform_data palmte2_pxa_keys_data = {
.buttons = palmte2_pxa_buttons,
.nbuttons = ARRAY_SIZE(palmte2_pxa_buttons),
};
static struct platform_device palmte2_pxa_keys = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &palmte2_pxa_keys_data,
},
};
#endif
/******************************************************************************
* Backlight
******************************************************************************/
static struct pwm_lookup palmte2_pwm_lookup[] = {
PWM_LOOKUP("pxa25x-pwm.0", 0, "pwm-backlight.0", NULL,
PALMTE2_PERIOD_NS, PWM_POLARITY_NORMAL),
};
static struct gpio palmte_bl_gpios[] = {
{ GPIO_NR_PALMTE2_BL_POWER, GPIOF_INIT_LOW, "Backlight power" },
{ GPIO_NR_PALMTE2_LCD_POWER, GPIOF_INIT_LOW, "LCD power" },
};
static int palmte2_backlight_init(struct device *dev)
{
return gpio_request_array(ARRAY_AND_SIZE(palmte_bl_gpios));
}
static int palmte2_backlight_notify(struct device *dev, int brightness)
{
gpio_set_value(GPIO_NR_PALMTE2_BL_POWER, brightness);
gpio_set_value(GPIO_NR_PALMTE2_LCD_POWER, brightness);
return brightness;
}
static void palmte2_backlight_exit(struct device *dev)
{
gpio_free_array(ARRAY_AND_SIZE(palmte_bl_gpios));
}
static struct platform_pwm_backlight_data palmte2_backlight_data = {
.max_brightness = PALMTE2_MAX_INTENSITY,
.dft_brightness = PALMTE2_MAX_INTENSITY,
.init = palmte2_backlight_init,
.notify = palmte2_backlight_notify,
.exit = palmte2_backlight_exit,
};
static struct platform_device palmte2_backlight = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa25x_device_pwm0.dev,
.platform_data = &palmte2_backlight_data,
},
};
/******************************************************************************
* IrDA
******************************************************************************/
static struct pxaficp_platform_data palmte2_ficp_platform_data = {
.gpio_pwdown = GPIO_NR_PALMTE2_IR_DISABLE,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/******************************************************************************
* UDC
******************************************************************************/
static struct gpiod_lookup_table palmte2_udc_gpiod_table = {
.dev_id = "gpio-vbus",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTE2_USB_DETECT_N,
"vbus", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTE2_USB_PULLUP,
"pullup", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct platform_device palmte2_gpio_vbus = {
.name = "gpio-vbus",
.id = -1,
};
/******************************************************************************
* Power supply
******************************************************************************/
static int power_supply_init(struct device *dev)
{
int ret;
ret = gpio_request(GPIO_NR_PALMTE2_POWER_DETECT, "CABLE_STATE_AC");
if (ret)
goto err1;
ret = gpio_direction_input(GPIO_NR_PALMTE2_POWER_DETECT);
if (ret)
goto err2;
return 0;
err2:
gpio_free(GPIO_NR_PALMTE2_POWER_DETECT);
err1:
return ret;
}
static int palmte2_is_ac_online(void)
{
return gpio_get_value(GPIO_NR_PALMTE2_POWER_DETECT);
}
static void power_supply_exit(struct device *dev)
{
gpio_free(GPIO_NR_PALMTE2_POWER_DETECT);
}
static char *palmte2_supplicants[] = {
"main-battery",
};
static struct pda_power_pdata power_supply_info = {
.init = power_supply_init,
.is_ac_online = palmte2_is_ac_online,
.exit = power_supply_exit,
.supplied_to = palmte2_supplicants,
.num_supplicants = ARRAY_SIZE(palmte2_supplicants),
};
static struct platform_device power_supply = {
.name = "pda-power",
.id = -1,
.dev = {
.platform_data = &power_supply_info,
},
};
/******************************************************************************
* WM97xx audio, battery
******************************************************************************/
static struct wm97xx_batt_pdata palmte2_batt_pdata = {
.batt_aux = WM97XX_AUX_ID3,
.temp_aux = WM97XX_AUX_ID2,
.max_voltage = PALMTE2_BAT_MAX_VOLTAGE,
.min_voltage = PALMTE2_BAT_MIN_VOLTAGE,
.batt_mult = 1000,
.batt_div = 414,
.temp_mult = 1,
.temp_div = 1,
.batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO,
.batt_name = "main-batt",
};
static struct wm97xx_pdata palmte2_wm97xx_pdata = {
.batt_pdata = &palmte2_batt_pdata,
};
static pxa2xx_audio_ops_t palmte2_ac97_pdata = {
.codec_pdata = { &palmte2_wm97xx_pdata, },
};
static struct palm27x_asoc_info palmte2_asoc_pdata = {
.jack_gpio = GPIO_NR_PALMTE2_EARPHONE_DETECT,
};
static struct platform_device palmte2_asoc = {
.name = "palm27x-asoc",
.id = -1,
.dev = {
.platform_data = &palmte2_asoc_pdata,
},
};
/******************************************************************************
* Framebuffer
******************************************************************************/
static struct pxafb_mode_info palmte2_lcd_modes[] = {
{
.pixclock = 77757,
.xres = 320,
.yres = 320,
.bpp = 16,
.left_margin = 28,
.right_margin = 7,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 4,
.vsync_len = 1,
},
};
static struct pxafb_mach_info palmte2_lcd_screen = {
.modes = palmte2_lcd_modes,
.num_modes = ARRAY_SIZE(palmte2_lcd_modes),
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};
/******************************************************************************
* Machine init
******************************************************************************/
static struct platform_device *devices[] __initdata = {
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
&palmte2_pxa_keys,
#endif
&palmte2_backlight,
&power_supply,
&palmte2_asoc,
&palmte2_gpio_vbus,
};
/* setup udc GPIOs initial state */
static void __init palmte2_udc_init(void)
{
if (!gpio_request(GPIO_NR_PALMTE2_USB_PULLUP, "UDC Vbus")) {
gpio_direction_output(GPIO_NR_PALMTE2_USB_PULLUP, 1);
gpio_free(GPIO_NR_PALMTE2_USB_PULLUP);
}
}
static void __init palmte2_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmte2_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
pxa_set_fb_info(NULL, &palmte2_lcd_screen);
gpiod_add_lookup_table(&palmte2_mci_gpio_table);
pxa_set_mci_info(&palmte2_mci_platform_data);
palmte2_udc_init();
pxa_set_ac97_info(&palmte2_ac97_pdata);
pxa_set_ficp_info(&palmte2_ficp_platform_data);
pwm_add_table(palmte2_pwm_lookup, ARRAY_SIZE(palmte2_pwm_lookup));
gpiod_add_lookup_table(&palmte2_udc_gpiod_table);
platform_add_devices(devices, ARRAY_SIZE(devices));
}
MACHINE_START(PALMTE2, "Palm Tungsten|E2")
.atag_offset = 0x100,
.map_io = pxa25x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = palmte2_init,
.restart = pxa_restart,
MACHINE_END

64
arch/arm/mach-pxa/palmte2.h
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@ -1,64 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* GPIOs and interrupts for Palm Tungsten|E2 Handheld Computer
*
* Author:
* Carlos Eduardo Medaglia Dyonisio <cadu@nerdfeliz.com>
*/
#ifndef _INCLUDE_PALMTE2_H_
#define _INCLUDE_PALMTE2_H_
/** HERE ARE GPIOs **/
/* GPIOs */
#define GPIO_NR_PALMTE2_POWER_DETECT 9
#define GPIO_NR_PALMTE2_HOTSYNC_BUTTON_N 4
#define GPIO_NR_PALMTE2_EARPHONE_DETECT 15
/* SD/MMC */
#define GPIO_NR_PALMTE2_SD_DETECT_N 10
#define GPIO_NR_PALMTE2_SD_POWER 55
#define GPIO_NR_PALMTE2_SD_READONLY 51
/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
#define GPIO_NR_PALMTE2_IR_DISABLE 48
/* USB */
#define GPIO_NR_PALMTE2_USB_DETECT_N 35
#define GPIO_NR_PALMTE2_USB_PULLUP 53
/* LCD/BACKLIGHT */
#define GPIO_NR_PALMTE2_BL_POWER 56
#define GPIO_NR_PALMTE2_LCD_POWER 37
/* KEYS */
#define GPIO_NR_PALMTE2_KEY_NOTES 5
#define GPIO_NR_PALMTE2_KEY_TASKS 7
#define GPIO_NR_PALMTE2_KEY_CALENDAR 11
#define GPIO_NR_PALMTE2_KEY_CONTACTS 13
#define GPIO_NR_PALMTE2_KEY_CENTER 14
#define GPIO_NR_PALMTE2_KEY_LEFT 19
#define GPIO_NR_PALMTE2_KEY_RIGHT 20
#define GPIO_NR_PALMTE2_KEY_DOWN 21
#define GPIO_NR_PALMTE2_KEY_UP 22
/** HERE ARE INIT VALUES **/
/* BACKLIGHT */
#define PALMTE2_MAX_INTENSITY 0xFE
#define PALMTE2_DEFAULT_INTENSITY 0x7E
#define PALMTE2_LIMIT_MASK 0x7F
#define PALMTE2_PRESCALER 0x3F
#define PALMTE2_PERIOD_NS 3500
/* BATTERY */
#define PALMTE2_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
#define PALMTE2_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
#define PALMTE2_BAT_MAX_CURRENT 0 /* unknown */
#define PALMTE2_BAT_MIN_CURRENT 0 /* unknown */
#define PALMTE2_BAT_MAX_CHARGE 1 /* unknown */
#define PALMTE2_BAT_MIN_CHARGE 1 /* unknown */
#define PALMTE2_MAX_LIFE_MINS 360 /* on-life in minutes */
#endif

548
arch/arm/mach-pxa/palmtreo.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Hardware definitions for Palm Treo smartphones
*
* currently supported:
* Palm Treo 680 (GSM)
* Palm Centro 685 (GSM)
*
* Author: Tomas Cech <sleep_walker@suse.cz>
*
* (find more info at www.hackndev.com)
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/memblock.h>
#include <linux/pda_power.h>
#include <linux/pwm_backlight.h>
#include <linux/gpio.h>
#include <linux/power_supply.h>
#include <linux/w1-gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "pxa27x.h"
#include "pxa27x-udc.h"
#include <linux/platform_data/asoc-pxa.h>
#include "palmtreo.h"
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/irda-pxaficp.h>
#include <linux/platform_data/keypad-pxa27x.h>
#include "udc.h"
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include "pxa2xx-regs.h"
#include <linux/platform_data/asoc-palm27x.h>
#include <linux/platform_data/media/camera-pxa.h>
#include "palm27x.h"
#include <sound/pxa2xx-lib.h>
#include "generic.h"
#include "devices.h"
/******************************************************************************
* Pin configuration
******************************************************************************/
static unsigned long treo_pin_config[] __initdata = {
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO113_GPIO, /* SD detect */
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO89_AC97_SYSCLK,
GPIO95_AC97_nRESET,
/* IrDA */
GPIO46_FICP_RXD,
GPIO47_FICP_TXD,
/* PWM */
GPIO16_PWM0_OUT,
/* USB */
GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, /* usb detect */
/* MATRIX KEYPAD */
GPIO101_KP_MKIN_1,
GPIO102_KP_MKIN_2,
GPIO97_KP_MKIN_3,
GPIO98_KP_MKIN_4,
GPIO91_KP_MKIN_6,
GPIO13_KP_MKIN_7,
GPIO103_KP_MKOUT_0 | MFP_LPM_DRIVE_HIGH,
GPIO104_KP_MKOUT_1,
GPIO105_KP_MKOUT_2,
GPIO106_KP_MKOUT_3,
GPIO107_KP_MKOUT_4,
GPIO108_KP_MKOUT_5,
GPIO96_KP_MKOUT_6,
GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH, /* Hotsync button */
/* Quick Capture Interface */
GPIO84_CIF_FV,
GPIO85_CIF_LV,
GPIO53_CIF_MCLK,
GPIO54_CIF_PCLK,
GPIO81_CIF_DD_0,
GPIO55_CIF_DD_1,
GPIO51_CIF_DD_2,
GPIO50_CIF_DD_3,
GPIO52_CIF_DD_4,
GPIO48_CIF_DD_5,
GPIO17_CIF_DD_6,
GPIO12_CIF_DD_7,
/* I2C */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
/* GSM */
GPIO14_GPIO | WAKEUP_ON_EDGE_BOTH, /* GSM host wake up */
GPIO34_FFUART_RXD,
GPIO35_FFUART_CTS,
GPIO39_FFUART_TXD,
GPIO41_FFUART_RTS,
/* MISC. */
GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* external power detect */
GPIO15_GPIO | WAKEUP_ON_EDGE_BOTH, /* silent switch */
GPIO116_GPIO, /* headphone detect */
GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* bluetooth host wake up */
};
#ifdef CONFIG_MACH_TREO680
static unsigned long treo680_pin_config[] __initdata = {
GPIO33_GPIO, /* SD read only */
/* MATRIX KEYPAD - different wake up source */
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
GPIO99_KP_MKIN_5,
/* LCD... L_BIAS alt fn not configured on Treo680; is GPIO instead */
GPIOxx_LCD_16BPP,
GPIO74_LCD_FCLK,
GPIO75_LCD_LCLK,
GPIO76_LCD_PCLK,
};
#endif /* CONFIG_MACH_TREO680 */
#ifdef CONFIG_MACH_CENTRO
static unsigned long centro685_pin_config[] __initdata = {
/* Bluetooth attached to BT UART*/
MFP_CFG_OUT(GPIO80, AF0, DRIVE_LOW), /* power: LOW = off */
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
GPIO44_BTUART_CTS,
GPIO45_BTUART_RTS,
/* MATRIX KEYPAD - different wake up source */
GPIO100_KP_MKIN_0,
GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
/* LCD */
GPIOxx_LCD_TFT_16BPP,
};
#endif /* CONFIG_MACH_CENTRO */
/******************************************************************************
* GPIO keyboard
******************************************************************************/
#if IS_ENABLED(CONFIG_KEYBOARD_PXA27x)
static const unsigned int treo680_matrix_keys[] = {
KEY(0, 0, KEY_F8), /* Red/Off/Power */
KEY(0, 1, KEY_LEFT),
KEY(0, 2, KEY_LEFTCTRL), /* Alternate */
KEY(0, 3, KEY_L),
KEY(0, 4, KEY_A),
KEY(0, 5, KEY_Q),
KEY(0, 6, KEY_P),
KEY(1, 0, KEY_RIGHTCTRL), /* Menu */
KEY(1, 1, KEY_RIGHT),
KEY(1, 2, KEY_LEFTSHIFT), /* Left shift */
KEY(1, 3, KEY_Z),
KEY(1, 4, KEY_S),
KEY(1, 5, KEY_W),
KEY(2, 0, KEY_F1), /* Phone */
KEY(2, 1, KEY_UP),
KEY(2, 2, KEY_0),
KEY(2, 3, KEY_X),
KEY(2, 4, KEY_D),
KEY(2, 5, KEY_E),
KEY(3, 0, KEY_F10), /* Calendar */
KEY(3, 1, KEY_DOWN),
KEY(3, 2, KEY_SPACE),
KEY(3, 3, KEY_C),
KEY(3, 4, KEY_F),
KEY(3, 5, KEY_R),
KEY(4, 0, KEY_F12), /* Mail */
KEY(4, 1, KEY_KPENTER),
KEY(4, 2, KEY_RIGHTALT), /* Alt */
KEY(4, 3, KEY_V),
KEY(4, 4, KEY_G),
KEY(4, 5, KEY_T),
KEY(5, 0, KEY_F9), /* Home */
KEY(5, 1, KEY_PAGEUP), /* Side up */
KEY(5, 2, KEY_DOT),
KEY(5, 3, KEY_B),
KEY(5, 4, KEY_H),
KEY(5, 5, KEY_Y),
KEY(6, 0, KEY_TAB), /* Side Activate */
KEY(6, 1, KEY_PAGEDOWN), /* Side down */
KEY(6, 2, KEY_ENTER),
KEY(6, 3, KEY_N),
KEY(6, 4, KEY_J),
KEY(6, 5, KEY_U),
KEY(7, 0, KEY_F6), /* Green/Call */
KEY(7, 1, KEY_O),
KEY(7, 2, KEY_BACKSPACE),
KEY(7, 3, KEY_M),
KEY(7, 4, KEY_K),
KEY(7, 5, KEY_I),
};
static const unsigned int centro_matrix_keys[] = {
KEY(0, 0, KEY_F9), /* Home */
KEY(0, 1, KEY_LEFT),
KEY(0, 2, KEY_LEFTCTRL), /* Alternate */
KEY(0, 3, KEY_L),
KEY(0, 4, KEY_A),
KEY(0, 5, KEY_Q),
KEY(0, 6, KEY_P),
KEY(1, 0, KEY_RIGHTCTRL), /* Menu */
KEY(1, 1, KEY_RIGHT),
KEY(1, 2, KEY_LEFTSHIFT), /* Left shift */
KEY(1, 3, KEY_Z),
KEY(1, 4, KEY_S),
KEY(1, 5, KEY_W),
KEY(2, 0, KEY_F1), /* Phone */
KEY(2, 1, KEY_UP),
KEY(2, 2, KEY_0),
KEY(2, 3, KEY_X),
KEY(2, 4, KEY_D),
KEY(2, 5, KEY_E),
KEY(3, 0, KEY_F10), /* Calendar */
KEY(3, 1, KEY_DOWN),
KEY(3, 2, KEY_SPACE),
KEY(3, 3, KEY_C),
KEY(3, 4, KEY_F),
KEY(3, 5, KEY_R),
KEY(4, 0, KEY_F12), /* Mail */
KEY(4, 1, KEY_KPENTER),
KEY(4, 2, KEY_RIGHTALT), /* Alt */
KEY(4, 3, KEY_V),
KEY(4, 4, KEY_G),
KEY(4, 5, KEY_T),
KEY(5, 0, KEY_F8), /* Red/Off/Power */
KEY(5, 1, KEY_PAGEUP), /* Side up */
KEY(5, 2, KEY_DOT),
KEY(5, 3, KEY_B),
KEY(5, 4, KEY_H),
KEY(5, 5, KEY_Y),
KEY(6, 0, KEY_TAB), /* Side Activate */
KEY(6, 1, KEY_PAGEDOWN), /* Side down */
KEY(6, 2, KEY_ENTER),
KEY(6, 3, KEY_N),
KEY(6, 4, KEY_J),
KEY(6, 5, KEY_U),
KEY(7, 0, KEY_F6), /* Green/Call */
KEY(7, 1, KEY_O),
KEY(7, 2, KEY_BACKSPACE),
KEY(7, 3, KEY_M),
KEY(7, 4, KEY_K),
KEY(7, 5, KEY_I),
};
static struct matrix_keymap_data treo680_matrix_keymap_data = {
.keymap = treo680_matrix_keys,
.keymap_size = ARRAY_SIZE(treo680_matrix_keys),
};
static struct matrix_keymap_data centro_matrix_keymap_data = {
.keymap = centro_matrix_keys,
.keymap_size = ARRAY_SIZE(centro_matrix_keys),
};
static struct pxa27x_keypad_platform_data treo680_keypad_pdata = {
.matrix_key_rows = 8,
.matrix_key_cols = 7,
.matrix_keymap_data = &treo680_matrix_keymap_data,
.direct_key_map = { KEY_CONNECT },
.direct_key_num = 1,
.debounce_interval = 30,
};
static void __init palmtreo_kpc_init(void)
{
static struct pxa27x_keypad_platform_data *data = &treo680_keypad_pdata;
if (machine_is_centro())
data->matrix_keymap_data = &centro_matrix_keymap_data;
pxa_set_keypad_info(&treo680_keypad_pdata);
}
#else
static inline void palmtreo_kpc_init(void) {}
#endif
/******************************************************************************
* USB host
******************************************************************************/
#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
static struct pxaohci_platform_data treo680_ohci_info = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT1 | ENABLE_PORT3,
.power_budget = 0,
};
static void __init palmtreo_uhc_init(void)
{
if (machine_is_treo680())
pxa_set_ohci_info(&treo680_ohci_info);
}
#else
static inline void palmtreo_uhc_init(void) {}
#endif
/******************************************************************************
* Vibra and LEDs
******************************************************************************/
static struct gpio_led treo680_gpio_leds[] = {
{
.name = "treo680:vibra:vibra",
.default_trigger = "none",
.gpio = GPIO_NR_TREO680_VIBRATE_EN,
},
{
.name = "treo680:green:led",
.default_trigger = "mmc0",
.gpio = GPIO_NR_TREO_GREEN_LED,
},
{
.name = "treo680:white:keybbl",
.default_trigger = "none",
.gpio = GPIO_NR_TREO680_KEYB_BL,
},
};
static struct gpio_led_platform_data treo680_gpio_led_info = {
.leds = treo680_gpio_leds,
.num_leds = ARRAY_SIZE(treo680_gpio_leds),
};
static struct gpio_led centro_gpio_leds[] = {
{
.name = "centro:vibra:vibra",
.default_trigger = "none",
.gpio = GPIO_NR_CENTRO_VIBRATE_EN,
},
{
.name = "centro:green:led",
.default_trigger = "mmc0",
.gpio = GPIO_NR_TREO_GREEN_LED,
},
{
.name = "centro:white:keybbl",
.default_trigger = "none",
.active_low = 1,
.gpio = GPIO_NR_CENTRO_KEYB_BL,
},
};
static struct gpio_led_platform_data centro_gpio_led_info = {
.leds = centro_gpio_leds,
.num_leds = ARRAY_SIZE(centro_gpio_leds),
};
static struct platform_device palmtreo_leds = {
.name = "leds-gpio",
.id = -1,
};
static void __init palmtreo_leds_init(void)
{
if (machine_is_centro())
palmtreo_leds.dev.platform_data = &centro_gpio_led_info;
else if (machine_is_treo680())
palmtreo_leds.dev.platform_data = &treo680_gpio_led_info;
platform_device_register(&palmtreo_leds);
}
/******************************************************************************
* Machine init
******************************************************************************/
static void __init treo_reserve(void)
{
memblock_reserve(0xa0000000, 0x1000);
memblock_reserve(0xa2000000, 0x1000);
}
static void __init palmphone_common_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(treo_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
palm27x_pm_init(TREO_STR_BASE);
palm27x_lcd_init(GPIO_NR_TREO_BL_POWER, &palm_320x320_new_lcd_mode);
palm27x_udc_init(GPIO_NR_TREO_USB_DETECT, GPIO_NR_TREO_USB_PULLUP, 1);
palm27x_irda_init(GPIO_NR_TREO_IR_EN);
palm27x_ac97_init(-1, -1, -1, 95);
palm27x_pwm_init(GPIO_NR_TREO_BL_POWER, -1);
palm27x_power_init(GPIO_NR_TREO_POWER_DETECT, -1);
palm27x_pmic_init();
palmtreo_kpc_init();
palmtreo_uhc_init();
palmtreo_leds_init();
}
#ifdef CONFIG_MACH_TREO680
void __init treo680_gpio_init(void)
{
unsigned int gpio;
/* drive all three lcd gpios high initially */
const unsigned long lcd_flags = GPIOF_INIT_HIGH | GPIOF_DIR_OUT;
/*
* LCD GPIO initialization...
*/
/*
* This is likely the power to the lcd. Toggling it low/high appears to
* turn the lcd off/on. Can be toggled after lcd is initialized without
* any apparent adverse effects to the lcd operation. Note that this
* gpio line is used by the lcd controller as the L_BIAS signal, but
* treo680 configures it as gpio.
*/
gpio = GPIO_NR_TREO680_LCD_POWER;
if (gpio_request_one(gpio, lcd_flags, "LCD power") < 0)
goto fail;
/*
* These two are called "enables", for lack of a better understanding.
* If either of these are toggled after the lcd is initialized, the
* image becomes degraded. N.B. The IPL shipped with the treo
* configures GPIO_NR_TREO680_LCD_EN_N as output and drives it high. If
* the IPL is ever reprogrammed, this initialization may be need to be
* revisited.
*/
gpio = GPIO_NR_TREO680_LCD_EN;
if (gpio_request_one(gpio, lcd_flags, "LCD enable") < 0)
goto fail;
gpio = GPIO_NR_TREO680_LCD_EN_N;
if (gpio_request_one(gpio, lcd_flags, "LCD enable_n") < 0)
goto fail;
/* driving this low turns LCD on */
gpio_set_value(GPIO_NR_TREO680_LCD_EN_N, 0);
return;
fail:
pr_err("gpio %d initialization failed\n", gpio);
gpio_free(GPIO_NR_TREO680_LCD_POWER);
gpio_free(GPIO_NR_TREO680_LCD_EN);
gpio_free(GPIO_NR_TREO680_LCD_EN_N);
}
static struct gpiod_lookup_table treo680_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_TREO_SD_DETECT_N,
"cd", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_TREO680_SD_READONLY,
"wp", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_TREO680_SD_POWER,
"power", GPIO_ACTIVE_HIGH),
{ },
},
};
static void __init treo680_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
palmphone_common_init();
treo680_gpio_init();
palm27x_mmc_init(&treo680_mci_gpio_table);
}
#endif
#ifdef CONFIG_MACH_CENTRO
static struct gpiod_lookup_table centro685_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_TREO_SD_DETECT_N,
"cd", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_CENTRO_SD_POWER,
"power", GPIO_ACTIVE_LOW),
{ },
},
};
static void __init centro_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config));
palmphone_common_init();
palm27x_mmc_init(&centro685_mci_gpio_table);
}
#endif
#ifdef CONFIG_MACH_TREO680
MACHINE_START(TREO680, "Palm Treo 680")
.atag_offset = 0x100,
.map_io = pxa27x_map_io,
.reserve = treo_reserve,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = treo680_init,
.restart = pxa_restart,
MACHINE_END
#endif
#ifdef CONFIG_MACH_CENTRO
MACHINE_START(CENTRO, "Palm Centro 685")
.atag_offset = 0x100,
.map_io = pxa27x_map_io,
.reserve = treo_reserve,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = centro_init,
.restart = pxa_restart,
MACHINE_END
#endif

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arch/arm/mach-pxa/palmtreo.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* GPIOs and interrupts for Palm Treo smartphones
*
* currently supported:
* Palm Treo 680 (GSM)
* Palm Centro 685 (GSM)
*
* Author: Tomas Cech <sleep_walker@suse.cz>
*
* find more info at www.hackndev.com
*/
#ifndef _INCLUDE_TREO_H_
#define _INCLUDE_TREO_H_
/* GPIOs */
#define GPIO_NR_TREO_POWER_DETECT 0
#define GPIO_NR_TREO_AMP_EN 27
#define GPIO_NR_TREO_GREEN_LED 20
#define GPIO_NR_TREO_RED_LED 79
#define GPIO_NR_TREO_SD_DETECT_N 113
#define GPIO_NR_TREO_EP_DETECT_N 116
#define GPIO_NR_TREO_USB_DETECT 1
#define GPIO_NR_TREO_USB_PULLUP 114
#define GPIO_NR_TREO_GSM_POWER 40
#define GPIO_NR_TREO_GSM_RESET 87
#define GPIO_NR_TREO_GSM_WAKE 57
#define GPIO_NR_TREO_GSM_HOST_WAKE 14
#define GPIO_NR_TREO_GSM_TRIGGER 10
#define GPIO_NR_TREO_IR_EN 115
#define GPIO_NR_TREO_IR_TXD 47
#define GPIO_NR_TREO_BL_POWER 38
#define GPIO_NR_TREO_LCD_POWER 25
/* Treo680 specific GPIOs */
#define GPIO_NR_TREO680_SD_READONLY 33
#define GPIO_NR_TREO680_SD_POWER 42
#define GPIO_NR_TREO680_VIBRATE_EN 44
#define GPIO_NR_TREO680_KEYB_BL 24
#define GPIO_NR_TREO680_BT_EN 43
#define GPIO_NR_TREO680_LCD_POWER 77
#define GPIO_NR_TREO680_LCD_EN 86
#define GPIO_NR_TREO680_LCD_EN_N 25
/* Centro685 specific GPIOs */
#define GPIO_NR_CENTRO_SD_POWER 21
#define GPIO_NR_CENTRO_VIBRATE_EN 22
#define GPIO_NR_CENTRO_KEYB_BL 33
#define GPIO_NR_CENTRO_BT_EN 80
/* Various addresses */
#define TREO_PHYS_RAM_START 0xa0000000
#define TREO_PHYS_IO_START 0x40000000
#define TREO_STR_BASE 0xa2000000
/* BACKLIGHT */
#define TREO_MAX_INTENSITY 254
#define TREO_DEFAULT_INTENSITY 160
#define TREO_LIMIT_MASK 0x7F
#define TREO_PRESCALER 63
#define TREO_PERIOD_NS 3500
#endif

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arch/arm/mach-pxa/palmtx-pcmcia.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/drivers/pcmcia/pxa2xx_palmtx.c
*
* Driver for Palm T|X PCMCIA
*
* Copyright (C) 2007-2011 Marek Vasut <marek.vasut@gmail.com>
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include "palmtx.h"
#include <pcmcia/soc_common.h>
static struct gpio palmtx_pcmcia_gpios[] = {
{ GPIO_NR_PALMTX_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" },
{ GPIO_NR_PALMTX_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" },
{ GPIO_NR_PALMTX_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" },
};
static int palmtx_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
{
int ret;
ret = gpio_request_array(palmtx_pcmcia_gpios,
ARRAY_SIZE(palmtx_pcmcia_gpios));
skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTX_PCMCIA_READY;
skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready";
return ret;
}
static void palmtx_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
{
gpio_free_array(palmtx_pcmcia_gpios, ARRAY_SIZE(palmtx_pcmcia_gpios));
}
static void palmtx_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
struct pcmcia_state *state)
{
state->detect = 1; /* always inserted */
state->vs_3v = 1;
state->vs_Xv = 0;
}
static int
palmtx_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
const socket_state_t *state)
{
gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER1, 1);
gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER2, 1);
gpio_set_value(GPIO_NR_PALMTX_PCMCIA_RESET,
!!(state->flags & SS_RESET));
return 0;
}
static struct pcmcia_low_level palmtx_pcmcia_ops = {
.owner = THIS_MODULE,
.first = 0,
.nr = 1,
.hw_init = palmtx_pcmcia_hw_init,
.hw_shutdown = palmtx_pcmcia_hw_shutdown,
.socket_state = palmtx_pcmcia_socket_state,
.configure_socket = palmtx_pcmcia_configure_socket,
};
static struct platform_device *palmtx_pcmcia_device;
static int __init palmtx_pcmcia_init(void)
{
int ret;
if (!machine_is_palmtx())
return -ENODEV;
palmtx_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
if (!palmtx_pcmcia_device)
return -ENOMEM;
ret = platform_device_add_data(palmtx_pcmcia_device, &palmtx_pcmcia_ops,
sizeof(palmtx_pcmcia_ops));
if (!ret)
ret = platform_device_add(palmtx_pcmcia_device);
if (ret)
platform_device_put(palmtx_pcmcia_device);
return ret;
}
static void __exit palmtx_pcmcia_exit(void)
{
platform_device_unregister(palmtx_pcmcia_device);
}
module_init(palmtx_pcmcia_init);
module_exit(palmtx_pcmcia_exit);
MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
MODULE_DESCRIPTION("PCMCIA support for Palm T|X");
MODULE_ALIAS("platform:pxa2xx-pcmcia");
MODULE_LICENSE("GPL");

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arch/arm/mach-pxa/palmtx.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Hardware definitions for PalmTX
*
* Author: Marek Vasut <marek.vasut@gmail.com>
*
* Based on work of:
* Alex Osborne <ato@meshy.org>
* Cristiano P. <cristianop@users.sourceforge.net>
* Jan Herman <2hp@seznam.cz>
* Michal Hrusecky
*
* (find more info at www.hackndev.com)
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/pda_power.h>
#include <linux/pwm_backlight.h>
#include <linux/gpio.h>
#include <linux/wm97xx.h>
#include <linux/power_supply.h>
#include <linux/mtd/platnand.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/physmap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "pxa27x.h"
#include <linux/platform_data/asoc-pxa.h>
#include "palmtx.h"
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/irda-pxaficp.h>
#include <linux/platform_data/keypad-pxa27x.h>
#include "udc.h"
#include <linux/platform_data/asoc-palm27x.h>
#include "palm27x.h"
#include "generic.h"
#include "devices.h"
/******************************************************************************
* Pin configuration
******************************************************************************/
static unsigned long palmtx_pin_config[] __initdata = {
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO14_GPIO, /* SD detect */
GPIO114_GPIO, /* SD power */
GPIO115_GPIO, /* SD r/o switch */
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO89_AC97_SYSCLK,
GPIO95_AC97_nRESET,
/* IrDA */
GPIO40_GPIO, /* ir disable */
GPIO46_FICP_RXD,
GPIO47_FICP_TXD,
/* PWM */
GPIO16_PWM0_OUT,
/* USB */
GPIO13_GPIO, /* usb detect */
GPIO93_GPIO, /* usb power */
/* PCMCIA */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO85_nPCE_1,
GPIO54_nPCE_2,
GPIO79_PSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
GPIO94_GPIO, /* wifi power 1 */
GPIO108_GPIO, /* wifi power 2 */
GPIO116_GPIO, /* wifi ready */
/* MATRIX KEYPAD */
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
GPIO103_KP_MKOUT_0,
GPIO104_KP_MKOUT_1,
GPIO105_KP_MKOUT_2,
/* LCD */
GPIOxx_LCD_TFT_16BPP,
/* FFUART */
GPIO34_FFUART_RXD,
GPIO39_FFUART_TXD,
/* NAND */
GPIO15_nCS_1,
GPIO18_RDY,
/* MISC. */
GPIO10_GPIO, /* hotsync button */
GPIO12_GPIO, /* power detect */
GPIO107_GPIO, /* earphone detect */
};
/******************************************************************************
* NOR Flash
******************************************************************************/
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct mtd_partition palmtx_partitions[] = {
{
.name = "Flash",
.offset = 0x00000000,
.size = MTDPART_SIZ_FULL,
.mask_flags = 0
}
};
static struct physmap_flash_data palmtx_flash_data[] = {
{
.width = 2, /* bankwidth in bytes */
.parts = palmtx_partitions,
.nr_parts = ARRAY_SIZE(palmtx_partitions)
}
};
static struct resource palmtx_flash_resource = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_8M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device palmtx_flash = {
.name = "physmap-flash",
.id = 0,
.resource = &palmtx_flash_resource,
.num_resources = 1,
.dev = {
.platform_data = palmtx_flash_data,
},
};
static void __init palmtx_nor_init(void)
{
platform_device_register(&palmtx_flash);
}
#else
static inline void palmtx_nor_init(void) {}
#endif
/******************************************************************************
* GPIO keyboard
******************************************************************************/
#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
static const unsigned int palmtx_matrix_keys[] = {
KEY(0, 0, KEY_POWER),
KEY(0, 1, KEY_F1),
KEY(0, 2, KEY_ENTER),
KEY(1, 0, KEY_F2),
KEY(1, 1, KEY_F3),
KEY(1, 2, KEY_F4),
KEY(2, 0, KEY_UP),
KEY(2, 2, KEY_DOWN),
KEY(3, 0, KEY_RIGHT),
KEY(3, 2, KEY_LEFT),
};
static struct matrix_keymap_data palmtx_matrix_keymap_data = {
.keymap = palmtx_matrix_keys,
.keymap_size = ARRAY_SIZE(palmtx_matrix_keys),
};
static struct pxa27x_keypad_platform_data palmtx_keypad_platform_data = {
.matrix_key_rows = 4,
.matrix_key_cols = 3,
.matrix_keymap_data = &palmtx_matrix_keymap_data,
.debounce_interval = 30,
};
static void __init palmtx_kpc_init(void)
{
pxa_set_keypad_info(&palmtx_keypad_platform_data);
}
#else
static inline void palmtx_kpc_init(void) {}
#endif
/******************************************************************************
* GPIO keys
******************************************************************************/
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
static struct gpio_keys_button palmtx_pxa_buttons[] = {
{KEY_F8, GPIO_NR_PALMTX_HOTSYNC_BUTTON_N, 1, "HotSync Button" },
};
static struct gpio_keys_platform_data palmtx_pxa_keys_data = {
.buttons = palmtx_pxa_buttons,
.nbuttons = ARRAY_SIZE(palmtx_pxa_buttons),
};
static struct platform_device palmtx_pxa_keys = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &palmtx_pxa_keys_data,
},
};
static void __init palmtx_keys_init(void)
{
platform_device_register(&palmtx_pxa_keys);
}
#else
static inline void palmtx_keys_init(void) {}
#endif
/******************************************************************************
* NAND Flash
******************************************************************************/
#if defined(CONFIG_MTD_NAND_PLATFORM) || \
defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
static void palmtx_nand_cmd_ctl(struct nand_chip *this, int cmd,
unsigned int ctrl)
{
char __iomem *nandaddr = this->legacy.IO_ADDR_W;
if (cmd == NAND_CMD_NONE)
return;
if (ctrl & NAND_CLE)
writeb(cmd, PALMTX_NAND_CLE_VIRT);
else if (ctrl & NAND_ALE)
writeb(cmd, PALMTX_NAND_ALE_VIRT);
else
writeb(cmd, nandaddr);
}
static struct mtd_partition palmtx_partition_info[] = {
[0] = {
.name = "palmtx-0",
.offset = 0,
.size = MTDPART_SIZ_FULL
},
};
struct platform_nand_data palmtx_nand_platdata = {
.chip = {
.nr_chips = 1,
.chip_offset = 0,
.nr_partitions = ARRAY_SIZE(palmtx_partition_info),
.partitions = palmtx_partition_info,
.chip_delay = 20,
},
.ctrl = {
.cmd_ctrl = palmtx_nand_cmd_ctl,
},
};
static struct resource palmtx_nand_resource[] = {
[0] = {
.start = PXA_CS1_PHYS,
.end = PXA_CS1_PHYS + SZ_1M - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device palmtx_nand = {
.name = "gen_nand",
.num_resources = ARRAY_SIZE(palmtx_nand_resource),
.resource = palmtx_nand_resource,
.id = -1,
.dev = {
.platform_data = &palmtx_nand_platdata,
}
};
static void __init palmtx_nand_init(void)
{
platform_device_register(&palmtx_nand);
}
#else
static inline void palmtx_nand_init(void) {}
#endif
/******************************************************************************
* Machine init
******************************************************************************/
static struct map_desc palmtx_io_desc[] __initdata = {
{
.virtual = (unsigned long)PALMTX_PCMCIA_VIRT,
.pfn = __phys_to_pfn(PALMTX_PCMCIA_PHYS),
.length = PALMTX_PCMCIA_SIZE,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)PALMTX_NAND_ALE_VIRT,
.pfn = __phys_to_pfn(PALMTX_NAND_ALE_PHYS),
.length = SZ_1M,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)PALMTX_NAND_CLE_VIRT,
.pfn = __phys_to_pfn(PALMTX_NAND_CLE_PHYS),
.length = SZ_1M,
.type = MT_DEVICE,
}
};
static void __init palmtx_map_io(void)
{
pxa27x_map_io();
iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc));
}
static struct gpiod_lookup_table palmtx_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTX_SD_DETECT_N,
"cd", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTX_SD_READONLY,
"wp", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMTX_SD_POWER,
"power", GPIO_ACTIVE_HIGH),
{ },
},
};
static struct gpiod_lookup_table palmtx_wm97xx_touch_gpio_table = {
.dev_id = "wm97xx-touch",
.table = {
GPIO_LOOKUP("gpio-pxa", 27, "touch", GPIO_ACTIVE_HIGH),
{ },
},
};
static void __init palmtx_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
palm27x_mmc_init(&palmtx_mci_gpio_table);
gpiod_add_lookup_table(&palmtx_wm97xx_touch_gpio_table);
palm27x_pm_init(PALMTX_STR_BASE);
palm27x_lcd_init(-1, &palm_320x480_lcd_mode);
palm27x_udc_init(GPIO_NR_PALMTX_USB_DETECT_N,
GPIO_NR_PALMTX_USB_PULLUP, 1);
palm27x_irda_init(GPIO_NR_PALMTX_IR_DISABLE);
palm27x_ac97_init(PALMTX_BAT_MIN_VOLTAGE, PALMTX_BAT_MAX_VOLTAGE,
GPIO_NR_PALMTX_EARPHONE_DETECT, 95);
palm27x_pwm_init(GPIO_NR_PALMTX_BL_POWER, GPIO_NR_PALMTX_LCD_POWER);
palm27x_power_init(GPIO_NR_PALMTX_POWER_DETECT, -1);
palm27x_pmic_init();
palmtx_kpc_init();
palmtx_keys_init();
palmtx_nor_init();
palmtx_nand_init();
}
MACHINE_START(PALMTX, "Palm T|X")
.atag_offset = 0x100,
.map_io = palmtx_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = palmtx_init,
.restart = pxa_restart,
MACHINE_END

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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* GPIOs and interrupts for Palm T|X Handheld Computer
*
* Based on palmld-gpio.h by Alex Osborne
*
* Authors: Marek Vasut <marek.vasut@gmail.com>
* Cristiano P. <cristianop@users.sourceforge.net>
* Jan Herman <2hp@seznam.cz>
*/
#ifndef _INCLUDE_PALMTX_H_
#define _INCLUDE_PALMTX_H_
#include "irqs.h" /* PXA_GPIO_TO_IRQ */
/** HERE ARE GPIOs **/
/* GPIOs */
#define GPIO_NR_PALMTX_GPIO_RESET 1
#define GPIO_NR_PALMTX_POWER_DETECT 12 /* 90 */
#define GPIO_NR_PALMTX_HOTSYNC_BUTTON_N 10
#define GPIO_NR_PALMTX_EARPHONE_DETECT 107
/* SD/MMC */
#define GPIO_NR_PALMTX_SD_DETECT_N 14
#define GPIO_NR_PALMTX_SD_POWER 114 /* probably */
#define GPIO_NR_PALMTX_SD_READONLY 115 /* probably */
/* TOUCHSCREEN */
#define GPIO_NR_PALMTX_WM9712_IRQ 27
/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
#define GPIO_NR_PALMTX_IR_DISABLE 40
/* USB */
#define GPIO_NR_PALMTX_USB_DETECT_N 13
#define GPIO_NR_PALMTX_USB_PULLUP 93
/* LCD/BACKLIGHT */
#define GPIO_NR_PALMTX_BL_POWER 84
#define GPIO_NR_PALMTX_LCD_POWER 96
/* LCD BORDER */
#define GPIO_NR_PALMTX_BORDER_SWITCH 98
#define GPIO_NR_PALMTX_BORDER_SELECT 22
/* BLUETOOTH */
#define GPIO_NR_PALMTX_BT_POWER 17
#define GPIO_NR_PALMTX_BT_RESET 83
/* PCMCIA (WiFi) */
#define GPIO_NR_PALMTX_PCMCIA_POWER1 94
#define GPIO_NR_PALMTX_PCMCIA_POWER2 108
#define GPIO_NR_PALMTX_PCMCIA_RESET 79
#define GPIO_NR_PALMTX_PCMCIA_READY 116
/* NAND Flash ... this GPIO may be incorrect! */
#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79
/* INTERRUPTS */
#define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N)
#define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ)
#define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT)
#define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET)
/** HERE ARE INIT VALUES **/
/* Various addresses */
#define PALMTX_PCMCIA_PHYS 0x28000000
#define PALMTX_PCMCIA_VIRT IOMEM(0xf0000000)
#define PALMTX_PCMCIA_SIZE 0x100000
#define PALMTX_PHYS_RAM_START 0xa0000000
#define PALMTX_PHYS_IO_START 0x40000000
#define PALMTX_STR_BASE 0xa0200000
#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */
#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */
#define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24))
#define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25))
#define PALMTX_NAND_ALE_VIRT IOMEM(0xff100000)
#define PALMTX_NAND_CLE_VIRT IOMEM(0xff200000)
/* TOUCHSCREEN */
#define AC97_LINK_FRAME 21
/* BATTERY */
#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
#define PALMTX_BAT_MAX_CURRENT 0 /* unknown */
#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */
#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */
#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */
#define PALMTX_MAX_LIFE_MINS 360 /* on-life in minutes */
#define PALMTX_BAT_MEASURE_DELAY (HZ * 1)
/* BACKLIGHT */
#define PALMTX_MAX_INTENSITY 0xFE
#define PALMTX_DEFAULT_INTENSITY 0x7E
#define PALMTX_LIMIT_MASK 0x7F
#define PALMTX_PRESCALER 0x3F
#define PALMTX_PERIOD_NS 3500
#endif

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arch/arm/mach-pxa/palmz72.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Hardware definitions for Palm Zire72
*
* Authors:
* Vladimir "Farcaller" Pouzanov <farcaller@gmail.com>
* Sergey Lapin <slapin@ossfans.org>
* Alex Osborne <bobofdoom@gmail.com>
* Jan Herman <2hp@seznam.cz>
*
* Rewrite for mainline:
* Marek Vasut <marek.vasut@gmail.com>
*
* (find more info at www.hackndev.com)
*/
#include <linux/platform_device.h>
#include <linux/syscore_ops.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/pda_power.h>
#include <linux/pwm_backlight.h>
#include <linux/gpio.h>
#include <linux/wm97xx.h>
#include <linux/power_supply.h>
#include <linux/platform_data/i2c-gpio.h>
#include <linux/gpio/machine.h>
#include <asm/mach-types.h>
#include <asm/suspend.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "pxa27x.h"
#include <linux/platform_data/asoc-pxa.h>
#include "palmz72.h"
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/irda-pxaficp.h>
#include <linux/platform_data/keypad-pxa27x.h>
#include "udc.h"
#include <linux/platform_data/asoc-palm27x.h>
#include "palm27x.h"
#include "pm.h"
#include <linux/platform_data/media/camera-pxa.h>
#include "generic.h"
#include "devices.h"
/******************************************************************************
* Pin configuration
******************************************************************************/
static unsigned long palmz72_pin_config[] __initdata = {
/* MMC */
GPIO32_MMC_CLK,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
GPIO112_MMC_CMD,
GPIO14_GPIO, /* SD detect */
GPIO115_GPIO, /* SD RO */
GPIO98_GPIO, /* SD power */
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO89_AC97_SYSCLK,
GPIO113_AC97_nRESET,
/* IrDA */
GPIO49_GPIO, /* ir disable */
GPIO46_FICP_RXD,
GPIO47_FICP_TXD,
/* PWM */
GPIO16_PWM0_OUT,
/* USB */
GPIO15_GPIO, /* usb detect */
GPIO95_GPIO, /* usb pullup */
/* Matrix keypad */
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
GPIO103_KP_MKOUT_0,
GPIO104_KP_MKOUT_1,
GPIO105_KP_MKOUT_2,
/* LCD */
GPIOxx_LCD_TFT_16BPP,
GPIO20_GPIO, /* bl power */
GPIO21_GPIO, /* LCD border switch */
GPIO22_GPIO, /* LCD border color */
GPIO96_GPIO, /* lcd power */
/* PXA Camera */
GPIO81_CIF_DD_0,
GPIO48_CIF_DD_5,
GPIO50_CIF_DD_3,
GPIO51_CIF_DD_2,
GPIO52_CIF_DD_4,
GPIO53_CIF_MCLK,
GPIO54_CIF_PCLK,
GPIO55_CIF_DD_1,
GPIO84_CIF_FV,
GPIO85_CIF_LV,
GPIO93_CIF_DD_6,
GPIO108_CIF_DD_7,
GPIO56_GPIO, /* OV9640 Powerdown */
GPIO57_GPIO, /* OV9640 Reset */
GPIO91_GPIO, /* OV9640 Power */
/* I2C */
GPIO117_GPIO, /* I2C_SCL */
GPIO118_GPIO, /* I2C_SDA */
/* Misc. */
GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */
GPIO88_GPIO, /* green led */
GPIO27_GPIO, /* WM9712 IRQ */
};
/******************************************************************************
* GPIO keyboard
******************************************************************************/
#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
static const unsigned int palmz72_matrix_keys[] = {
KEY(0, 0, KEY_POWER),
KEY(0, 1, KEY_F1),
KEY(0, 2, KEY_ENTER),
KEY(1, 0, KEY_F2),
KEY(1, 1, KEY_F3),
KEY(1, 2, KEY_F4),
KEY(2, 0, KEY_UP),
KEY(2, 2, KEY_DOWN),
KEY(3, 0, KEY_RIGHT),
KEY(3, 2, KEY_LEFT),
};
static struct matrix_keymap_data almz72_matrix_keymap_data = {
.keymap = palmz72_matrix_keys,
.keymap_size = ARRAY_SIZE(palmz72_matrix_keys),
};
static struct pxa27x_keypad_platform_data palmz72_keypad_platform_data = {
.matrix_key_rows = 4,
.matrix_key_cols = 3,
.matrix_keymap_data = &almz72_matrix_keymap_data,
.debounce_interval = 30,
};
static void __init palmz72_kpc_init(void)
{
pxa_set_keypad_info(&palmz72_keypad_platform_data);
}
#else
static inline void palmz72_kpc_init(void) {}
#endif
/******************************************************************************
* LEDs
******************************************************************************/
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
static struct gpio_led gpio_leds[] = {
{
.name = "palmz72:green:led",
.default_trigger = "none",
.gpio = GPIO_NR_PALMZ72_LED_GREEN,
},
};
static struct gpio_led_platform_data gpio_led_info = {
.leds = gpio_leds,
.num_leds = ARRAY_SIZE(gpio_leds),
};
static struct platform_device palmz72_leds = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &gpio_led_info,
}
};
static void __init palmz72_leds_init(void)
{
platform_device_register(&palmz72_leds);
}
#else
static inline void palmz72_leds_init(void) {}
#endif
#ifdef CONFIG_PM
/* We have some black magic here
* PalmOS ROM on recover expects special struct physical address
* to be transferred via PSPR. Using this struct PalmOS restores
* its state after sleep. As for Linux, we need to setup it the
* same way. More than that, PalmOS ROM changes some values in memory.
* For now only one location is found, which needs special treatment.
* Thanks to Alex Osborne, Andrzej Zaborowski, and lots of other people
* for reading backtraces for me :)
*/
#define PALMZ72_SAVE_DWORD ((unsigned long *)0xc0000050)
static struct palmz72_resume_info palmz72_resume_info = {
.magic0 = 0xb4e6,
.magic1 = 1,
/* reset state, MMU off etc */
.arm_control = 0,
.aux_control = 0,
.ttb = 0,
.domain_access = 0,
.process_id = 0,
};
static unsigned long store_ptr;
/* syscore_ops for Palm Zire 72 PM */
static int palmz72_pm_suspend(void)
{
/* setup the resume_info struct for the original bootloader */
palmz72_resume_info.resume_addr = (u32) cpu_resume;
/* Storing memory touched by ROM */
store_ptr = *PALMZ72_SAVE_DWORD;
/* Setting PSPR to a proper value */
PSPR = __pa_symbol(&palmz72_resume_info);
return 0;
}
static void palmz72_pm_resume(void)
{
*PALMZ72_SAVE_DWORD = store_ptr;
}
static struct syscore_ops palmz72_pm_syscore_ops = {
.suspend = palmz72_pm_suspend,
.resume = palmz72_pm_resume,
};
static int __init palmz72_pm_init(void)
{
if (machine_is_palmz72()) {
register_syscore_ops(&palmz72_pm_syscore_ops);
return 0;
}
return -ENODEV;
}
device_initcall(palmz72_pm_init);
#endif
static struct gpiod_lookup_table palmz72_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMZ72_SD_DETECT_N,
"cd", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMZ72_SD_RO,
"wp", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", GPIO_NR_PALMZ72_SD_POWER_N,
"power", GPIO_ACTIVE_LOW),
{ },
},
};
/******************************************************************************
* Machine init
******************************************************************************/
static void __init palmz72_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
palm27x_mmc_init(&palmz72_mci_gpio_table);
palm27x_lcd_init(-1, &palm_320x320_lcd_mode);
palm27x_udc_init(GPIO_NR_PALMZ72_USB_DETECT_N,
GPIO_NR_PALMZ72_USB_PULLUP, 0);
palm27x_irda_init(GPIO_NR_PALMZ72_IR_DISABLE);
palm27x_ac97_init(PALMZ72_BAT_MIN_VOLTAGE, PALMZ72_BAT_MAX_VOLTAGE,
-1, 113);
palm27x_pwm_init(-1, -1);
palm27x_power_init(-1, -1);
palm27x_pmic_init();
palmz72_kpc_init();
palmz72_leds_init();
}
MACHINE_START(PALMZ72, "Palm Zire72")
.atag_offset = 0x100,
.map_io = pxa27x_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = palmz72_init,
.restart = pxa_restart,
MACHINE_END

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arch/arm/mach-pxa/palmz72.h
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* GPIOs and interrupts for Palm Zire72 Handheld Computer
*
* Authors: Alex Osborne <bobofdoom@gmail.com>
* Jan Herman <2hp@seznam.cz>
* Sergey Lapin <slapin@ossfans.org>
*/
#ifndef _INCLUDE_PALMZ72_H_
#define _INCLUDE_PALMZ72_H_
/* Power and control */
#define GPIO_NR_PALMZ72_GPIO_RESET 1
#define GPIO_NR_PALMZ72_POWER_DETECT 0
/* SD/MMC */
#define GPIO_NR_PALMZ72_SD_DETECT_N 14
#define GPIO_NR_PALMZ72_SD_POWER_N 98
#define GPIO_NR_PALMZ72_SD_RO 115
/* Touchscreen */
#define GPIO_NR_PALMZ72_WM9712_IRQ 27
/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
#define GPIO_NR_PALMZ72_IR_DISABLE 49
/* USB */
#define GPIO_NR_PALMZ72_USB_DETECT_N 15
#define GPIO_NR_PALMZ72_USB_PULLUP 95
/* LCD/Backlight */
#define GPIO_NR_PALMZ72_BL_POWER 20
#define GPIO_NR_PALMZ72_LCD_POWER 96
/* LED */
#define GPIO_NR_PALMZ72_LED_GREEN 88
/* Bluetooth */
#define GPIO_NR_PALMZ72_BT_POWER 17
#define GPIO_NR_PALMZ72_BT_RESET 83
/* Camera */
#define GPIO_NR_PALMZ72_CAM_PWDN 56
#define GPIO_NR_PALMZ72_CAM_RESET 57
#define GPIO_NR_PALMZ72_CAM_POWER 91
/** Initial values **/
/* Battery */
#define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
#define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
#define PALMZ72_BAT_MAX_CURRENT 0 /* unknown */
#define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */
#define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */
#define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */
#define PALMZ72_MAX_LIFE_MINS 360 /* on-life in minutes */
/* Backlight */
#define PALMZ72_MAX_INTENSITY 0xFE
#define PALMZ72_DEFAULT_INTENSITY 0x7E
#define PALMZ72_LIMIT_MASK 0x7F
#define PALMZ72_PRESCALER 0x3F
#define PALMZ72_PERIOD_NS 3500
#ifdef CONFIG_PM
struct palmz72_resume_info {
u32 magic0; /* 0x0 */
u32 magic1; /* 0x4 */
u32 resume_addr; /* 0x8 */
u32 pad[11]; /* 0xc..0x37 */
u32 arm_control; /* 0x38 */
u32 aux_control; /* 0x3c */
u32 ttb; /* 0x40 */
u32 domain_access; /* 0x44 */
u32 process_id; /* 0x48 */
};
#endif
#endif

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arch/arm/mach-pxa/pcm027.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/pcm027.c
* Support for the Phytec phyCORE-PXA270 CPU card (aka PCM-027).
*
* Refer
* http://www.phytec.com/products/sbc/ARM-XScale/phyCORE-XScale-PXA270.html
* for additional hardware info
*
* Author: Juergen Kilb
* Created: April 05, 2005
* Copyright: Phytec Messtechnik GmbH
* e-Mail: armlinux@phytec.de
*
* based on Intel Mainstone Board
*
* Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
*/
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/spi/max7301.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/leds.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "pxa27x.h"
#include "pcm027.h"
#include "generic.h"
/*
* ABSTRACT:
*
* The PXA270 processor comes with a bunch of hardware on its silicon.
* Not all of this hardware can be used at the same time and not all
* is routed to module's connectors. Also it depends on the baseboard, what
* kind of hardware can be used in which way.
* -> So this file supports the main devices on the CPU card only!
* Refer pcm990-baseboard.c how to extend this features to get a full
* blown system with many common interfaces.
*
* The PCM-027 supports the following interfaces through its connectors and
* will be used in pcm990-baseboard.c:
*
* - LCD support
* - MMC support
* - IDE/CF card
* - FFUART
* - BTUART
* - IRUART
* - AC97
* - SSP
* - SSP3
*
* Claimed GPIOs:
* GPIO0 -> IRQ input from RTC
* GPIO2 -> SYS_ENA*)
* GPIO3 -> PWR_SCL
* GPIO4 -> PWR_SDA
* GPIO5 -> PowerCap0*)
* GPIO6 -> PowerCap1*)
* GPIO7 -> PowerCap2*)
* GPIO8 -> PowerCap3*)
* GPIO15 -> /CS1
* GPIO20 -> /CS2
* GPIO21 -> /CS3
* GPIO33 -> /CS5 network controller select
* GPIO52 -> IRQ from network controller
* GPIO78 -> /CS2
* GPIO80 -> /CS4
* GPIO90 -> LED0
* GPIO91 -> LED1
* GPIO114 -> IRQ from CAN controller
* GPIO117 -> SCL
* GPIO118 -> SDA
*
* *) CPU internal use only
*/
static unsigned long pcm027_pin_config[] __initdata = {
/* Chip Selects */
GPIO20_nSDCS_2,
GPIO21_nSDCS_3,
GPIO15_nCS_1,
GPIO78_nCS_2,
GPIO80_nCS_4,
GPIO33_nCS_5, /* Ethernet */
/* I2C */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
/* GPIO */
GPIO52_GPIO, /* IRQ from network controller */
#ifdef CONFIG_LEDS_GPIO
GPIO90_GPIO, /* PCM027_LED_CPU */
GPIO91_GPIO, /* PCM027_LED_HEART_BEAT */
#endif
GPIO114_GPIO, /* IRQ from CAN controller */
};
/*
* SMC91x network controller specific stuff
*/
static struct resource smc91x_resources[] = {
[0] = {
.start = PCM027_ETH_PHYS + 0x300,
.end = PCM027_ETH_PHYS + PCM027_ETH_SIZE,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PCM027_ETH_IRQ,
.end = PCM027_ETH_IRQ,
/* note: smc91x's driver doesn't use the trigger bits yet */
.flags = IORESOURCE_IRQ | PCM027_ETH_IRQ_EDGE,
}
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
};
/*
* SPI host and devices
*/
static struct pxa2xx_spi_controller pxa_ssp_master_info = {
.num_chipselect = 1,
};
static struct max7301_platform_data max7301_info = {
.base = -1,
};
/* bus_num must match id in pxa2xx_set_spi_info() call */
static struct spi_board_info spi_board_info[] __initdata = {
{
.modalias = "max7301",
.platform_data = &max7301_info,
.max_speed_hz = 13000000,
.bus_num = 1,
.chip_select = 0,
.mode = SPI_MODE_0,
},
};
/*
* NOR flash
*/
static struct physmap_flash_data pcm027_flash_data = {
.width = 4,
};
static struct resource pcm027_flash_resource = {
.start = PCM027_FLASH_PHYS,
.end = PCM027_FLASH_PHYS + PCM027_FLASH_SIZE - 1 ,
.flags = IORESOURCE_MEM,
};
static struct platform_device pcm027_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &pcm027_flash_data,
},
.resource = &pcm027_flash_resource,
.num_resources = 1,
};
#ifdef CONFIG_LEDS_GPIO
static struct gpio_led pcm027_led[] = {
{
.name = "led0:red", /* FIXME */
.gpio = PCM027_LED_CPU
},
{
.name = "led1:green", /* FIXME */
.gpio = PCM027_LED_HEARD_BEAT
},
};
static struct gpio_led_platform_data pcm027_led_data = {
.num_leds = ARRAY_SIZE(pcm027_led),
.leds = pcm027_led
};
static struct platform_device pcm027_led_dev = {
.name = "leds-gpio",
.id = 0,
.dev = {
.platform_data = &pcm027_led_data,
},
};
#endif /* CONFIG_LEDS_GPIO */
/*
* declare the available device resources on this board
*/
static struct platform_device *devices[] __initdata = {
&smc91x_device,
&pcm027_flash,
#ifdef CONFIG_LEDS_GPIO
&pcm027_led_dev
#endif
};
/*
* pcm027_init - breath some life into the board
*/
static void __init pcm027_init(void)
{
/* system bus arbiter setting
* - Core_Park
* - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
*/
ARB_CNTRL = ARB_CORE_PARK | 0x234;
pxa2xx_mfp_config(pcm027_pin_config, ARRAY_SIZE(pcm027_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_add_devices(devices, ARRAY_SIZE(devices));
/* at last call the baseboard to initialize itself */
#ifdef CONFIG_MACH_PCM990_BASEBOARD
pcm990_baseboard_init();
#endif
pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
}
static void __init pcm027_map_io(void)
{
pxa27x_map_io();
/* initialize sleep mode regs (wake-up sources, etc) */
PGSR0 = 0x01308000;
PGSR1 = 0x00CF0002;
PGSR2 = 0x0E294000;
PGSR3 = 0x0000C000;
PWER = 0x40000000 | PWER_GPIO0 | PWER_GPIO1;
PRER = 0x00000000;
PFER = 0x00000003;
}
MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270")
/* Maintainer: Pengutronix */
.atag_offset = 0x100,
.map_io = pcm027_map_io,
.nr_irqs = PCM027_NR_IRQS,
.init_irq = pxa27x_init_irq,
.handle_irq = pxa27x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = pcm027_init,
.restart = pxa_restart,
MACHINE_END

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arch/arm/mach-pxa/pcm027.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* arch/arm/mach-pxa/include/mach/pcm027.h
*
* (c) 2003 Phytec Messtechnik GmbH <armlinux@phytec.de>
* (c) 2007 Juergen Beisert <j.beisert@pengutronix.de>
*/
/*
* Definitions of CPU card resources only
*/
#include "irqs.h" /* PXA_GPIO_TO_IRQ */
/* phyCORE-PXA270 (PCM027) Interrupts */
#define PCM027_IRQ(x) (IRQ_BOARD_START + (x))
#define PCM027_BTDET_IRQ PCM027_IRQ(0)
#define PCM027_FF_RI_IRQ PCM027_IRQ(1)
#define PCM027_MMCDET_IRQ PCM027_IRQ(2)
#define PCM027_PM_5V_IRQ PCM027_IRQ(3)
#define PCM027_NR_IRQS (IRQ_BOARD_START + 32)
/* I2C RTC */
#define PCM027_RTC_IRQ_GPIO 0
#define PCM027_RTC_IRQ PXA_GPIO_TO_IRQ(PCM027_RTC_IRQ_GPIO)
#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
#define ADR_PCM027_RTC 0x51 /* I2C address */
/* I2C EEPROM */
#define ADR_PCM027_EEPROM 0x54 /* I2C address */
/* Ethernet chip (SMSC91C111) */
#define PCM027_ETH_IRQ_GPIO 52
#define PCM027_ETH_IRQ PXA_GPIO_TO_IRQ(PCM027_ETH_IRQ_GPIO)
#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define PCM027_ETH_PHYS PXA_CS5_PHYS
#define PCM027_ETH_SIZE (1*1024*1024)
/* CAN controller SJA1000 (unsupported yet) */
#define PCM027_CAN_IRQ_GPIO 114
#define PCM027_CAN_IRQ PXA_GPIO_TO_IRQ(PCM027_CAN_IRQ_GPIO)
#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
#define PCM027_CAN_PHYS 0x22000000
#define PCM027_CAN_SIZE 0x100
/* SPI GPIO expander (unsupported yet) */
#define PCM027_EGPIO_IRQ_GPIO 27
#define PCM027_EGPIO_IRQ PXA_GPIO_TO_IRQ(PCM027_EGPIO_IRQ_GPIO)
#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
#define PCM027_EGPIO_CS 24
/*
* TODO: Switch this pin from dedicated usage to GPIO if
* more than the MAX7301 device is connected to this SPI bus
*/
#define PCM027_EGPIO_CS_MODE GPIO24_SFRM_MD
/* Flash memory */
#define PCM027_FLASH_PHYS 0x00000000
#define PCM027_FLASH_SIZE 0x02000000
/* onboard LEDs connected to GPIO */
#define PCM027_LED_CPU 90
#define PCM027_LED_HEARD_BEAT 91
/*
* This CPU module needs a baseboard to work. After basic initializing
* its own devices, it calls baseboard's init function.
* TODO: Add your own basebaord init function and call it from
* inside pcm027_init(). This example here is for the developmen board.
* Refer pcm990-baseboard.c
*/
extern void pcm990_baseboard_init(void);

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arch/arm/mach-pxa/pcm990-baseboard.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* arch/arm/mach-pxa/pcm990-baseboard.c
* Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990).
*
* Refer
* http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html
* for additional hardware info
*
* Author: Juergen Kilb
* Created: April 05, 2005
* Copyright: Phytec Messtechnik GmbH
* e-Mail: armlinux@phytec.de
*
* based on Intel Mainstone Board
*
* Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
*/
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <asm/mach/map.h>
#include "pxa27x.h"
#include <linux/platform_data/asoc-pxa.h>
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include "pcm990_baseboard.h"
#include <linux/platform_data/video-pxafb.h>
#include "devices.h"
#include "generic.h"
static unsigned long pcm990_pin_config[] __initdata = {
/* MMC */
GPIO32_MMC_CLK,
GPIO112_MMC_CMD,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
/* USB */
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
/* PWM0 */
GPIO16_PWM0_OUT,
/* I2C */
GPIO117_I2C_SCL,
GPIO118_I2C_SDA,
/* AC97 */
GPIO28_AC97_BITCLK,
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
};
static void __iomem *pcm990_cpld_base;
static u8 pcm990_cpld_readb(unsigned int reg)
{
return readb(pcm990_cpld_base + reg);
}
static void pcm990_cpld_writeb(u8 value, unsigned int reg)
{
writeb(value, pcm990_cpld_base + reg);
}
/*
* pcm990_lcd_power - control power supply to the LCD
* @on: 0 = switch off, 1 = switch on
*
* Called by the pxafb driver
*/
#ifndef CONFIG_PCM990_DISPLAY_NONE
static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
{
if (on) {
/* enable LCD-Latches
* power on LCD
*/
pcm990_cpld_writeb(PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON,
PCM990_CTRL_REG3);
} else {
/* disable LCD-Latches
* power off LCD
*/
pcm990_cpld_writeb(0, PCM990_CTRL_REG3);
}
}
#endif
#if defined(CONFIG_PCM990_DISPLAY_SHARP)
static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
.pixclock = 28000,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 20,
.left_margin = 103,
.right_margin = 47,
.vsync_len = 6,
.upper_margin = 28,
.lower_margin = 5,
.sync = 0,
.cmap_greyscale = 0,
};
static struct pxafb_mach_info pcm990_fbinfo __initdata = {
.modes = &fb_info_sharp_lq084v1dg21,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
.pxafb_lcd_power = pcm990_lcd_power,
};
#elif defined(CONFIG_PCM990_DISPLAY_NEC)
struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
.pixclock = 39720,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 32,
.left_margin = 16,
.right_margin = 48,
.vsync_len = 2,
.upper_margin = 12,
.lower_margin = 17,
.sync = 0,
.cmap_greyscale = 0,
};
static struct pxafb_mach_info pcm990_fbinfo __initdata = {
.modes = &fb_info_nec_nl6448bc20_18d,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
.pxafb_lcd_power = pcm990_lcd_power,
};
#endif
static struct pwm_lookup pcm990_pwm_lookup[] = {
PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 78770,
PWM_POLARITY_NORMAL),
};
static struct platform_pwm_backlight_data pcm990_backlight_data = {
.max_brightness = 1023,
.dft_brightness = 1023,
};
static struct platform_device pcm990_backlight_device = {
.name = "pwm-backlight",
.dev = {
.parent = &pxa27x_device_pwm0.dev,
.platform_data = &pcm990_backlight_data,
},
};
/*
* The PCM-990 development baseboard uses PCM-027's hardware in the
* following way:
*
* - LCD support is in use
* - GPIO16 is output for back light on/off with PWM
* - GPIO58 ... GPIO73 are outputs for display data
* - GPIO74 is output output for LCDFCLK
* - GPIO75 is output for LCDLCLK
* - GPIO76 is output for LCDPCLK
* - GPIO77 is output for LCDBIAS
* - MMC support is in use
* - GPIO32 is output for MMCCLK
* - GPIO92 is MMDAT0
* - GPIO109 is MMDAT1
* - GPIO110 is MMCS0
* - GPIO111 is MMCS1
* - GPIO112 is MMCMD
* - IDE/CF card is in use
* - GPIO48 is output /POE
* - GPIO49 is output /PWE
* - GPIO50 is output /PIOR
* - GPIO51 is output /PIOW
* - GPIO54 is output /PCE2
* - GPIO55 is output /PREG
* - GPIO56 is input /PWAIT
* - GPIO57 is output /PIOS16
* - GPIO79 is output PSKTSEL
* - GPIO85 is output /PCE1
* - FFUART is in use
* - GPIO34 is input FFRXD
* - GPIO35 is input FFCTS
* - GPIO36 is input FFDCD
* - GPIO37 is input FFDSR
* - GPIO38 is input FFRI
* - GPIO39 is output FFTXD
* - GPIO40 is output FFDTR
* - GPIO41 is output FFRTS
* - BTUART is in use
* - GPIO42 is input BTRXD
* - GPIO43 is output BTTXD
* - GPIO44 is input BTCTS
* - GPIO45 is output BTRTS
* - IRUART is in use
* - GPIO46 is input STDRXD
* - GPIO47 is output STDTXD
* - AC97 is in use*)
* - GPIO28 is input AC97CLK
* - GPIO29 is input AC97DatIn
* - GPIO30 is output AC97DatO
* - GPIO31 is output AC97SYNC
* - GPIO113 is output AC97_RESET
* - SSP is in use
* - GPIO23 is output SSPSCLK
* - GPIO24 is output chip select to Max7301
* - GPIO25 is output SSPTXD
* - GPIO26 is input SSPRXD
* - GPIO27 is input for Max7301 IRQ
* - GPIO53 is input SSPSYSCLK
* - SSP3 is in use
* - GPIO81 is output SSPTXD3
* - GPIO82 is input SSPRXD3
* - GPIO83 is output SSPSFRM
* - GPIO84 is output SSPCLK3
*
* Otherwise claimed GPIOs:
* GPIO1 -> IRQ from user switch
* GPIO9 -> IRQ from power management
* GPIO10 -> IRQ from WML9712 AC97 controller
* GPIO11 -> IRQ from IDE controller
* GPIO12 -> IRQ from CF controller
* GPIO13 -> IRQ from CF controller
* GPIO14 -> GPIO free
* GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path)
* GPIO19 -> GPIO free
* GPIO20 -> /SDCS2
* GPIO21 -> /CS3 PC card socket select
* GPIO33 -> /CS5 network controller select
* GPIO78 -> /CS2 (16 bit wide data path)
* GPIO80 -> /CS4 (16 bit wide data path)
* GPIO86 -> GPIO free
* GPIO87 -> GPIO free
* GPIO90 -> LED0 on CPU module
* GPIO91 -> LED1 on CPI module
* GPIO117 -> SCL
* GPIO118 -> SDA
*/
static unsigned long pcm990_irq_enabled;
static void pcm990_mask_ack_irq(struct irq_data *d)
{
int pcm990_irq = (d->irq - PCM027_IRQ(0));
pcm990_irq_enabled &= ~(1 << pcm990_irq);
pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
}
static void pcm990_unmask_irq(struct irq_data *d)
{
int pcm990_irq = (d->irq - PCM027_IRQ(0));
u8 val;
/* the irq can be acknowledged only if deasserted, so it's done here */
pcm990_irq_enabled |= (1 << pcm990_irq);
val = pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
val |= 1 << pcm990_irq;
pcm990_cpld_writeb(val, PCM990_CTRL_INTSETCLR);
pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
}
static struct irq_chip pcm990_irq_chip = {
.irq_mask_ack = pcm990_mask_ack_irq,
.irq_unmask = pcm990_unmask_irq,
};
static void pcm990_irq_handler(struct irq_desc *desc)
{
unsigned int irq;
unsigned long pending;
pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
pending &= pcm990_irq_enabled;
do {
/* clear our parent IRQ */
desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) {
irq = PCM027_IRQ(0) + __ffs(pending);
generic_handle_irq(irq);
}
pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
pending &= pcm990_irq_enabled;
} while (pending);
}
static void __init pcm990_init_irq(void)
{
int irq;
/* setup extra PCM990 irqs */
for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
irq_set_chip_and_handler(irq, &pcm990_irq_chip,
handle_level_irq);
irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
}
/* disable all Interrupts */
pcm990_cpld_writeb(0x0, PCM990_CTRL_INTMSKENA);
pcm990_cpld_writeb(0xff, PCM990_CTRL_INTSETCLR);
irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
}
static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
void *data)
{
int err;
err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, 0,
"MMC card detect", data);
if (err)
printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC "
"card detect IRQ\n");
return err;
}
static int pcm990_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data *p_d = dev->platform_data;
u8 val;
val = pcm990_cpld_readb(PCM990_CTRL_REG5);
if ((1 << vdd) & p_d->ocr_mask)
val |= PCM990_CTRL_MMC2PWR;
else
val &= ~PCM990_CTRL_MMC2PWR;
pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5);
return 0;
}
static void pcm990_mci_exit(struct device *dev, void *data)
{
free_irq(PCM027_MMCDET_IRQ, data);
}
#define MSECS_PER_JIFFY (1000/HZ)
static struct pxamci_platform_data pcm990_mci_platform_data = {
.detect_delay_ms = 250,
.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.init = pcm990_mci_init,
.setpower = pcm990_mci_setpower,
.exit = pcm990_mci_exit,
};
static struct pxaohci_platform_data pcm990_ohci_platform_data = {
.port_mode = PMM_PERPORT_MODE,
.flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
.power_on_delay = 10,
};
/*
* system init for baseboard usage. Will be called by pcm027 init.
*
* Add platform devices present on this baseboard and init
* them from CPU side as far as required to use them later on
*/
void __init pcm990_baseboard_init(void)
{
pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
pcm990_cpld_base = ioremap(PCM990_CTRL_PHYS, PCM990_CTRL_SIZE);
if (!pcm990_cpld_base) {
pr_err("pcm990: failed to ioremap cpld\n");
return;
}
/* register CPLD's IRQ controller */
pcm990_init_irq();
#ifndef CONFIG_PCM990_DISPLAY_NONE
pxa_set_fb_info(NULL, &pcm990_fbinfo);
#endif
pwm_add_table(pcm990_pwm_lookup, ARRAY_SIZE(pcm990_pwm_lookup));
platform_device_register(&pcm990_backlight_device);
/* MMC */
pxa_set_mci_info(&pcm990_mci_platform_data);
/* USB host */
pxa_set_ohci_info(&pcm990_ohci_platform_data);
pxa_set_i2c_info(NULL);
pxa_set_ac97_info(NULL);
printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
}

199
arch/arm/mach-pxa/pcm990_baseboard.h
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@ -1,199 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
*
* (c) 2003 Phytec Messtechnik GmbH <armlinux@phytec.de>
* (c) 2007 Juergen Beisert <j.beisert@pengutronix.de>
*/
#include "pcm027.h"
#include "irqs.h" /* PXA_GPIO_TO_IRQ */
/*
* definitions relevant only when the PCM-990
* development base board is in use
*/
/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
#define PCM990_CTRL_INT_IRQ_GPIO 9
#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)
#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
#define PCM990_CTRL_SIZE (1*1024*1024)
#define PCM990_CTRL_PWR_IRQ_GPIO 14
#define PCM990_CTRL_PWR_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO)
#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING
/* visible CPLD (U7) registers */
#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */
#define PCM990_CTRL_SYSRES 0x0001 /* System RESET REGISTER */
#define PCM990_CTRL_RESOUT 0x0002 /* RESETOUT Enable REGISTER */
#define PCM990_CTRL_RESGPIO 0x0004 /* RESETGPIO Enable REGISTER */
#define PCM990_CTRL_REG1 0x0002 /* Power REGISTER */
#define PCM990_CTRL_5VOFF 0x0001 /* Disable 5V Regulators */
#define PCM990_CTRL_CANPWR 0x0004 /* Enable CANPWR ADUM */
#define PCM990_CTRL_PM_5V 0x0008 /* Read 5V OK */
#define PCM990_CTRL_REG2 0x0004 /* LED REGISTER */
#define PCM990_CTRL_LEDPWR 0x0001 /* POWER LED enable */
#define PCM990_CTRL_LEDBAS 0x0002 /* BASIS LED enable */
#define PCM990_CTRL_LEDUSR 0x0004 /* USER LED enable */
#define PCM990_CTRL_REG3 0x0006 /* LCD CTRL REGISTER 3 */
#define PCM990_CTRL_LCDPWR 0x0001 /* RW LCD Power on */
#define PCM990_CTRL_LCDON 0x0002 /* RW LCD Latch on */
#define PCM990_CTRL_LCDPOS1 0x0004 /* RW POS 1 */
#define PCM990_CTRL_LCDPOS2 0x0008 /* RW POS 2 */
#define PCM990_CTRL_REG4 0x0008 /* MMC1 CTRL REGISTER 4 */
#define PCM990_CTRL_MMC1PWR 0x0001 /* RW MMC1 Power on */
#define PCM990_CTRL_REG5 0x000A /* MMC2 CTRL REGISTER 5 */
#define PCM990_CTRL_MMC2PWR 0x0001 /* RW MMC2 Power on */
#define PCM990_CTRL_MMC2LED 0x0002 /* RW MMC2 LED */
#define PCM990_CTRL_MMC2DE 0x0004 /* R MMC2 Card detect */
#define PCM990_CTRL_MMC2WP 0x0008 /* R MMC2 Card write protect */
#define PCM990_CTRL_INTSETCLR 0x000C /* Interrupt Clear REGISTER */
#define PCM990_CTRL_INTC0 0x0001 /* Clear Reg BT Detect */
#define PCM990_CTRL_INTC1 0x0002 /* Clear Reg FR RI */
#define PCM990_CTRL_INTC2 0x0004 /* Clear Reg MMC1 Detect */
#define PCM990_CTRL_INTC3 0x0008 /* Clear Reg PM_5V off */
#define PCM990_CTRL_INTMSKENA 0x000E /* Interrupt Enable REGISTER */
#define PCM990_CTRL_ENAINT0 0x0001 /* Enable Int BT Detect */
#define PCM990_CTRL_ENAINT1 0x0002 /* Enable Int FR RI */
#define PCM990_CTRL_ENAINT2 0x0004 /* Enable Int MMC1 Detect */
#define PCM990_CTRL_ENAINT3 0x0008 /* Enable Int PM_5V off */
#define PCM990_CTRL_REG8 0x0014 /* Uart REGISTER */
#define PCM990_CTRL_FFSD 0x0001 /* BT Uart Enable */
#define PCM990_CTRL_BTSD 0x0002 /* FF Uart Enable */
#define PCM990_CTRL_FFRI 0x0004 /* FF Uart RI detect */
#define PCM990_CTRL_BTRX 0x0008 /* BT Uart Rx detect */
#define PCM990_CTRL_REG9 0x0010 /* AC97 Flash REGISTER */
#define PCM990_CTRL_FLWP 0x0001 /* pC Flash Write Protect */
#define PCM990_CTRL_FLDIS 0x0002 /* pC Flash Disable */
#define PCM990_CTRL_AC97ENA 0x0004 /* Enable AC97 Expansion */
#define PCM990_CTRL_REG10 0x0012 /* GPS-REGISTER */
#define PCM990_CTRL_GPSPWR 0x0004 /* GPS-Modul Power on */
#define PCM990_CTRL_GPSENA 0x0008 /* GPS-Modul Enable */
#define PCM990_CTRL_REG11 0x0014 /* Accu REGISTER */
#define PCM990_CTRL_ACENA 0x0001 /* Charge Enable */
#define PCM990_CTRL_ACSEL 0x0002 /* Charge Akku -> DC Enable */
#define PCM990_CTRL_ACPRES 0x0004 /* DC Present */
#define PCM990_CTRL_ACALARM 0x0008 /* Error Akku */
/*
* IDE
*/
#define PCM990_IDE_IRQ_GPIO 13
#define PCM990_IDE_IRQ PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO)
#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */
#define PCM990_IDE_PLD_BASE 0xee000000
#define PCM990_IDE_PLD_SIZE (1*1024*1024)
/* visible CPLD (U6) registers */
#define PCM990_IDE_PLD_REG0 0x1000 /* OFFSET IDE REGISTER 0 */
#define PCM990_IDE_PM5V 0x0004 /* R System VCC_5V */
#define PCM990_IDE_STBY 0x0008 /* R System StandBy */
#define PCM990_IDE_PLD_REG1 0x1002 /* OFFSET IDE REGISTER 1 */
#define PCM990_IDE_IDEMODE 0x0001 /* R TrueIDE Mode */
#define PCM990_IDE_DMAENA 0x0004 /* RW DMA Enable */
#define PCM990_IDE_DMA1_0 0x0008 /* RW 1=DREQ1 0=DREQ0 */
#define PCM990_IDE_PLD_REG2 0x1004 /* OFFSET IDE REGISTER 2 */
#define PCM990_IDE_RESENA 0x0001 /* RW IDE Reset Bit enable */
#define PCM990_IDE_RES 0x0002 /* RW IDE Reset Bit */
#define PCM990_IDE_RDY 0x0008 /* RDY */
#define PCM990_IDE_PLD_REG3 0x1006 /* OFFSET IDE REGISTER 3 */
#define PCM990_IDE_IDEOE 0x0001 /* RW Latch on Databus */
#define PCM990_IDE_IDEON 0x0002 /* RW Latch on Control Address */
#define PCM990_IDE_IDEIN 0x0004 /* RW Latch on Interrupt usw. */
#define PCM990_IDE_PLD_REG4 0x1008 /* OFFSET IDE REGISTER 4 */
#define PCM990_IDE_PWRENA 0x0001 /* RW IDE Power enable */
#define PCM990_IDE_5V 0x0002 /* R IDE Power 5V */
#define PCM990_IDE_PWG 0x0008 /* R IDE Power is on */
#define PCM990_IDE_PLD_P2V(x) ((x) - PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_BASE)
#define PCM990_IDE_PLD_V2P(x) ((x) - PCM990_IDE_PLD_BASE + PCM990_IDE_PLD_PHYS)
/*
* Compact Flash
*/
#define PCM990_CF_IRQ_GPIO 11
#define PCM990_CF_IRQ PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO)
#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define PCM990_CF_CD_GPIO 12
#define PCM990_CF_CD PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO)
#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
/* visible CPLD (U6) registers */
#define PCM990_CF_PLD_REG0 0x1000 /* OFFSET CF REGISTER 0 */
#define PCM990_CF_REG0_LED 0x0001 /* RW LED on */
#define PCM990_CF_REG0_BLK 0x0002 /* RW LED flash when access */
#define PCM990_CF_REG0_PM5V 0x0004 /* R System VCC_5V enable */
#define PCM990_CF_REG0_STBY 0x0008 /* R System StandBy */
#define PCM990_CF_PLD_REG1 0x1002 /* OFFSET CF REGISTER 1 */
#define PCM990_CF_REG1_IDEMODE 0x0001 /* RW CF card run as TrueIDE */
#define PCM990_CF_REG1_CF0 0x0002 /* RW CF card at ADDR 0x28000000 */
#define PCM990_CF_PLD_REG2 0x1004 /* OFFSET CF REGISTER 2 */
#define PCM990_CF_REG2_RES 0x0002 /* RW CF RESET BIT */
#define PCM990_CF_REG2_RDYENA 0x0004 /* RW Enable CF_RDY */
#define PCM990_CF_REG2_RDY 0x0008 /* R CF_RDY auf PWAIT */
#define PCM990_CF_PLD_REG3 0x1006 /* OFFSET CF REGISTER 3 */
#define PCM990_CF_REG3_CFOE 0x0001 /* RW Latch on Databus */
#define PCM990_CF_REG3_CFON 0x0002 /* RW Latch on Control Address */
#define PCM990_CF_REG3_CFIN 0x0004 /* RW Latch on Interrupt usw. */
#define PCM990_CF_REG3_CFCD 0x0008 /* RW Latch on CD1/2 VS1/2 usw */
#define PCM990_CF_PLD_REG4 0x1008 /* OFFSET CF REGISTER 4 */
#define PCM990_CF_REG4_PWRENA 0x0001 /* RW CF Power on (CD1/2 = "00") */
#define PCM990_CF_REG4_5_3V 0x0002 /* RW 1 = 5V CF_VCC 0 = 3 V CF_VCC */
#define PCM990_CF_REG4_3B 0x0004 /* RW 3.0V Backup from VCC (5_3V=0) */
#define PCM990_CF_REG4_PWG 0x0008 /* R CF-Power is on */
#define PCM990_CF_PLD_REG5 0x100A /* OFFSET CF REGISTER 5 */
#define PCM990_CF_REG5_BVD1 0x0001 /* R CF /BVD1 */
#define PCM990_CF_REG5_BVD2 0x0002 /* R CF /BVD2 */
#define PCM990_CF_REG5_VS1 0x0004 /* R CF /VS1 */
#define PCM990_CF_REG5_VS2 0x0008 /* R CF /VS2 */
#define PCM990_CF_PLD_REG6 0x100C /* OFFSET CF REGISTER 6 */
#define PCM990_CF_REG6_CD1 0x0001 /* R CF Card_Detect1 */
#define PCM990_CF_REG6_CD2 0x0002 /* R CF Card_Detect2 */
/*
* Wolfson AC97 Touch
*/
#define PCM990_AC97_IRQ_GPIO 10
#define PCM990_AC97_IRQ PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO)
#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING
/*
* MMC phyCORE
*/
#define PCM990_MMC0_IRQ_GPIO 9
#define PCM990_MMC0_IRQ PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO)
#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
/*
* USB phyCore
*/
#define PCM990_USB_OVERCURRENT (88 | GPIO_ALT_FN_1_IN)
#define PCM990_USB_PWR_EN (89 | GPIO_ALT_FN_2_OUT)

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arch/arm/mach-pxa/poodle.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/poodle.c
*
* Support for the SHARP Poodle Board.
*
* Based on:
* linux/arch/arm/mach-pxa/lubbock.c Author: Nicolas Pitre
*
* Change Log
* 12-Dec-2002 Sharp Corporation for Poodle
* John Lenz <lenz@cs.wisc.edu> updates to 2.6
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/export.h>
#include <linux/platform_device.h>
#include <linux/fb.h>
#include <linux/pm.h>
#include <linux/delay.h>
#include <linux/mtd/physmap.h>
#include <linux/gpio.h>
#include <linux/gpio/machine.h>
#include <linux/i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/regulator/machine.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/mtd/sharpsl.h>
#include <linux/memblock.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include "pxa25x.h"
#include "udc.h"
#include "poodle.h"
#include <linux/platform_data/mmc-pxamci.h>
#include <linux/platform_data/irda-pxaficp.h>
#include <linux/platform_data/video-pxafb.h>
#include <linux/platform_data/asoc-poodle.h>
#include <asm/hardware/scoop.h>
#include <asm/hardware/locomo.h>
#include <asm/mach/sharpsl_param.h>
#include "generic.h"
#include "devices.h"
static unsigned long poodle_pin_config[] __initdata = {
/* I/O */
GPIO79_nCS_3,
GPIO80_nCS_4,
GPIO18_RDY,
/* Clock */
GPIO12_32KHz,
/* SSP1 */
GPIO23_SSP1_SCLK,
GPIO25_SSP1_TXD,
GPIO26_SSP1_RXD,
GPIO24_GPIO, /* POODLE_GPIO_TP_CS - SFRM as chip select */
/* I2S */
GPIO28_I2S_BITCLK_OUT,
GPIO29_I2S_SDATA_IN,
GPIO30_I2S_SDATA_OUT,
GPIO31_I2S_SYNC,
GPIO32_I2S_SYSCLK,
/* Infra-Red */
GPIO47_FICP_TXD,
GPIO46_FICP_RXD,
/* FFUART */
GPIO40_FFUART_DTR,
GPIO41_FFUART_RTS,
GPIO39_FFUART_TXD,
GPIO37_FFUART_DSR,
GPIO34_FFUART_RXD,
GPIO35_FFUART_CTS,
/* LCD */
GPIOxx_LCD_TFT_16BPP,
/* PC Card */
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO52_nPCE_1,
GPIO53_nPCE_2,
GPIO54_nPSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
/* MMC */
GPIO6_MMC_CLK,
GPIO8_MMC_CS0,
/* GPIO */
GPIO9_GPIO, /* POODLE_GPIO_nSD_DETECT */
GPIO7_GPIO, /* POODLE_GPIO_nSD_WP */
GPIO3_GPIO, /* POODLE_GPIO_SD_PWR */
GPIO33_GPIO, /* POODLE_GPIO_SD_PWR1 */
GPIO20_GPIO, /* POODLE_GPIO_USB_PULLUP */
GPIO22_GPIO, /* POODLE_GPIO_IR_ON */
};
static struct resource poodle_scoop_resources[] = {
[0] = {
.start = 0x10800000,
.end = 0x10800fff,
.flags = IORESOURCE_MEM,
},
};
static struct scoop_config poodle_scoop_setup = {
.io_dir = POODLE_SCOOP_IO_DIR,
.io_out = POODLE_SCOOP_IO_OUT,
.gpio_base = POODLE_SCOOP_GPIO_BASE,
};
struct platform_device poodle_scoop_device = {
.name = "sharp-scoop",
.id = -1,
.dev = {
.platform_data = &poodle_scoop_setup,
},
.num_resources = ARRAY_SIZE(poodle_scoop_resources),
.resource = poodle_scoop_resources,
};
static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = {
{
.dev = &poodle_scoop_device.dev,
.irq = POODLE_IRQ_GPIO_CF_IRQ,
.cd_irq = POODLE_IRQ_GPIO_CF_CD,
.cd_irq_str = "PCMCIA0 CD",
},
};
static struct scoop_pcmcia_config poodle_pcmcia_config = {
.devs = &poodle_pcmcia_scoop[0],
.num_devs = 1,
};
EXPORT_SYMBOL(poodle_scoop_device);
/* LoCoMo device */
static struct resource locomo_resources[] = {
[0] = {
.start = 0x10000000,
.end = 0x10001fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PXA_GPIO_TO_IRQ(10),
.end = PXA_GPIO_TO_IRQ(10),
.flags = IORESOURCE_IRQ,
},
};
static struct locomo_platform_data locomo_info = {
.irq_base = IRQ_BOARD_START,
};
static struct platform_device poodle_locomo_device = {
.name = "locomo",
.id = 0,
.num_resources = ARRAY_SIZE(locomo_resources),
.resource = locomo_resources,
.dev = {
.platform_data = &locomo_info,
},
};
static struct poodle_audio_platform_data poodle_audio_pdata = {
.locomo_dev = &poodle_locomo_device.dev,
.gpio_amp_on = POODLE_LOCOMO_GPIO_AMP_ON,
.gpio_mute_l = POODLE_LOCOMO_GPIO_MUTE_L,
.gpio_mute_r = POODLE_LOCOMO_GPIO_MUTE_R,
.gpio_232vcc_on = POODLE_LOCOMO_GPIO_232VCC_ON,
.gpio_jk_b = POODLE_LOCOMO_GPIO_JK_B,
};
static struct platform_device poodle_audio_device = {
.name = "poodle-audio",
.id = -1,
.dev.platform_data = &poodle_audio_pdata,
};
#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
static struct pxa2xx_spi_controller poodle_spi_info = {
.num_chipselect = 1,
};
static struct gpiod_lookup_table poodle_spi_gpio_table = {
.dev_id = "pxa2xx-spi.1",
.table = {
GPIO_LOOKUP_IDX("gpio-pxa", POODLE_GPIO_TP_CS, "cs", 0, GPIO_ACTIVE_LOW),
{ },
},
};
static struct ads7846_platform_data poodle_ads7846_info = {
.model = 7846,
.vref_delay_usecs = 100,
.x_plate_ohms = 419,
.y_plate_ohms = 486,
.gpio_pendown = POODLE_GPIO_TP_INT,
};
static struct spi_board_info poodle_spi_devices[] = {
{
.modalias = "ads7846",
.max_speed_hz = 10000,
.bus_num = 1,
.platform_data = &poodle_ads7846_info,
.irq = PXA_GPIO_TO_IRQ(POODLE_GPIO_TP_INT),
},
};
static void __init poodle_init_spi(void)
{
gpiod_add_lookup_table(&poodle_spi_gpio_table);
pxa2xx_set_spi_info(1, &poodle_spi_info);
spi_register_board_info(ARRAY_AND_SIZE(poodle_spi_devices));
}
#else
static inline void poodle_init_spi(void) {}
#endif
/*
* MMC/SD Device
*
* The card detect interrupt isn't debounced so we delay it by 250ms
* to give the card a chance to fully insert/eject.
*/
static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int, void *data)
{
int err;
err = gpio_request(POODLE_GPIO_SD_PWR, "SD_PWR");
if (err)
goto err_free_2;
err = gpio_request(POODLE_GPIO_SD_PWR1, "SD_PWR1");
if (err)
goto err_free_3;
gpio_direction_output(POODLE_GPIO_SD_PWR, 0);
gpio_direction_output(POODLE_GPIO_SD_PWR1, 0);
return 0;
err_free_3:
gpio_free(POODLE_GPIO_SD_PWR);
err_free_2:
return err;
}
static int poodle_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data* p_d = dev->platform_data;
if ((1 << vdd) & p_d->ocr_mask) {
gpio_set_value(POODLE_GPIO_SD_PWR, 1);
mdelay(2);
gpio_set_value(POODLE_GPIO_SD_PWR1, 1);
} else {
gpio_set_value(POODLE_GPIO_SD_PWR1, 0);
gpio_set_value(POODLE_GPIO_SD_PWR, 0);
}
return 0;
}
static void poodle_mci_exit(struct device *dev, void *data)
{
gpio_free(POODLE_GPIO_SD_PWR1);
gpio_free(POODLE_GPIO_SD_PWR);
}
static struct pxamci_platform_data poodle_mci_platform_data = {
.detect_delay_ms = 250,
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = poodle_mci_init,
.setpower = poodle_mci_setpower,
.exit = poodle_mci_exit,
};
static struct gpiod_lookup_table poodle_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", POODLE_GPIO_nSD_DETECT,
"cd", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", POODLE_GPIO_nSD_WP,
"wp", GPIO_ACTIVE_LOW),
{ },
},
};
/*
* Irda
*/
static struct pxaficp_platform_data poodle_ficp_platform_data = {
.gpio_pwdown = POODLE_GPIO_IR_ON,
.transceiver_cap = IR_SIRMODE | IR_OFF,
};
/*
* USB Device Controller
*/
static struct pxa2xx_udc_mach_info udc_info __initdata = {
/* no connect GPIO; poodle can't tell connection status */
.gpio_pullup = POODLE_GPIO_USB_PULLUP,
};
/* PXAFB device */
static struct pxafb_mode_info poodle_fb_mode = {
.pixclock = 144700,
.xres = 320,
.yres = 240,
.bpp = 16,
.hsync_len = 7,
.left_margin = 11,
.right_margin = 30,
.vsync_len = 2,
.upper_margin = 2,
.lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
};
static struct pxafb_mach_info poodle_fb_info = {
.modes = &poodle_fb_mode,
.num_modes = 1,
.lcd_conn = LCD_COLOR_TFT_16BPP,
};
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr sharpsl_bbt = {
.options = 0,
.offs = 4,
.len = 2,
.pattern = scan_ff_pattern
};
static const char * const probes[] = {
"cmdlinepart",
"ofpart",
"sharpslpart",
NULL,
};
static struct sharpsl_nand_platform_data sharpsl_nand_platform_data = {
.badblock_pattern = &sharpsl_bbt,
.part_parsers = probes,
};
static struct resource sharpsl_nand_resources[] = {
{
.start = 0x0C000000,
.end = 0x0C000FFF,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device sharpsl_nand_device = {
.name = "sharpsl-nand",
.id = -1,
.resource = sharpsl_nand_resources,
.num_resources = ARRAY_SIZE(sharpsl_nand_resources),
.dev.platform_data = &sharpsl_nand_platform_data,
};
static struct mtd_partition sharpsl_rom_parts[] = {
{
.name ="Boot PROM Filesystem",
.offset = 0x00120000,
.size = MTDPART_SIZ_FULL,
},
};
static struct physmap_flash_data sharpsl_rom_data = {
.width = 2,
.nr_parts = ARRAY_SIZE(sharpsl_rom_parts),
.parts = sharpsl_rom_parts,
};
static struct resource sharpsl_rom_resources[] = {
{
.start = 0x00000000,
.end = 0x007fffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device sharpsl_rom_device = {
.name = "physmap-flash",
.id = -1,
.resource = sharpsl_rom_resources,
.num_resources = ARRAY_SIZE(sharpsl_rom_resources),
.dev.platform_data = &sharpsl_rom_data,
};
static struct platform_device *devices[] __initdata = {
&poodle_locomo_device,
&poodle_scoop_device,
&poodle_audio_device,
&sharpsl_nand_device,
&sharpsl_rom_device,
};
static struct i2c_board_info __initdata poodle_i2c_devices[] = {
{ I2C_BOARD_INFO("wm8731", 0x1b) },
};
static void poodle_poweroff(void)
{
pxa_restart(REBOOT_HARD, NULL);
}
static void __init poodle_init(void)
{
int ret = 0;
pm_power_off = poodle_poweroff;
PCFR |= PCFR_OPDE;
pxa2xx_mfp_config(ARRAY_AND_SIZE(poodle_pin_config));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_scoop_config = &poodle_pcmcia_config;
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
if (ret)
pr_warn("poodle: Unable to register LoCoMo device\n");
pxa_set_fb_info(&poodle_locomo_device.dev, &poodle_fb_info);
pxa_set_udc_info(&udc_info);
gpiod_add_lookup_table(&poodle_mci_gpio_table);
pxa_set_mci_info(&poodle_mci_platform_data);
pxa_set_ficp_info(&poodle_ficp_platform_data);
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(poodle_i2c_devices));
poodle_init_spi();
regulator_has_full_constraints();
}
static void __init fixup_poodle(struct tag *tags, char **cmdline)
{
sharpsl_save_param();
memblock_add(0xa0000000, SZ_32M);
}
MACHINE_START(POODLE, "SHARP Poodle")
.fixup = fixup_poodle,
.map_io = pxa25x_map_io,
.nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */
.init_irq = pxa25x_init_irq,
.handle_irq = pxa25x_handle_irq,
.init_time = pxa_timer_init,
.init_machine = poodle_init,
.restart = pxa_restart,
MACHINE_END

92
arch/arm/mach-pxa/poodle.h
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@ -1,92 +0,0 @@
/*
* arch/arm/mach-pxa/include/mach/poodle.h
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Based on:
* arch/arm/mach-sa1100/include/mach/collie.h
*
* ChangeLog:
* 04-06-2001 Lineo Japan, Inc.
* 04-16-2001 SHARP Corporation
* Update to 2.6 John Lenz
*/
#ifndef __ASM_ARCH_POODLE_H
#define __ASM_ARCH_POODLE_H 1
#include "irqs.h" /* PXA_GPIO_TO_IRQ */
/*
* GPIOs
*/
/* PXA GPIOs */
#define POODLE_GPIO_ON_KEY (0)
#define POODLE_GPIO_AC_IN (1)
#define POODLE_GPIO_CO 16
#define POODLE_GPIO_TP_INT (5)
#define POODLE_GPIO_TP_CS (24)
#define POODLE_GPIO_WAKEUP (11) /* change battery */
#define POODLE_GPIO_GA_INT (10)
#define POODLE_GPIO_IR_ON (22)
#define POODLE_GPIO_HP_IN (4)
#define POODLE_GPIO_CF_IRQ (17)
#define POODLE_GPIO_CF_CD (14)
#define POODLE_GPIO_CF_STSCHG (14)
#define POODLE_GPIO_SD_PWR (33)
#define POODLE_GPIO_SD_PWR1 (3)
#define POODLE_GPIO_nSD_CLK (6)
#define POODLE_GPIO_nSD_WP (7)
#define POODLE_GPIO_nSD_INT (8)
#define POODLE_GPIO_nSD_DETECT (9)
#define POODLE_GPIO_MAIN_BAT_LOW (13)
#define POODLE_GPIO_BAT_COVER (13)
#define POODLE_GPIO_USB_PULLUP (20)
#define POODLE_GPIO_ADC_TEMP_ON (21)
#define POODLE_GPIO_BYPASS_ON (36)
#define POODLE_GPIO_CHRG_ON (38)
#define POODLE_GPIO_CHRG_FULL (16)
#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */
/* PXA GPIOs */
#define POODLE_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(0)
#define POODLE_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1)
#define POODLE_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(4)
#define POODLE_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(16)
#define POODLE_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5)
#define POODLE_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(11)
#define POODLE_IRQ_GPIO_GA_INT PXA_GPIO_TO_IRQ(10)
#define POODLE_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17)
#define POODLE_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14)
#define POODLE_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(8)
#define POODLE_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9)
#define POODLE_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(13)
/* SCOOP GPIOs */
#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11
#define POODLE_SCOOP_CP401 SCOOP_GPCR_PA13
#define POODLE_SCOOP_VPEN SCOOP_GPCR_PA18
#define POODLE_SCOOP_L_PCLK SCOOP_GPCR_PA20
#define POODLE_SCOOP_L_LCLK SCOOP_GPCR_PA21
#define POODLE_SCOOP_HS_OUT SCOOP_GPCR_PA22
#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
#define POODLE_SCOOP_IO_OUT ( 0 )
#define POODLE_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0)
#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2)
#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7)
#define POODLE_GPIO_L_PCLK (POODLE_SCOOP_GPIO_BASE + 9)
#define POODLE_GPIO_L_LCLK (POODLE_SCOOP_GPIO_BASE + 10)
#define POODLE_GPIO_HS_OUT (POODLE_SCOOP_GPIO_BASE + 11)
#define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8)
#define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10)
#define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11)
#define POODLE_LOCOMO_GPIO_232VCC_ON LOCOMO_GPIO(12)
#define POODLE_LOCOMO_GPIO_JK_B LOCOMO_GPIO(13)
#define POODLE_NR_IRQS (IRQ_BOARD_START + 4) /* 4 for LoCoMo */
#endif /* __ASM_ARCH_POODLE_H */

200
arch/arm/mach-pxa/pxa_cplds_irqs.c
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@ -1,200 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Intel Reference Systems cplds
*
* Copyright (C) 2014 Robert Jarzmik
*
* Cplds motherboard driver, supporting lubbock and mainstone SoC board.
*/
#include <linux/bitops.h>
#include <linux/gpio.h>
#include <linux/gpio/consumer.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/mfd/core.h>
#include <linux/module.h>
#include <linux/of_platform.h>
#define FPGA_IRQ_MASK_EN 0x0
#define FPGA_IRQ_SET_CLR 0x10
#define CPLDS_NB_IRQ 32
struct cplds {
void __iomem *base;
int irq;
unsigned int irq_mask;
struct gpio_desc *gpio0;
struct irq_domain *irqdomain;
};
static irqreturn_t cplds_irq_handler(int in_irq, void *d)
{
struct cplds *fpga = d;
unsigned long pending;
unsigned int bit;
do {
pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask;
for_each_set_bit(bit, &pending, CPLDS_NB_IRQ)
generic_handle_domain_irq(fpga->irqdomain, bit);
} while (pending);
return IRQ_HANDLED;
}
static void cplds_irq_mask(struct irq_data *d)
{
struct cplds *fpga = irq_data_get_irq_chip_data(d);
unsigned int cplds_irq = irqd_to_hwirq(d);
unsigned int bit = BIT(cplds_irq);
fpga->irq_mask &= ~bit;
writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN);
}
static void cplds_irq_unmask(struct irq_data *d)
{
struct cplds *fpga = irq_data_get_irq_chip_data(d);
unsigned int cplds_irq = irqd_to_hwirq(d);
unsigned int set, bit = BIT(cplds_irq);
set = readl(fpga->base + FPGA_IRQ_SET_CLR);
writel(set & ~bit, fpga->base + FPGA_IRQ_SET_CLR);
fpga->irq_mask |= bit;
writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN);
}
static struct irq_chip cplds_irq_chip = {
.name = "pxa_cplds",
.irq_ack = cplds_irq_mask,
.irq_mask = cplds_irq_mask,
.irq_unmask = cplds_irq_unmask,
.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE,
};
static int cplds_irq_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hwirq)
{
struct cplds *fpga = d->host_data;
irq_set_chip_and_handler(irq, &cplds_irq_chip, handle_level_irq);
irq_set_chip_data(irq, fpga);
return 0;
}
static const struct irq_domain_ops cplds_irq_domain_ops = {
.xlate = irq_domain_xlate_twocell,
.map = cplds_irq_domain_map,
};
static int cplds_resume(struct platform_device *pdev)
{
struct cplds *fpga = platform_get_drvdata(pdev);
writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN);
return 0;
}
static int cplds_probe(struct platform_device *pdev)
{
struct resource *res;
struct cplds *fpga;
int ret;
int base_irq;
unsigned long irqflags = 0;
fpga = devm_kzalloc(&pdev->dev, sizeof(*fpga), GFP_KERNEL);
if (!fpga)
return -ENOMEM;
fpga->irq = platform_get_irq(pdev, 0);
if (fpga->irq <= 0)
return fpga->irq;
base_irq = platform_get_irq(pdev, 1);
if (base_irq < 0) {
base_irq = 0;
} else {
ret = devm_irq_alloc_descs(&pdev->dev, base_irq, base_irq, CPLDS_NB_IRQ, 0);
if (ret < 0)
return ret;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
fpga->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(fpga->base))
return PTR_ERR(fpga->base);
platform_set_drvdata(pdev, fpga);
writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN);
writel(0, fpga->base + FPGA_IRQ_SET_CLR);
irqflags = irq_get_trigger_type(fpga->irq);
ret = devm_request_irq(&pdev->dev, fpga->irq, cplds_irq_handler,
irqflags, dev_name(&pdev->dev), fpga);
if (ret == -ENOSYS)
return -EPROBE_DEFER;
if (ret) {
dev_err(&pdev->dev, "couldn't request main irq%d: %d\n",
fpga->irq, ret);
return ret;
}
irq_set_irq_wake(fpga->irq, 1);
if (base_irq)
fpga->irqdomain = irq_domain_add_legacy(pdev->dev.of_node,
CPLDS_NB_IRQ,
base_irq, 0,
&cplds_irq_domain_ops,
fpga);
else
fpga->irqdomain = irq_domain_add_linear(pdev->dev.of_node,
CPLDS_NB_IRQ,
&cplds_irq_domain_ops,
fpga);
if (!fpga->irqdomain)
return -ENODEV;
return 0;
}
static int cplds_remove(struct platform_device *pdev)
{
struct cplds *fpga = platform_get_drvdata(pdev);
irq_set_chip_and_handler(fpga->irq, NULL, NULL);
return 0;
}
static const struct of_device_id cplds_id_table[] = {
{ .compatible = "intel,lubbock-cplds-irqs", },
{ .compatible = "intel,mainstone-cplds-irqs", },
{ }
};
MODULE_DEVICE_TABLE(of, cplds_id_table);
static struct platform_driver cplds_driver = {
.driver = {
.name = "pxa_cplds_irqs",
.of_match_table = of_match_ptr(cplds_id_table),
},
.probe = cplds_probe,
.remove = cplds_remove,
.resume = cplds_resume,
};
module_platform_driver(cplds_driver);
MODULE_DESCRIPTION("PXA Cplds interrupts driver");
MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
MODULE_LICENSE("GPL");

146
arch/arm/mach-pxa/regs-uart.h
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_ARCH_REGS_UART_H
#define __ASM_ARCH_REGS_UART_H
#include "pxa-regs.h"
/*
* UARTs
*/
/* Full Function UART (FFUART) */
#define FFUART FFRBR
#define FFRBR __REG(0x40100000) /* Receive Buffer Register (read only) */
#define FFTHR __REG(0x40100000) /* Transmit Holding Register (write only) */
#define FFIER __REG(0x40100004) /* Interrupt Enable Register (read/write) */
#define FFIIR __REG(0x40100008) /* Interrupt ID Register (read only) */
#define FFFCR __REG(0x40100008) /* FIFO Control Register (write only) */
#define FFLCR __REG(0x4010000C) /* Line Control Register (read/write) */
#define FFMCR __REG(0x40100010) /* Modem Control Register (read/write) */
#define FFLSR __REG(0x40100014) /* Line Status Register (read only) */
#define FFMSR __REG(0x40100018) /* Modem Status Register (read only) */
#define FFSPR __REG(0x4010001C) /* Scratch Pad Register (read/write) */
#define FFISR __REG(0x40100020) /* Infrared Selection Register (read/write) */
#define FFDLL __REG(0x40100000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
#define FFDLH __REG(0x40100004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
/* Bluetooth UART (BTUART) */
#define BTUART BTRBR
#define BTRBR __REG(0x40200000) /* Receive Buffer Register (read only) */
#define BTTHR __REG(0x40200000) /* Transmit Holding Register (write only) */
#define BTIER __REG(0x40200004) /* Interrupt Enable Register (read/write) */
#define BTIIR __REG(0x40200008) /* Interrupt ID Register (read only) */
#define BTFCR __REG(0x40200008) /* FIFO Control Register (write only) */
#define BTLCR __REG(0x4020000C) /* Line Control Register (read/write) */
#define BTMCR __REG(0x40200010) /* Modem Control Register (read/write) */
#define BTLSR __REG(0x40200014) /* Line Status Register (read only) */
#define BTMSR __REG(0x40200018) /* Modem Status Register (read only) */
#define BTSPR __REG(0x4020001C) /* Scratch Pad Register (read/write) */
#define BTISR __REG(0x40200020) /* Infrared Selection Register (read/write) */
#define BTDLL __REG(0x40200000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
#define BTDLH __REG(0x40200004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
/* Standard UART (STUART) */
#define STUART STRBR
#define STRBR __REG(0x40700000) /* Receive Buffer Register (read only) */
#define STTHR __REG(0x40700000) /* Transmit Holding Register (write only) */
#define STIER __REG(0x40700004) /* Interrupt Enable Register (read/write) */
#define STIIR __REG(0x40700008) /* Interrupt ID Register (read only) */
#define STFCR __REG(0x40700008) /* FIFO Control Register (write only) */
#define STLCR __REG(0x4070000C) /* Line Control Register (read/write) */
#define STMCR __REG(0x40700010) /* Modem Control Register (read/write) */
#define STLSR __REG(0x40700014) /* Line Status Register (read only) */
#define STMSR __REG(0x40700018) /* Reserved */
#define STSPR __REG(0x4070001C) /* Scratch Pad Register (read/write) */
#define STISR __REG(0x40700020) /* Infrared Selection Register (read/write) */
#define STDLL __REG(0x40700000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
#define STDLH __REG(0x40700004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
/* Hardware UART (HWUART) */
#define HWUART HWRBR
#define HWRBR __REG(0x41600000) /* Receive Buffer Register (read only) */
#define HWTHR __REG(0x41600000) /* Transmit Holding Register (write only) */
#define HWIER __REG(0x41600004) /* Interrupt Enable Register (read/write) */
#define HWIIR __REG(0x41600008) /* Interrupt ID Register (read only) */
#define HWFCR __REG(0x41600008) /* FIFO Control Register (write only) */
#define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */
#define HWMCR __REG(0x41600010) /* Modem Control Register (read/write) */
#define HWLSR __REG(0x41600014) /* Line Status Register (read only) */
#define HWMSR __REG(0x41600018) /* Modem Status Register (read only) */
#define HWSPR __REG(0x4160001C) /* Scratch Pad Register (read/write) */
#define HWISR __REG(0x41600020) /* Infrared Selection Register (read/write) */
#define HWFOR __REG(0x41600024) /* Receive FIFO Occupancy Register (read only) */
#define HWABR __REG(0x41600028) /* Auto-Baud Control Register (read/write) */
#define HWACR __REG(0x4160002C) /* Auto-Baud Count Register (read only) */
#define HWDLL __REG(0x41600000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
#define HWDLH __REG(0x41600004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
#define IER_DMAE (1 << 7) /* DMA Requests Enable */
#define IER_UUE (1 << 6) /* UART Unit Enable */
#define IER_NRZE (1 << 5) /* NRZ coding Enable */
#define IER_RTIOE (1 << 4) /* Receiver Time Out Interrupt Enable */
#define IER_MIE (1 << 3) /* Modem Interrupt Enable */
#define IER_RLSE (1 << 2) /* Receiver Line Status Interrupt Enable */
#define IER_TIE (1 << 1) /* Transmit Data request Interrupt Enable */
#define IER_RAVIE (1 << 0) /* Receiver Data Available Interrupt Enable */
#define IIR_FIFOES1 (1 << 7) /* FIFO Mode Enable Status */
#define IIR_FIFOES0 (1 << 6) /* FIFO Mode Enable Status */
#define IIR_TOD (1 << 3) /* Time Out Detected */
#define IIR_IID2 (1 << 2) /* Interrupt Source Encoded */
#define IIR_IID1 (1 << 1) /* Interrupt Source Encoded */
#define IIR_IP (1 << 0) /* Interrupt Pending (active low) */
#define FCR_ITL2 (1 << 7) /* Interrupt Trigger Level */
#define FCR_ITL1 (1 << 6) /* Interrupt Trigger Level */
#define FCR_RESETTF (1 << 2) /* Reset Transmitter FIFO */
#define FCR_RESETRF (1 << 1) /* Reset Receiver FIFO */
#define FCR_TRFIFOE (1 << 0) /* Transmit and Receive FIFO Enable */
#define FCR_ITL_1 (0)
#define FCR_ITL_8 (FCR_ITL1)
#define FCR_ITL_16 (FCR_ITL2)
#define FCR_ITL_32 (FCR_ITL2|FCR_ITL1)
#define LCR_DLAB (1 << 7) /* Divisor Latch Access Bit */
#define LCR_SB (1 << 6) /* Set Break */
#define LCR_STKYP (1 << 5) /* Sticky Parity */
#define LCR_EPS (1 << 4) /* Even Parity Select */
#define LCR_PEN (1 << 3) /* Parity Enable */
#define LCR_STB (1 << 2) /* Stop Bit */
#define LCR_WLS1 (1 << 1) /* Word Length Select */
#define LCR_WLS0 (1 << 0) /* Word Length Select */
#define LSR_FIFOE (1 << 7) /* FIFO Error Status */
#define LSR_TEMT (1 << 6) /* Transmitter Empty */
#define LSR_TDRQ (1 << 5) /* Transmit Data Request */
#define LSR_BI (1 << 4) /* Break Interrupt */
#define LSR_FE (1 << 3) /* Framing Error */
#define LSR_PE (1 << 2) /* Parity Error */
#define LSR_OE (1 << 1) /* Overrun Error */
#define LSR_DR (1 << 0) /* Data Ready */
#define MCR_LOOP (1 << 4)
#define MCR_OUT2 (1 << 3) /* force MSR_DCD in loopback mode */
#define MCR_OUT1 (1 << 2) /* force MSR_RI in loopback mode */
#define MCR_RTS (1 << 1) /* Request to Send */
#define MCR_DTR (1 << 0) /* Data Terminal Ready */
#define MSR_DCD (1 << 7) /* Data Carrier Detect */
#define MSR_RI (1 << 6) /* Ring Indicator */
#define MSR_DSR (1 << 5) /* Data Set Ready */
#define MSR_CTS (1 << 4) /* Clear To Send */
#define MSR_DDCD (1 << 3) /* Delta Data Carrier Detect */
#define MSR_TERI (1 << 2) /* Trailing Edge Ring Indicator */
#define MSR_DDSR (1 << 1) /* Delta Data Set Ready */
#define MSR_DCTS (1 << 0) /* Delta Clear To Send */
/*
* IrSR (Infrared Selection Register)
*/
#define STISR_RXPL (1 << 4) /* Receive Data Polarity */
#define STISR_TXPL (1 << 3) /* Transmit Data Polarity */
#define STISR_XMODE (1 << 2) /* Transmit Pulse Width Select */
#define STISR_RCVEIR (1 << 1) /* Receiver SIR Enable */
#define STISR_XMITIR (1 << 0) /* Transmitter SIR Enable */
#endif /* __ASM_ARCH_REGS_UART_H */

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arch/arm/mach-pxa/saar.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-pxa/saar.c
*
* Support for the Marvell PXA930 Handheld Platform (aka SAAR)
*
* Copyright (C) 2007-2008 Marvell International Ltd.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/fb.h>
#include <linux/i2c.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/smc91x.h>
#include <linux/mfd/da903x.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/onenand.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include "pxa930.h"
#include <linux/platform_data/video-pxafb.h>
#include "devices.h"
#include "generic.h"
#define GPIO_LCD_RESET (16)
/* SAAR MFP configurations */
static mfp_cfg_t saar_mfp_cfg[] __initdata = {
/* LCD */
GPIO23_LCD_DD0,
GPIO24_LCD_DD1,
GPIO25_LCD_DD2,
GPIO26_LCD_DD3,
GPIO27_LCD_DD4,
GPIO28_LCD_DD5,
GPIO29_LCD_DD6,
GPIO44_LCD_DD7,
GPIO21_LCD_CS,
GPIO22_LCD_VSYNC,
GPIO17_LCD_FCLK_RD,
GPIO18_LCD_LCLK_A0,
GPIO19_LCD_PCLK_WR,
GPIO16_GPIO, /* LCD reset */
/* Ethernet */
DF_nCS1_nCS3,
GPIO97_GPIO,
/* DFI */
DF_INT_RnB_ND_INT_RnB,
DF_nRE_nOE_ND_nRE,
DF_nWE_ND_nWE,
DF_CLE_nOE_ND_CLE,
DF_nADV1_ALE_ND_ALE,
DF_nADV2_ALE_nCS3,
DF_nCS0_ND_nCS0,
DF_IO0_ND_IO0,
DF_IO1_ND_IO1,
DF_IO2_ND_IO2,
DF_IO3_ND_IO3,
DF_IO4_ND_IO4,
DF_IO5_ND_IO5,
DF_IO6_ND_IO6,
DF_IO7_ND_IO7,
DF_IO8_ND_IO8,
DF_IO9_ND_IO9,
DF_IO10_ND_IO10,
DF_IO11_ND_IO11,
DF_IO12_ND_IO12,
DF_IO13_ND_IO13,
DF_IO14_ND_IO14,
DF_IO15_ND_IO15,
};
#define SAAR_ETH_PHYS (0x14000000)
static struct resource smc91x_resources[] = {
[0] = {
.start = (SAAR_ETH_PHYS + 0x300),
.end = (SAAR_ETH_PHYS + 0xfffff),
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
.end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
}
};
static struct smc91x_platdata saar_smc91x_info = {
.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_USE_DMA,
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
.dev = {
.platform_data = &saar_smc91x_info,
},
};
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static uint16_t lcd_power_on[] = {
/* single frame */
SMART_CMD_NOOP,
SMART_CMD(0x00),
SMART_DELAY(0),
SMART_CMD_NOOP,
SMART_CMD(0x00),
SMART_DELAY(0),
SMART_CMD_NOOP,
SMART_CMD(0x00),
SMART_DELAY(0),
SMART_CMD_NOOP,
SMART_CMD(0x00),
SMART_DELAY(10),
/* calibration control */
SMART_CMD(0x00),
SMART_CMD(0xA4),
SMART_DAT(0x80),
SMART_DAT(0x01),
SMART_DELAY(150),
/*Power-On Init sequence*/
SMART_CMD(0x00), /* output ctrl */
SMART_CMD(0x01),
SMART_DAT(0x01),
SMART_DAT(0x00),
SMART_CMD(0x00), /* wave ctrl */
SMART_CMD(0x02),
SMART_DAT(0x07),
SMART_DAT(0x00),
SMART_CMD(0x00),
SMART_CMD(0x03), /* entry mode */
SMART_DAT(0xD0),
SMART_DAT(0x30),
SMART_CMD(0x00),
SMART_CMD(0x08), /* display ctrl 2 */
SMART_DAT(0x08),
SMART_DAT(0x08),
SMART_CMD(0x00),
SMART_CMD(0x09), /* display ctrl 3 */
SMART_DAT(0x04),
SMART_DAT(0x2F),
SMART_CMD(0x00),
SMART_CMD(0x0A), /* display ctrl 4 */
SMART_DAT(0x00),
SMART_DAT(0x08),
SMART_CMD(0x00),
SMART_CMD(0x0D), /* Frame Marker position */
SMART_DAT(0x00),
SMART_DAT(0x08),
SMART_CMD(0x00),
SMART_CMD(0x60), /* Driver output control */
SMART_DAT(0x27),
SMART_DAT(0x00),
SMART_CMD(0x00),
SMART_CMD(0x61), /* Base image display control */
SMART_DAT(0x00),
SMART_DAT(0x01),
SMART_CMD(0x00),
SMART_CMD(0x30), /* Y settings 30h-3Dh */
SMART_DAT(0x07),
SMART_DAT(0x07),
SMART_CMD(0x00),
SMART_CMD(0x31),
SMART_DAT(0x00),
SMART_DAT(0x07),
SMART_CMD(0x00),
SMART_CMD(0x32), /* Timing(3), ASW HOLD=0.5CLK */
SMART_DAT(0x04),
SMART_DAT(0x00),
SMART_CMD(0x00),
SMART_CMD(0x33), /* Timing(4), CKV ST=0CLK, CKV ED=1CLK */
SMART_DAT(0x03),
SMART_DAT(0x03),
SMART_CMD(0x00),
SMART_CMD(0x34),
SMART_DAT(0x00),
SMART_DAT(0x00),
SMART_CMD(0x00),
SMART_CMD(0x35),
SMART_DAT(0x02),
SMART_DAT(0x05),
SMART_CMD(0x00),
SMART_CMD(0x36),
SMART_DAT(0x1F),
SMART_DAT(0x1F),
SMART_CMD(0x00),
SMART_CMD(0x37),
SMART_DAT(0x07),
SMART_DAT(0x07),
SMART_CMD(0x00),
SMART_CMD(0x38),
SMART_DAT(0x00),
SMART_DAT(0x07),
SMART_CMD(0x00),
SMART_CMD(0x39),
SMART_DAT(0x04),
SMART_DAT(0x00),
SMART_CMD(0x00),
SMART_CMD(0x3A),
SMART_DAT(0x03),
SMART_DAT(0x03),
SMART_CMD(0x00),
SMART_CMD(0x3B),
SMART_DAT(0x00),
SMART_DAT(0x00),
SMART_CMD(0x00),
SMART_CMD(0x3C),
SMART_DAT(0x02),
SMART_DAT(0x05),
SMART_CMD(0x00),
SMART_CMD(0x3D),
SMART_DAT(0x1F),
SMART_DAT(0x1F),
SMART_CMD(0x00), /* Display control 1 */
SMART_CMD(0x07),
SMART_DAT(0x00),
SMART_DAT(0x01),
SMART_CMD(0x00), /* Power control 5 */
SMART_CMD(0x17),
SMART_DAT(0x00),
SMART_DAT(0x01),
SMART_CMD(0x00), /* Power control 1 */
SMART_CMD(0x10),
SMART_DAT(0x10),
SMART_DAT(0xB0),
SMART_CMD(0x00), /* Power control 2 */
SMART_CMD(0x11),
SMART_DAT(0x01),
SMART_DAT(0x30),
SMART_CMD(0x00), /* Power control 3 */
SMART_CMD(0x12),
SMART_DAT(0x01),
SMART_DAT(0x9E),
SMART_CMD(0x00), /* Power control 4 */
SMART_CMD(0x13),
SMART_DAT(0x17),
SMART_DAT(0x00),
SMART_CMD(0x00), /* Power control 3 */
SMART_CMD(0x12),
SMART_DAT(0x01),
SMART_DAT(0xBE),
SMART_DELAY(100),
/* display mode : 240*320 */
SMART_CMD(0x00), /* RAM address set(H) 0*/
SMART_CMD(0x20),
SMART_DAT(0x00),
SMART_DAT(0x00),
SMART_CMD(0x00), /* RAM address set(V) 4*/
SMART_CMD(0x21),
SMART_DAT(0x00),
SMART_DAT(0x00),
SMART_CMD(0x00), /* Start of Window RAM address set(H) 8*/
SMART_CMD(0x50),
SMART_DAT(0x00),
SMART_DAT(0x00),
SMART_CMD(0x00), /* End of Window RAM address set(H) 12*/
SMART_CMD(0x51),
SMART_DAT(0x00),
SMART_DAT(0xEF),
SMART_CMD(0x00), /* Start of Window RAM address set(V) 16*/
SMART_CMD(0x52),
SMART_DAT(0x00),
SMART_DAT(0x00),
SMART_CMD(0x00), /* End of Window RAM address set(V) 20*/
SMART_CMD(0x53),
SMART_DAT(0x01),
SMART_DAT(0x3F),
SMART_CMD(0x00), /* Panel interface control 1 */
SMART_CMD(0x90),
SMART_DAT(0x00),
SMART_DAT(0x1A),
SMART_CMD(0x00), /* Panel interface control 2 */
SMART_CMD(0x92),
SMART_DAT(0x04),
SMART_DAT(0x00),
SMART_CMD(0x00), /* Panel interface control 3 */
SMART_CMD(0x93),
SMART_DAT(0x00),
SMART_DAT(0x05),
SMART_DELAY(20),
};
static uint16_t lcd_panel_on[] = {
SMART_CMD(0x00),
SMART_CMD(0x07),
SMART_DAT(0x00),
SMART_DAT(0x21),
SMART_DELAY(1),
SMART_CMD(0x00),
SMART_CMD(0x07),
SMART_DAT(0x00),
SMART_DAT(0x61),
SMART_DELAY(100),
SMART_CMD(0x00),
SMART_CMD(0x07),
SMART_DAT(0x01),
SMART_DAT(0x73),
SMART_DELAY(1),
};
static uint16_t lcd_panel_off[] = {
SMART_CMD(0x00),
SMART_CMD(0x07),
SMART_DAT(0x00),
SMART_DAT(0x72),
SMART_DELAY(40),
SMART_CMD(0x00),
SMART_CMD(0x07),
SMART_DAT(0x00),
SMART_DAT(0x01),
SMART_DELAY(1),
SMART_CMD(0x00),
SMART_CMD(0x07),
SMART_DAT(0x00),
SMART_DAT(0x00),
SMART_DELAY(1),
};
static uint16_t lcd_power_off[] = {
SMART_CMD(0x00),
SMART_CMD(0x10),
SMART_DAT(0x00),
SMART_DAT(0x80),
SMART_CMD(0x00),
SMART_CMD(0x11),
SMART_DAT(0x01),
SMART_DAT(0x60),
SMART_CMD(0x00),
SMART_CMD(0x12),
SMART_DAT(0x01),
SMART_DAT(0xAE),
SMART_DELAY(40),
SMART_CMD(0x00),
SMART_CMD(0x10),
SMART_DAT(0x00),
SMART_DAT(0x00),
};
static uint16_t update_framedata[] = {
/* set display ram: 240*320 */
SMART_CMD(0x00), /* RAM address set(H) 0*/
SMART_CMD(0x20),
SMART_DAT(0x00),
SMART_DAT(0x00),
SMART_CMD(0x00), /* RAM address set(V) 4*/
SMART_CMD(0x21),
SMART_DAT(0x00),
SMART_DAT(0x00),
SMART_CMD(0x00), /* Start of Window RAM address set(H) 8 */
SMART_CMD(0x50),
SMART_DAT(0x00),
SMART_DAT(0x00),
SMART_CMD(0x00), /* End of Window RAM address set(H) 12 */
SMART_CMD(0x51),
SMART_DAT(0x00),
SMART_DAT(0xEF),
SMART_CMD(0x00), /* Start of Window RAM address set(V) 16 */
SMART_CMD(0x52),
SMART_DAT(0x00),
SMART_DAT(0x00),
SMART_CMD(0x00), /* End of Window RAM address set(V) 20 */
SMART_CMD(0x53),
SMART_DAT(0x01),
SMART_DAT(0x3F),
/* wait for vsync cmd before transferring frame data */
SMART_CMD_WAIT_FOR_VSYNC,
/* write ram */
SMART_CMD(0x00),
SMART_CMD(0x22),
/* write frame data */
SMART_CMD_WRITE_FRAME,
};
static void ltm022a97a_lcd_power(int on, struct fb_var_screeninfo *var)
{
static int pin_requested = 0;
struct fb_info *info = container_of(var, struct fb_info, var);
int err;
if (!pin_requested) {
err = gpio_request(GPIO_LCD_RESET, "lcd reset");
if (err) {
pr_err("failed to request gpio for LCD reset\n");
return;
}
gpio_direction_output(GPIO_LCD_RESET, 0);
pin_requested = 1;
}
if (on) {
gpio_set_value(GPIO_LCD_RESET, 0); msleep(100);
gpio_set_value(GPIO_LCD_RESET, 1); msleep(10);
pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_power_on));
pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_panel_on));
} else {
pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_panel_off));
pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_power_off));
}
err = pxafb_smart_flush(info);
if (err)
pr_err("%s: timed out\n", __func__);
}
static void ltm022a97a_update(struct fb_info *info)
{
pxafb_smart_queue(info, ARRAY_AND_SIZE(update_framedata));
pxafb_smart_flush(info);
}
static struct pxafb_mode_info toshiba_ltm022a97a_modes[] = {
[0] = {
.xres = 240,
.yres = 320,
.bpp = 16,
.a0csrd_set_hld = 30,
.a0cswr_set_hld = 30,
.wr_pulse_width = 30,
.rd_pulse_width = 30,
.op_hold_time = 30,
.cmd_inh_time = 60,
/* L_LCLK_A0 and L_LCLK_RD active low */
.sync = FB_SYNC_HOR_HIGH_ACT |
FB_SYNC_VERT_HIGH_ACT,
},
};
static struct pxafb_mach_info saar_lcd_info = {
.modes = toshiba_ltm022a97a_modes,
.num_modes = 1,
.lcd_conn = LCD_SMART_PANEL_8BPP | LCD_PCLK_EDGE_FALL,
.pxafb_lcd_power = ltm022a97a_lcd_power,
.smart_update = ltm022a97a_update,
};
static void __init saar_init_lcd(void)
{
pxa_set_fb_info(NULL, &saar_lcd_info);
}
#else
static inline void saar_init_lcd(void) {}
#endif
#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
static struct da9034_backlight_pdata saar_da9034_backlight = {
.output_current = 4, /* 4mA */
};
static struct da903x_subdev_info saar_da9034_subdevs[] = {
[0] = {
.name = "da903x-backlight",
.id = DA9034_ID_WLED,
.platform_data = &saar_da9034_backlight,
},
};
static struct da903x_platform_data saar_da9034_info = {
.num_subdevs = ARRAY_SIZE(saar_da9034_subdevs),
.subdevs = saar_da9034_subdevs,
};
static struct i2c_board_info saar_i2c_info[] = {
[0] = {
.type = "da9034",
.addr = 0x34,
.platform_data = &saar_da9034_info,
.irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
},
};
static void __init saar_init_i2c(void)
{
pxa_set_i2c_info(NULL);
i2c_register_board_info(0, ARRAY_AND_SIZE(saar_i2c_info));
}
#else
static inline void saar_init_i2c(void) {}
#endif
#if defined(CONFIG_MTD_ONENAND) || defined(CONFIG_MTD_ONENAND_MODULE)
static struct mtd_partition saar_onenand_partitions[] = {
{
.name = "bootloader",
.offset = 0,
.size = SZ_1M,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "reserved",
.offset = MTDPART_OFS_APPEND,
.size = SZ_128K,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "reserved",
.offset = MTDPART_OFS_APPEND,
.size = SZ_8M,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = (SZ_2M + SZ_1M),
.mask_flags = 0,
}, {
.name = "filesystem",
.offset = MTDPART_OFS_APPEND,
.size = SZ_32M + SZ_16M,
.mask_flags = 0,
}
};
static struct onenand_platform_data saar_onenand_info = {
.parts = saar_onenand_partitions,
.nr_parts = ARRAY_SIZE(saar_onenand_partitions),
};
#define SMC_CS0_PHYS_BASE (0x10000000)
static struct resource saar_resource_onenand[] = {
[0] = {
.start = SMC_CS0_PHYS_BASE,
.end = SMC_CS0_PHYS_BASE + SZ_1M,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device saar_device_onenand = {
.name = "onenand-flash",
.id = -1,
.dev = {
.platform_data = &saar_onenand_info,
},
.resource = saar_resource_onenand,
.num_resources = ARRAY_SIZE(saar_resource_onenand),
};
static void __init saar_init_onenand(void)
{
platform_device_register(&saar_device_onenand);
}
#else
static void __init saar_init_onenand(void) {}
#endif
static void __init saar_init(void)
{
/* initialize MFP configurations */
pxa3xx_mfp_config(ARRAY_AND_SIZE(saar_mfp_cfg));
pxa_set_ffuart_info(NULL);
pxa_set_btuart_info(NULL);
pxa_set_stuart_info(NULL);
platform_device_register(&smc91x_device);
saar_init_onenand();
saar_init_i2c();
saar_init_lcd();
}
MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
/* Maintainer: Eric Miao <eric.miao@marvell.com> */
.atag_offset = 0x100,
.map_io = pxa3xx_map_io,
.nr_irqs = PXA_NR_IRQS,
.init_irq = pxa3xx_init_irq,
.handle_irq = pxa3xx_handle_irq,
.init_time = pxa_timer_init,
.init_machine = saar_init,
.restart = pxa_restart,
MACHINE_END

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