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staging: brcm80211: remove redundant CHIPID macro

Browse Source 
The CHIPID macro simply expands to the macro argument so it is
redundant and as such removed.

Reviewed-by: Roland Vossen <rvossen@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Arend van Spriel 2010-12-02 15:44:51 +01:00 committed by Greg Kroah-Hartman
parent 92246bcbd7
commit dfa2643610
10 changed files with 110 additions and 111 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/staging/brcm80211/include/bcmdefs.h
View File

@ -51,7 +51,6 @@
#define SPI_BUS 6 /* gSPI target */
#define RPC_BUS 7 /* RPC target */
#define CHIPID(chip) (chip)
#define CHIPREV(rev) (rev)
/* Defines for DMA Address Width - Shared between OSL and HNDDMA */

18
drivers/staging/brcm80211/phy/wlc_phy_cmn.c
View File

@ -1085,8 +1085,8 @@ wlc_phy_table_addr(phy_info_t *pi, uint tbl_id, uint tbl_offset,
pi->tbl_data_hi = tblDataHi;
pi->tbl_data_lo = tblDataLo;
if ((CHIPID(pi->sh->chip) == BCM43224_CHIP_ID ||
CHIPID(pi->sh->chip) == BCM43421_CHIP_ID) &&
if ((pi->sh->chip == BCM43224_CHIP_ID ||
pi->sh->chip == BCM43421_CHIP_ID) &&
(pi->sh->chiprev == 1)) {
pi->tbl_addr = tblAddr;
pi->tbl_save_id = tbl_id;
@ -1098,8 +1098,8 @@ void wlc_phy_table_data_write(phy_info_t *pi, uint width, u32 val)
{
ASSERT((width == 8) || (width == 16) || (width == 32));
if ((CHIPID(pi->sh->chip) == BCM43224_CHIP_ID ||
CHIPID(pi->sh->chip) == BCM43421_CHIP_ID) &&
if ((pi->sh->chip == BCM43224_CHIP_ID ||
pi->sh->chip == BCM43421_CHIP_ID) &&
(pi->sh->chiprev == 1) &&
(pi->tbl_save_id == NPHY_TBL_ID_ANTSWCTRLLUT)) {
read_phy_reg(pi, pi->tbl_data_lo);
@ -1137,8 +1137,8 @@ wlc_phy_write_table(phy_info_t *pi, const phytbl_info_t *ptbl_info,
for (idx = 0; idx < ptbl_info->tbl_len; idx++) {
if ((CHIPID(pi->sh->chip) == BCM43224_CHIP_ID ||
CHIPID(pi->sh->chip) == BCM43421_CHIP_ID) &&
if ((pi->sh->chip == BCM43224_CHIP_ID ||
pi->sh->chip == BCM43421_CHIP_ID) &&
(pi->sh->chiprev == 1) &&
(tbl_id == NPHY_TBL_ID_ANTSWCTRLLUT)) {
read_phy_reg(pi, tblDataLo);
@ -1180,8 +1180,8 @@ wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info,
for (idx = 0; idx < ptbl_info->tbl_len; idx++) {
if ((CHIPID(pi->sh->chip) == BCM43224_CHIP_ID ||
CHIPID(pi->sh->chip) == BCM43421_CHIP_ID) &&
if ((pi->sh->chip == BCM43224_CHIP_ID ||
pi->sh->chip == BCM43421_CHIP_ID) &&
(pi->sh->chiprev == 1)) {
(void)read_phy_reg(pi, tblDataLo);
@ -3330,7 +3330,7 @@ const u8 *wlc_phy_get_ofdm_rate_lookup(void)
void wlc_lcnphy_epa_switch(phy_info_t *pi, bool mode)
{
if ((CHIPID(pi->sh->chip) == BCM4313_CHIP_ID) &&
if ((pi->sh->chip == BCM4313_CHIP_ID) &&
(pi->sh->boardflags & BFL_FEM)) {
if (mode) {
u16 txant = 0;

52
drivers/staging/brcm80211/phy/wlc_phy_n.c
View File

@ -14559,7 +14559,7 @@ void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi)
}
}
if ((!PHY_IPA(pi)) && (CHIPID(pi->sh->chip) == BCM5357_CHIP_ID)) {
if ((!PHY_IPA(pi)) && (pi->sh->chip == BCM5357_CHIP_ID)) {
si_pmu_chipcontrol(pi->sh->sih, 1, CCTRL5357_EXTPA,
CCTRL5357_EXTPA);
}
@ -17604,7 +17604,7 @@ static void wlc_phy_radio_postinit_2057(phy_info_t *pi)
mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x1, 0x1);
if (CHIPID(pi->sh->chip) == !BCM6362_CHIP_ID) {
if (pi->sh->chip == !BCM6362_CHIP_ID) {
mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x2, 0x2);
}
@ -18012,8 +18012,8 @@ wlc_phy_chanspec_radio2056_setup(phy_info_t *pi,
write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 |
RADIO_2056_SYN, 0x1f);
if ((CHIPID(pi->sh->chip) == BCM4716_CHIP_ID) ||
(CHIPID(pi->sh->chip) == BCM47162_CHIP_ID)) {
if ((pi->sh->chip == BCM4716_CHIP_ID) ||
(pi->sh->chip == BCM47162_CHIP_ID)) {
write_radio_reg(pi,
RADIO_2056_SYN_PLL_LOOPFILTER4 |
@ -18075,8 +18075,8 @@ wlc_phy_chanspec_radio2056_setup(phy_info_t *pi,
WRITE_RADIO_REG2(pi, RADIO_2056, TX, core,
PADG_IDAC, 0xcc);
if ((CHIPID(pi->sh->chip) == BCM4716_CHIP_ID) ||
(CHIPID(pi->sh->chip) ==
if ((pi->sh->chip == BCM4716_CHIP_ID) ||
(pi->sh->chip ==
BCM47162_CHIP_ID)) {
bias = 0x40;
cascbias = 0x45;
@ -18088,11 +18088,11 @@ wlc_phy_chanspec_radio2056_setup(phy_info_t *pi,
bias = 0x25;
cascbias = 0x20;
if ((CHIPID(pi->sh->chip) ==
if ((pi->sh->chip ==
BCM43224_CHIP_ID)
|| (CHIPID(pi->sh->chip) ==
|| (pi->sh->chip ==
BCM43225_CHIP_ID)
|| (CHIPID(pi->sh->chip) ==
|| (pi->sh->chip ==
BCM43421_CHIP_ID)) {
if (pi->sh->chippkg ==
BCM43224_FAB_SMIC) {
@ -18203,9 +18203,9 @@ wlc_phy_chanspec_radio2056_setup(phy_info_t *pi,
cascbias = 0x30;
if ((CHIPID(pi->sh->chip) == BCM43224_CHIP_ID) ||
(CHIPID(pi->sh->chip) == BCM43225_CHIP_ID) ||
(CHIPID(pi->sh->chip) == BCM43421_CHIP_ID)) {
if ((pi->sh->chip == BCM43224_CHIP_ID) ||
(pi->sh->chip == BCM43225_CHIP_ID) ||
(pi->sh->chip == BCM43421_CHIP_ID)) {
if (pi->sh->chippkg == BCM43224_FAB_SMIC) {
cascbias = 0x35;
}
@ -18932,7 +18932,7 @@ static void wlc_phy_spurwar_nphy(phy_info_t *pi)
case 38:
case 102:
case 118:
if ((CHIPID(pi->sh->chip) == BCM4716_CHIP_ID) &&
if ((pi->sh->chip == BCM4716_CHIP_ID) &&
(pi->sh->chippkg == BCM4717_PKG_ID)) {
nphy_adj_tone_id_buf[0] = 32;
nphy_adj_noise_var_buf[0] = 0x21f;
@ -19067,7 +19067,7 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec,
if (pi->nphy_aband_spurwar_en &&
((val == 38) || (val == 102)
|| (val == 118))) {
if ((CHIPID(pi->sh->chip) ==
if ((pi->sh->chip ==
BCM4716_CHIP_ID)
&& (pi->sh->chippkg ==
BCM4717_PKG_ID)) {
@ -19082,8 +19082,8 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec,
if (pi->phy_spuravoid == SPURAVOID_FORCEON)
spuravoid = 1;
if ((CHIPID(pi->sh->chip) == BCM4716_CHIP_ID) ||
(CHIPID(pi->sh->chip) == BCM47162_CHIP_ID)) {
if ((pi->sh->chip == BCM4716_CHIP_ID) ||
(pi->sh->chip == BCM47162_CHIP_ID)) {
si_pmu_spuravoid(pi->sh->sih, pi->sh->osh, spuravoid);
} else {
wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false);
@ -19091,9 +19091,9 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec,
wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true);
}
if ((CHIPID(pi->sh->chip) == BCM43224_CHIP_ID) ||
(CHIPID(pi->sh->chip) == BCM43225_CHIP_ID) ||
(CHIPID(pi->sh->chip) == BCM43421_CHIP_ID)) {
if ((pi->sh->chip == BCM43224_CHIP_ID) ||
(pi->sh->chip == BCM43225_CHIP_ID) ||
(pi->sh->chip == BCM43421_CHIP_ID)) {
if (spuravoid == 1) {
@ -19110,8 +19110,8 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec,
}
}
if (!((CHIPID(pi->sh->chip) == BCM4716_CHIP_ID) ||
(CHIPID(pi->sh->chip) == BCM47162_CHIP_ID))) {
if (!((pi->sh->chip == BCM4716_CHIP_ID) ||
(pi->sh->chip == BCM47162_CHIP_ID))) {
wlapi_bmac_core_phypll_reset(pi->sh->physhim);
}
@ -21067,11 +21067,11 @@ s16 wlc_phy_tempsense_nphy(phy_info_t *pi)
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16,
&auxADC_rssi_ctrlH_save);
if (CHIPID(pi->sh->chip) == BCM5357_CHIP_ID) {
if (pi->sh->chip == BCM5357_CHIP_ID) {
radio_temp[0] = (193 * (radio_temp[1] + radio_temp2[1])
+ 88 * (auxADC_Vl) - 27111 +
128) / 256;
} else if (CHIPID(pi->sh->chip) == BCM43236_CHIP_ID) {
} else if (pi->sh->chip == BCM43236_CHIP_ID) {
radio_temp[0] = (198 * (radio_temp[1] + radio_temp2[1])
+ 91 * (auxADC_Vl) - 27243 +
128) / 256;
@ -26282,7 +26282,7 @@ static u32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi)
} else if (NREV_IS(pi->pubpi.phy_rev, 6)) {
tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev6;
if (CHIPID(pi->sh->chip) == BCM47162_CHIP_ID) {
if (pi->sh->chip == BCM47162_CHIP_ID) {
tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5;
}
@ -26838,7 +26838,7 @@ wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains,
phy_a2 = 63;
if (CHSPEC_IS2G(pi->radio_chanspec)) {
if (CHIPID(pi->sh->chip) == BCM6362_CHIP_ID) {
if (pi->sh->chip == BCM6362_CHIP_ID) {
phy_a1 = 35;
phy_a3 = 35;
} else if ((pi->pubpi.radiorev == 4)
@ -26951,7 +26951,7 @@ wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains,
if (NREV_GE(pi->pubpi.phy_rev, 6)) {
phy_a5 = 0x00f7 | (phy_a4 << 8);
if (CHIPID(pi->sh->chip) ==
if (pi->sh->chip ==
BCM47162_CHIP_ID) {
phy_a5 =
0x10f7 | (phy_a4 <<

24
drivers/staging/brcm80211/sys/wlc_bmac.c
View File

@ -407,8 +407,8 @@ bool BCMFASTPATH wlc_dpc(wlc_info_t *wlc, bool bounded)
WL_ERROR(("wl%d: PSM microcode watchdog fired at %d (seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now));
printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
__func__, CHIPID(wlc_hw->sih->chip),
CHIPREV(wlc_hw->sih->chiprev));
__func__, wlc_hw->sih->chip,
CHIPREV(wlc_hw->sih->chiprev));
WLCNTINCR(wlc->pub->_cnt->psmwds);
@ -842,7 +842,7 @@ int wlc_bmac_attach(wlc_info_t *wlc, u16 vendor, u16 device, uint unit,
} else
wlc_hw->_nbands = 1;
if ((CHIPID(wlc_hw->sih->chip) == BCM43225_CHIP_ID))
if ((wlc_hw->sih->chip == BCM43225_CHIP_ID))
wlc_hw->_nbands = 1;
/* BMAC_NOTE: remove init of pub values when wlc_attach() unconditionally does the
@ -2224,9 +2224,9 @@ bool wlc_bmac_radio_read_hwdisabled(wlc_hw_info_t *wlc_hw)
flags |= SICF_PCLKE;
/* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */
if ((CHIPID(wlc_hw->sih->chip) == BCM43224_CHIP_ID) ||
(CHIPID(wlc_hw->sih->chip) == BCM43225_CHIP_ID) ||
(CHIPID(wlc_hw->sih->chip) == BCM43421_CHIP_ID))
if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
(wlc_hw->sih->chip == BCM43225_CHIP_ID) ||
(wlc_hw->sih->chip == BCM43421_CHIP_ID))
wlc_hw->regs =
(d11regs_t *) si_setcore(wlc_hw->sih, D11_CORE_ID,
0);
@ -2266,9 +2266,9 @@ void wlc_bmac_hw_up(wlc_hw_info_t *wlc_hw)
si_pci_fixcfg(wlc_hw->sih);
/* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */
if ((CHIPID(wlc_hw->sih->chip) == BCM43224_CHIP_ID) ||
(CHIPID(wlc_hw->sih->chip) == BCM43225_CHIP_ID) ||
(CHIPID(wlc_hw->sih->chip) == BCM43421_CHIP_ID))
if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
(wlc_hw->sih->chip == BCM43225_CHIP_ID) ||
(wlc_hw->sih->chip == BCM43421_CHIP_ID))
wlc_hw->regs =
(d11regs_t *) si_setcore(wlc_hw->sih, D11_CORE_ID,
0);
@ -2281,7 +2281,7 @@ void wlc_bmac_hw_up(wlc_hw_info_t *wlc_hw)
wlc_hw->wlc->pub->hw_up = true;
if ((wlc_hw->boardflags & BFL_FEM)
&& (CHIPID(wlc_hw->sih->chip) == BCM4313_CHIP_ID)) {
&& (wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
if (!
(wlc_hw->boardrev >= 0x1250
&& (wlc_hw->boardflags & BFL_FEM_BT)))
@ -2689,8 +2689,8 @@ void wlc_bmac_switch_macfreq(wlc_hw_info_t *wlc_hw, u8 spurmode)
regs = wlc_hw->regs;
osh = wlc_hw->osh;
if ((CHIPID(wlc_hw->sih->chip) == BCM43224_CHIP_ID) ||
(CHIPID(wlc_hw->sih->chip) == BCM43225_CHIP_ID)) {
if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
(wlc_hw->sih->chip == BCM43225_CHIP_ID)) {
if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */
W_REG(osh, &regs->tsf_clk_frac_l, 0x2082);
W_REG(osh, &regs->tsf_clk_frac_h, 0x8);

8
drivers/staging/brcm80211/sys/wlc_mac80211.c
View File

@ -1991,7 +1991,7 @@ void *wlc_attach(void *wl, u16 vendor, u16 device, uint unit, bool piomode,
wlc_radio_mpc_upd(wlc);
if (WLANTSEL_ENAB(wlc)) {
if ((CHIPID(wlc->pub->sih->chip)) == BCM43235_CHIP_ID) {
if ((wlc->pub->sih->chip) == BCM43235_CHIP_ID) {
if ((getintvar(wlc->pub->vars, "aa2g") == 7) ||
(getintvar(wlc->pub->vars, "aa5g") == 7)) {
wlc_bmac_antsel_set(wlc->hw, 1);
@ -2537,7 +2537,7 @@ int wlc_up(wlc_info_t *wlc)
}
if ((wlc->pub->boardflags & BFL_FEM)
&& (CHIPID(wlc->pub->sih->chip) == BCM4313_CHIP_ID)) {
&& (wlc->pub->sih->chip == BCM4313_CHIP_ID)) {
if (wlc->pub->boardrev >= 0x1250
&& (wlc->pub->boardflags & BFL_FEM_BT)) {
wlc_mhf(wlc, MHF5, MHF5_4313_GPIOCTRL,
@ -6427,8 +6427,8 @@ void wlc_high_dpc(wlc_info_t *wlc, u32 macintstatus)
WL_ERROR(("wl%d: PSM microcode watchdog fired at %d (seconds). Resetting.\n", wlc->pub->unit, wlc->pub->now));
printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
__func__, CHIPID(wlc->pub->sih->chip),
CHIPREV(wlc->pub->sih->chiprev));
__func__, wlc->pub->sih->chip,
CHIPREV(wlc->pub->sih->chiprev));
WLCNTINCR(wlc->pub->_cnt->psmwds);

2
drivers/staging/brcm80211/util/aiutils.c
View File

@ -31,7 +31,7 @@
#include <pcicfg.h>
#include <bcmdevs.h>
#define BCM47162_DMP() ((CHIPID(sih->chip) == BCM47162_CHIP_ID) && \
#define BCM47162_DMP() ((sih->chip == BCM47162_CHIP_ID) && \
(CHIPREV(sih->chiprev) == 0) && \
(sii->coreid[sii->curidx] == MIPS74K_CORE_ID))

6
drivers/staging/brcm80211/util/bcmotp.c
View File

@ -223,7 +223,7 @@ static int ipxotp_max_rgnsz(si_t *sih, int osizew)
{
int ret = 0;
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM43224_CHIP_ID:
case BCM43225_CHIP_ID:
ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM;
@ -273,8 +273,8 @@ static void _ipxotp_init(otpinfo_t *oi, chipcregs_t *cc)
/* Read OTP lock bits and subregion programmed indication bits */
oi->status = R_REG(oi->osh, &cc->otpstatus);
if ((CHIPID(oi->sih->chip) == BCM43224_CHIP_ID)
|| (CHIPID(oi->sih->chip) == BCM43225_CHIP_ID)) {
if ((oi->sih->chip == BCM43224_CHIP_ID)
|| (oi->sih->chip == BCM43225_CHIP_ID)) {
u32 p_bits;
p_bits =
(ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_P_OFF) &

86
drivers/staging/brcm80211/util/hndpmu.c
View File

@ -136,7 +136,7 @@ void si_pmu_set_ldo_voltage(si_t *sih, struct osl_info *osh, u8 ldo, u8 voltage)
ASSERT(sih->cccaps & CC_CAP_PMU);
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4336_CHIP_ID:
switch (ldo) {
case SET_LDO_VOLTAGE_CLDO_PWM:
@ -204,7 +204,7 @@ u16 si_pmu_fast_pwrup_delay(si_t *sih, struct osl_info *osh)
cc = si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc != NULL);
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM43224_CHIP_ID:
case BCM43225_CHIP_ID:
case BCM43421_CHIP_ID:
@ -604,7 +604,7 @@ static void si_pmu_res_masks(si_t *sih, u32 * pmin, u32 * pmax)
rsrcs = (sih->pmucaps & PCAP_RC_MASK) >> PCAP_RC_SHIFT;
/* determine min/max rsrc masks */
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM43224_CHIP_ID:
case BCM43225_CHIP_ID:
case BCM43421_CHIP_ID:
@ -701,7 +701,7 @@ void si_pmu_res_init(si_t *sih, struct osl_info *osh)
cc = si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc != NULL);
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4329_CHIP_ID:
/* Optimize resources up/down timers */
if (ISSIM_ENAB(sih)) {
@ -1100,7 +1100,7 @@ static const pmu1_xtaltab0_t *si_pmu1_xtaltab0(si_t *sih)
#ifdef BCMDBG
char chn[8];
#endif
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4329_CHIP_ID:
return pmu1_xtaltab0_880_4329;
case BCM4319_CHIP_ID:
@ -1128,7 +1128,7 @@ static const pmu1_xtaltab0_t *si_pmu1_xtaldef0(si_t *sih)
char chn[8];
#endif
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4329_CHIP_ID:
/* Default to 38400Khz */
return &pmu1_xtaltab0_880_4329[PMU1_XTALTAB0_880_38400K];
@ -1160,7 +1160,7 @@ static u32 si_pmu1_pllfvco0(si_t *sih)
char chn[8];
#endif
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4329_CHIP_ID:
return FVCO_880;
case BCM4319_CHIP_ID:
@ -1239,8 +1239,8 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
*/
if ((((R_REG(osh, &cc->pmucontrol) & PCTL_XTALFREQ_MASK) >>
PCTL_XTALFREQ_SHIFT) == xt->xf) &&
!((CHIPID(sih->chip) == BCM4319_CHIP_ID)
|| (CHIPID(sih->chip) == BCM4330_CHIP_ID))) {
!((sih->chip == BCM4319_CHIP_ID)
|| (sih->chip == BCM4330_CHIP_ID))) {
PMU_MSG(("PLL already programmed for %d.%d MHz\n",
xt->fref / 1000, xt->fref % 1000));
return;
@ -1250,7 +1250,7 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
PMU_MSG(("Programming PLL for %d.%d MHz\n", xt->fref / 1000,
xt->fref % 1000));
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4329_CHIP_ID:
/* Change the BBPLL drive strength to 8 for all channels */
buf_strength = 0x888888;
@ -1357,10 +1357,10 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
p2div << PMU1_PLL0_PC0_P2DIV_SHIFT) & PMU1_PLL0_PC0_P2DIV_MASK);
W_REG(osh, &cc->pllcontrol_data, tmp);
if ((CHIPID(sih->chip) == BCM4330_CHIP_ID))
if ((sih->chip == BCM4330_CHIP_ID))
si_pmu_set_4330_plldivs(sih);
if ((CHIPID(sih->chip) == BCM4329_CHIP_ID)
if ((sih->chip == BCM4329_CHIP_ID)
&& (CHIPREV(sih->chiprev) == 0)) {
W_REG(osh, &cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1);
@ -1369,9 +1369,9 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
tmp = tmp | DOT11MAC_880MHZ_CLK_DIVISOR_VAL;
W_REG(osh, &cc->pllcontrol_data, tmp);
}
if ((CHIPID(sih->chip) == BCM4319_CHIP_ID) ||
(CHIPID(sih->chip) == BCM4336_CHIP_ID) ||
(CHIPID(sih->chip) == BCM4330_CHIP_ID))
if ((sih->chip == BCM4319_CHIP_ID) ||
(sih->chip == BCM4336_CHIP_ID) ||
(sih->chip == BCM4330_CHIP_ID))
ndiv_mode = PMU1_PLL0_PC2_NDIV_MODE_MFB;
else
ndiv_mode = PMU1_PLL0_PC2_NDIV_MODE_MASH;
@ -1413,7 +1413,7 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
/* to operate the 4319 usb in 24MHz/48MHz; chipcontrol[2][84:83] needs
* to be updated.
*/
if ((CHIPID(sih->chip) == BCM4319_CHIP_ID)
if ((sih->chip == BCM4319_CHIP_ID)
&& (xt->fref != XTAL_FREQ_30000MHZ)) {
W_REG(osh, &cc->chipcontrol_addr, PMU1_PLL0_CHIPCTL2);
tmp =
@ -1442,7 +1442,7 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
PCTL_ILP_DIV_MASK) |
((xt->xf << PCTL_XTALFREQ_SHIFT) & PCTL_XTALFREQ_MASK);
if ((CHIPID(sih->chip) == BCM4329_CHIP_ID)
if ((sih->chip == BCM4329_CHIP_ID)
&& CHIPREV(sih->chiprev) == 0) {
/* clear the htstretch before clearing HTReqEn */
AND_REG(osh, &cc->clkstretch, ~CSTRETCH_HT);
@ -1523,7 +1523,7 @@ void si_pmu_pll_init(si_t *sih, struct osl_info *osh, uint xtalfreq)
cc = si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc != NULL);
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4329_CHIP_ID:
if (xtalfreq == 0)
xtalfreq = 38400;
@ -1577,7 +1577,7 @@ u32 si_pmu_alp_clock(si_t *sih, struct osl_info *osh)
cc = si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc != NULL);
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM43224_CHIP_ID:
case BCM43225_CHIP_ID:
case BCM43421_CHIP_ID:
@ -1637,7 +1637,7 @@ si_pmu5_clock(si_t *sih, struct osl_info *osh, chipcregs_t *cc, uint pll0,
return 0;
}
if (CHIPID(sih->chip) == BCM5357_CHIP_ID) {
if (sih->chip == BCM5357_CHIP_ID) {
/* Detect failure in clock setting */
if ((R_REG(osh, &cc->chipstatus) & 0x40000) != 0) {
return 133 * 1000000;
@ -1691,7 +1691,7 @@ u32 si_pmu_si_clock(si_t *sih, struct osl_info *osh)
cc = si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc != NULL);
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM43224_CHIP_ID:
case BCM43225_CHIP_ID:
case BCM43421_CHIP_ID:
@ -1763,14 +1763,14 @@ u32 si_pmu_cpu_clock(si_t *sih, struct osl_info *osh)
ASSERT(sih->cccaps & CC_CAP_PMU);
if ((sih->pmurev >= 5) &&
!((CHIPID(sih->chip) == BCM4329_CHIP_ID) ||
(CHIPID(sih->chip) == BCM4319_CHIP_ID) ||
(CHIPID(sih->chip) == BCM43236_CHIP_ID) ||
(CHIPID(sih->chip) == BCM4336_CHIP_ID) ||
(CHIPID(sih->chip) == BCM4330_CHIP_ID))) {
!((sih->chip == BCM4329_CHIP_ID) ||
(sih->chip == BCM4319_CHIP_ID) ||
(sih->chip == BCM43236_CHIP_ID) ||
(sih->chip == BCM4336_CHIP_ID) ||
(sih->chip == BCM4330_CHIP_ID))) {
uint pll;
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM5356_CHIP_ID:
pll = PMU5356_MAINPLL_PLL0;
break;
@ -1807,14 +1807,14 @@ u32 si_pmu_mem_clock(si_t *sih, struct osl_info *osh)
ASSERT(sih->cccaps & CC_CAP_PMU);
if ((sih->pmurev >= 5) &&
!((CHIPID(sih->chip) == BCM4329_CHIP_ID) ||
(CHIPID(sih->chip) == BCM4319_CHIP_ID) ||
(CHIPID(sih->chip) == BCM4330_CHIP_ID) ||
(CHIPID(sih->chip) == BCM4336_CHIP_ID) ||
(CHIPID(sih->chip) == BCM43236_CHIP_ID))) {
!((sih->chip == BCM4329_CHIP_ID) ||
(sih->chip == BCM4319_CHIP_ID) ||
(sih->chip == BCM4330_CHIP_ID) ||
(sih->chip == BCM4336_CHIP_ID) ||
(sih->chip == BCM43236_CHIP_ID))) {
uint pll;
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM5356_CHIP_ID:
pll = PMU5356_MAINPLL_PLL0;
break;
@ -1999,7 +1999,7 @@ void si_pmu_init(si_t *sih, struct osl_info *osh)
else if (sih->pmurev >= 2)
OR_REG(osh, &cc->pmucontrol, PCTL_NOILP_ON_WAIT);
if ((CHIPID(sih->chip) == BCM4329_CHIP_ID) && (sih->chiprev == 2)) {
if ((sih->chip == BCM4329_CHIP_ID) && (sih->chiprev == 2)) {
/* Fix for 4329b0 bad LPOM state. */
W_REG(osh, &cc->regcontrol_addr, 2);
OR_REG(osh, &cc->regcontrol_data, 0x100);
@ -2090,7 +2090,7 @@ void si_pmu_otp_power(si_t *sih, struct osl_info *osh, bool on)
cc = si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc != NULL);
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4329_CHIP_ID:
rsrcs = PMURES_BIT(RES4329_OTP_PU);
break;
@ -2153,7 +2153,7 @@ void si_pmu_rcal(si_t *sih, struct osl_info *osh)
cc = si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc != NULL);
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4329_CHIP_ID:{
u8 rcal_code;
u32 val;
@ -2236,7 +2236,7 @@ void si_pmu_spuravoid(si_t *sih, struct osl_info *osh, u8 spuravoid)
ASSERT(cc != NULL);
/* force the HT off */
if (CHIPID(sih->chip) == BCM4336_CHIP_ID) {
if (sih->chip == BCM4336_CHIP_ID) {
tmp = R_REG(osh, &cc->max_res_mask);
tmp &= ~RES4336_HT_AVAIL;
W_REG(osh, &cc->max_res_mask, tmp);
@ -2250,7 +2250,7 @@ void si_pmu_spuravoid(si_t *sih, struct osl_info *osh, u8 spuravoid)
si_pmu_spuravoid_pllupdate(sih, cc, osh, spuravoid);
/* enable HT back on */
if (CHIPID(sih->chip) == BCM4336_CHIP_ID) {
if (sih->chip == BCM4336_CHIP_ID) {
tmp = R_REG(osh, &cc->max_res_mask);
tmp |= RES4336_HT_AVAIL;
W_REG(osh, &cc->max_res_mask, tmp);
@ -2269,14 +2269,14 @@ si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc, struct osl_info *osh,
u8 bcm5357_bcm43236_p1div[] = { 0x1, 0x5, 0x5 };
u8 bcm5357_bcm43236_ndiv[] = { 0x30, 0xf6, 0xfc };
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM5357_CHIP_ID:
case BCM43235_CHIP_ID:
case BCM43236_CHIP_ID:
case BCM43238_CHIP_ID:
/* BCM5357 needs to touch PLL1_PLLCTL[02], so offset PLL0_PLLCTL[02] by 6 */
phypll_offset = (CHIPID(sih->chip) == BCM5357_CHIP_ID) ? 6 : 0;
phypll_offset = (sih->chip == BCM5357_CHIP_ID) ? 6 : 0;
/* RMW only the P1 divider */
W_REG(osh, &cc->pllcontrol_addr,
@ -2468,7 +2468,7 @@ bool si_pmu_is_otp_powered(si_t *sih, struct osl_info *osh)
cc = si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc != NULL);
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4329_CHIP_ID:
st = (R_REG(osh, &cc->res_state) & PMURES_BIT(RES4329_OTP_PU))
!= 0;
@ -2553,7 +2553,7 @@ void si_pmu_swreg_init(si_t *sih, struct osl_info *osh)
{
ASSERT(sih->cccaps & CC_CAP_PMU);
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4336_CHIP_ID:
/* Reduce CLDO PWM output voltage to 1.2V */
si_pmu_set_ldo_voltage(sih, osh, SET_LDO_VOLTAGE_CLDO_PWM, 0xe);
@ -2579,7 +2579,7 @@ void si_pmu_radio_enable(si_t *sih, bool enable)
{
ASSERT(sih->cccaps & CC_CAP_PMU);
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4319_CHIP_ID:
if (enable)
si_write_wrapperreg(sih, AI_OOBSELOUTB74,

2
drivers/staging/brcm80211/util/sbutils.c
View File

@ -251,7 +251,7 @@ static uint _sb_scan(si_info_t *sii, u32 sba, void *regs, uint bus, u32 sbba,
else {
/* Older chips */
SI_ERROR(("sb_chip2numcores: unsupported chip "
"0x%x\n", CHIPID(sii->pub.chip)));
"0x%x\n", sii->pub.chip));
ASSERT(0);
numcores = 1;
}

22
drivers/staging/brcm80211/util/siutils.c
View File

@ -414,7 +414,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
sih->chiprev = (w & CID_REV_MASK) >> CID_REV_SHIFT;
sih->chippkg = (w & CID_PKG_MASK) >> CID_PKG_SHIFT;
if ((CHIPID(sih->chip) == BCM4329_CHIP_ID) &&
if ((sih->chip == BCM4329_CHIP_ID) &&
(sih->chippkg != BCM4329_289PIN_PKG_ID))
sih->chippkg = BCM4329_182PIN_PKG_ID;
@ -591,9 +591,9 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
/* assume current core is CC */
if ((sii->pub.ccrev == 0x25)
&&
((CHIPID(sih->chip) == BCM43236_CHIP_ID
|| CHIPID(sih->chip) == BCM43235_CHIP_ID
|| CHIPID(sih->chip) == BCM43238_CHIP_ID)
((sih->chip == BCM43236_CHIP_ID
|| sih->chip == BCM43235_CHIP_ID
|| sih->chip == BCM43238_CHIP_ID)
&& (CHIPREV(sii->pub.chiprev) <= 2))) {
if ((cc->chipstatus & CST43236_BP_CLK) != 0) {
@ -650,8 +650,8 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
pcicore_attach(sii->pch, pvars, SI_DOATTACH);
}
if ((CHIPID(sih->chip) == BCM43224_CHIP_ID) ||
(CHIPID(sih->chip) == BCM43421_CHIP_ID)) {
if ((sih->chip == BCM43224_CHIP_ID) ||
(sih->chip == BCM43421_CHIP_ID)) {
/* enable 12 mA drive strenth for 43224 and set chipControl register bit 15 */
if (CHIPREV(sih->chiprev) == 0) {
SI_MSG(("Applying 43224A0 WARs\n"));
@ -669,14 +669,14 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
}
}
if (CHIPID(sih->chip) == BCM4313_CHIP_ID) {
if (sih->chip == BCM4313_CHIP_ID) {
/* enable 12 mA drive strenth for 4313 and set chipControl register bit 1 */
SI_MSG(("Applying 4313 WARs\n"));
si_pmu_chipcontrol(sih, 0, CCTRL_4313_12MA_LED_DRIVE,
CCTRL_4313_12MA_LED_DRIVE);
}
if (CHIPID(sih->chip) == BCM4331_CHIP_ID) {
if (sih->chip == BCM4331_CHIP_ID) {
/* Enable Ext PA lines depending on chip package option */
si_chipcontrl_epa4331(sih, true);
}
@ -1042,7 +1042,7 @@ void si_watchdog(si_t *sih, uint ticks)
if (PMUCTL_ENAB(sih)) {
if ((CHIPID(sih->chip) == BCM4319_CHIP_ID) &&
if ((sih->chip == BCM4319_CHIP_ID) &&
(CHIPREV(sih->chiprev) == 0) && (ticks != 0)) {
si_corereg(sih, SI_CC_IDX,
offsetof(chipcregs_t, clk_ctl_st), ~0, 0x2);
@ -1957,7 +1957,7 @@ bool si_is_sprom_available(si_t *sih)
return sromctrl & SRC_PRESENT;
}
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4329_CHIP_ID:
return (sih->chipst & CST4329_SPROM_SEL) != 0;
case BCM4319_CHIP_ID:
@ -1977,7 +1977,7 @@ bool si_is_sprom_available(si_t *sih)
bool si_is_otp_disabled(si_t *sih)
{
switch (CHIPID(sih->chip)) {
switch (sih->chip) {
case BCM4329_CHIP_ID:
return (sih->chipst & CST4329_SPROM_OTP_SEL_MASK) ==
CST4329_OTP_PWRDN;