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drm/amdgpu: Add memory vendor information
For ASICs with GC v9.4.3, determine the vendor information from scratch register. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1998,6 +1998,19 @@ static int gmc_v9_0_init_mem_ranges(struct amdgpu_device *adev)
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return 0;
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}
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static void gmc_v9_4_3_init_vram_info(struct amdgpu_device *adev)
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{
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static const u32 regBIF_BIOS_SCRATCH_4 = 0x50;
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u32 vram_info;
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if (!amdgpu_sriov_vf(adev)) {
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vram_info = RREG32(regBIF_BIOS_SCRATCH_4);
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adev->gmc.vram_vendor = vram_info & 0xF;
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}
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adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM;
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adev->gmc.vram_width = 128 * 64;
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}
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static int gmc_v9_0_sw_init(void *handle)
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{
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int r, vram_width = 0, vram_type = 0, vram_vendor = 0, dma_addr_bits;
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@ -2010,15 +2023,12 @@ static int gmc_v9_0_sw_init(void *handle)
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spin_lock_init(&adev->gmc.invalidate_lock);
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if (!(adev->bios) || adev->gmc.is_app_apu) {
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if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 3)) {
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gmc_v9_4_3_init_vram_info(adev);
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} else if (!adev->bios) {
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if (adev->flags & AMD_IS_APU) {
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if (adev->gmc.is_app_apu) {
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adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM;
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adev->gmc.vram_width = 128 * 64;
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} else {
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adev->gmc.vram_type = AMDGPU_VRAM_TYPE_DDR4;
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adev->gmc.vram_width = 64 * 64;
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}
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adev->gmc.vram_type = AMDGPU_VRAM_TYPE_DDR4;
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adev->gmc.vram_width = 64 * 64;
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} else {
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adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM;
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adev->gmc.vram_width = 128 * 64;
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