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perf arm-spe: Support multiple Arm SPE PMUs
A platform can have more than one Arm SPE PMU. For example, a system with multiple clusters may have each cluster enabled with its own Arm SPE instance. In such case, the PMU devices will be named 'arm_spe_0', 'arm_spe_1', and so on. Currently, the tool only supports 'arm_spe_0'. This commit extends support to multiple Arm SPE PMUs by detecting the substring 'arm_spe_'. Signed-off-by: Leo Yan <leo.yan@arm.com> Reviewed-by: James Clark <james.clark@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: John Garry <john.g.garry@oracle.com> Cc: linux-arm-kernel@lists.infradead.org Cc: coresight@lists.linaro.org Link: https://lore.kernel.org/r/20240706152035.86983-2-leo.yan@arm.com Signed-off-by: Namhyung Kim <namhyung@kernel.org>
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@ -30,7 +30,7 @@ void perf_pmu__arch_init(struct perf_pmu *pmu)
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pmu->selectable = true;
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pmu->is_uncore = false;
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pmu->perf_event_attr_init_default = arm_spe_pmu_default_config;
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if (!strcmp(pmu->name, "arm_spe_0"))
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if (strstarts(pmu->name, "arm_spe_"))
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pmu->mem_events = perf_mem_events_arm;
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} else if (strstarts(pmu->name, HISI_PTT_PMU_NAME)) {
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pmu->selectable = true;
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