thunderbolt: debugfs: Replace "both lanes" with "all lanes"

With USB4 Gen 4, the link can be configured into an asymmetric mode,
where there are three receivers and only one transmitter. The USB4
specification also uses the "all lanes" nomenclature instead of "both
lanes".

Signed-off-by: Aapo Vienamo <aapo.vienamo@iki.fi>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
This commit is contained in:
Aapo Vienamo 2024-08-15 21:45:16 +03:00 committed by Mika Westerberg
parent c8c08fd9c2
commit e6c9905ff4
2 changed files with 7 additions and 7 deletions

View File

@ -499,9 +499,9 @@ static bool supports_hardware(const struct tb_margining *margining)
return margining->caps[2] & USB4_MARGIN_CAP_2_MODES_HW;
}
static bool both_lanes(const struct tb_margining *margining)
static bool all_lanes(const struct tb_margining *margining)
{
return margining->caps[0] & USB4_MARGIN_CAP_0_2_LANES;
return margining->caps[0] & USB4_MARGIN_CAP_0_ALL_LANES;
}
static enum usb4_margin_cap_voltage_indp
@ -655,8 +655,8 @@ static int margining_caps_show(struct seq_file *s, void *not_used)
seq_puts(s, "# hardware margining: no\n");
}
seq_printf(s, "# both lanes simultaneously: %s\n",
both_lanes(margining) ? "yes" : "no");
seq_printf(s, "# all lanes simultaneously: %s\n",
str_yes_no(all_lanes(margining)));
seq_printf(s, "# voltage margin steps: %u\n",
margining->voltage_steps);
seq_printf(s, "# maximum voltage offset: %u mV\n",
@ -762,7 +762,7 @@ margining_lanes_write(struct file *file, const char __user *user_buf,
margining->lanes = 1;
} else if (!strcmp(buf, "all")) {
/* Needs to be supported */
if (both_lanes(margining))
if (all_lanes(margining))
margining->lanes = 7;
else
ret = -EINVAL;
@ -787,7 +787,7 @@ static int margining_lanes_show(struct seq_file *s, void *not_used)
return -ERESTARTSYS;
lanes = margining->lanes;
if (both_lanes(margining)) {
if (all_lanes(margining)) {
if (!lanes)
seq_puts(s, "[0] 1 all\n");
else if (lanes == 1)

View File

@ -49,7 +49,7 @@ enum usb4_sb_opcode {
/* USB4_SB_OPCODE_READ_LANE_MARGINING_CAP */
#define USB4_MARGIN_CAP_0_MODES_HW BIT(0)
#define USB4_MARGIN_CAP_0_MODES_SW BIT(1)
#define USB4_MARGIN_CAP_0_2_LANES BIT(2)
#define USB4_MARGIN_CAP_0_ALL_LANES BIT(2)
#define USB4_MARGIN_CAP_0_VOLTAGE_INDP_MASK GENMASK(4, 3)
#define USB4_MARGIN_CAP_0_VOLTAGE_MIN 0x0
#define USB4_MARGIN_CAP_0_VOLTAGE_HL 0x1