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- Fix a /proc/interrupts formatting regression
- Have the BCM2836 interrupt controller enter power management states properly - Other fixlets -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmdVeI0ACgkQEsHwGGHe VUpE9A/9Gs2K9ImUlQu5giKEM2dhu0U/oEN/KNKayd6mjSR4MWEovvMeE16M2AUA uALQVxCviJKy6vl5J2aYw5QIhktfGwrdmr4zGK61pfhGWD8dClaCxJpbfUvtx1Bu 1K9U8PpSh1grScbcjDFBOIIzHsmQgpHFTJxVwktLXEktJsWJyzhxqvdiduMXvDlF T5WOIr/A5MwGtoP0kySQA49k0ymgUkXf1UgAl7nTksLEI50SMo3Wt7vpQ+qLk6xD 3RdywlARaVOLY5GlRsFtUTZP6o06/8aDrEmrUHnOiip9u7pKzMiJR4aKzlScCdTN BRKEegLxgJqA0uvQAfYP7kCP4l5fFAAVHmcenZCuXDlcexJsnLxYJChxJKUK7CAt wCMZifysp13aF3gyT6BfNKEPZOEqFDykxUvzT/F1d2t0Z7yq1GHIXcDHC8eG0p2H 3f/YOSi+5KgDTi+xzT1hOPn3HcTADhF7wrj2oppOmJa/FyJVrRVeL+DP+uNPD+ux tMlVknBp3nlYQ4Ll773GZmvdaamkUfw9U5eZRi04CrvVOcanq/KjKIL24bq9ODS0 i6dgPfZPwYI+nuenGv7VEpgo92/oynqGxuShESk1c1S/rCL+D2kMiNaRvR9cVsU3 +Gvr2v9B0KqLy79gw9Fhdqzbhnzhkcpa72B4JNJwEtHdO+t4iwI= =Uyoi -----END PGP SIGNATURE----- Merge tag 'irq_urgent_for_v6.13_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Borislav Petkov: - Fix a /proc/interrupts formatting regression - Have the BCM2836 interrupt controller enter power management states properly - Other fixlets * tag 'irq_urgent_for_v6.13_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/stm32mp-exti: CONFIG_STM32MP_EXTI should not default to y when compile-testing genirq/proc: Add missing space separator back irqchip/bcm2836: Enable SKIP_SET_WAKE and MASK_ON_SUSPEND irqchip/gic-v3: Fix irq_complete_ack() comment
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eadaac4dd2
@ -415,7 +415,7 @@ config PARTITION_PERCPU
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config STM32MP_EXTI
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tristate "STM32MP extended interrupts and event controller"
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depends on (ARCH_STM32 && !ARM_SINGLE_ARMV7M) || COMPILE_TEST
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default y
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default ARCH_STM32 && !ARM_SINGLE_ARMV7M
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select IRQ_DOMAIN_HIERARCHY
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select GENERIC_IRQ_CHIP
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help
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@ -58,6 +58,7 @@ static struct irq_chip bcm2836_arm_irqchip_timer = {
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.name = "bcm2836-timer",
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.irq_mask = bcm2836_arm_irqchip_mask_timer_irq,
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.irq_unmask = bcm2836_arm_irqchip_unmask_timer_irq,
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.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE,
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};
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static void bcm2836_arm_irqchip_mask_pmu_irq(struct irq_data *d)
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@ -74,6 +75,7 @@ static struct irq_chip bcm2836_arm_irqchip_pmu = {
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.name = "bcm2836-pmu",
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.irq_mask = bcm2836_arm_irqchip_mask_pmu_irq,
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.irq_unmask = bcm2836_arm_irqchip_unmask_pmu_irq,
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.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE,
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};
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static void bcm2836_arm_irqchip_mask_gpu_irq(struct irq_data *d)
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@ -88,6 +90,7 @@ static struct irq_chip bcm2836_arm_irqchip_gpu = {
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.name = "bcm2836-gpu",
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.irq_mask = bcm2836_arm_irqchip_mask_gpu_irq,
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.irq_unmask = bcm2836_arm_irqchip_unmask_gpu_irq,
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.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE,
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};
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static void bcm2836_arm_irqchip_dummy_op(struct irq_data *d)
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@ -817,7 +817,7 @@ static void gic_deactivate_unhandled(u32 irqnr)
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* register state is not stale, as these may have been indirectly written
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* *after* exception entry.
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*
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* (2) Deactivate the interrupt when EOI mode 1 is in use.
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* (2) Execute an interrupt priority drop when EOI mode 1 is in use.
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*/
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static inline void gic_complete_ack(u32 irqnr)
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{
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@ -501,17 +501,18 @@ int show_interrupts(struct seq_file *p, void *v)
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seq_put_decimal_ull_width(p, " ", cnt, 10);
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}
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seq_putc(p, ' ');
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raw_spin_lock_irqsave(&desc->lock, flags);
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if (desc->irq_data.chip) {
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if (desc->irq_data.chip->irq_print_chip)
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desc->irq_data.chip->irq_print_chip(&desc->irq_data, p);
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else if (desc->irq_data.chip->name)
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seq_printf(p, " %8s", desc->irq_data.chip->name);
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seq_printf(p, "%8s", desc->irq_data.chip->name);
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else
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seq_printf(p, " %8s", "-");
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seq_printf(p, "%8s", "-");
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} else {
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seq_printf(p, " %8s", "None");
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seq_printf(p, "%8s", "None");
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}
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if (desc->irq_data.domain)
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seq_printf(p, " %*lu", prec, desc->irq_data.hwirq);
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