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arm: pmu: Share user ABI format mechanism with SPE
This mechanism makes it much easier to define and read new attributes so move it to the arm_pmu.h header so that it can be shared. At the same time update the existing format attributes to use it. GENMASK has to be changed to GENMASK_ULL because the config fields are 64 bits even on arm32 where this will also be used now. Signed-off-by: James Clark <james.clark@arm.com> Link: https://lore.kernel.org/r/20231211161331.1277825-7-james.clark@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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@ -299,20 +299,31 @@ static const struct attribute_group armv8_pmuv3_events_attr_group = {
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.is_visible = armv8pmu_event_attr_is_visible,
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};
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PMU_FORMAT_ATTR(event, "config:0-15");
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PMU_FORMAT_ATTR(long, "config1:0");
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PMU_FORMAT_ATTR(rdpmc, "config1:1");
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/* User ABI */
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#define ATTR_CFG_FLD_event_CFG config
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#define ATTR_CFG_FLD_event_LO 0
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#define ATTR_CFG_FLD_event_HI 15
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#define ATTR_CFG_FLD_long_CFG config1
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#define ATTR_CFG_FLD_long_LO 0
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#define ATTR_CFG_FLD_long_HI 0
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#define ATTR_CFG_FLD_rdpmc_CFG config1
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#define ATTR_CFG_FLD_rdpmc_LO 1
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#define ATTR_CFG_FLD_rdpmc_HI 1
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GEN_PMU_FORMAT_ATTR(event);
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GEN_PMU_FORMAT_ATTR(long);
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GEN_PMU_FORMAT_ATTR(rdpmc);
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static int sysctl_perf_user_access __read_mostly;
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static bool armv8pmu_event_is_64bit(struct perf_event *event)
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{
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return event->attr.config1 & 0x1;
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return ATTR_CFG_GET_FLD(&event->attr, long);
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}
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static bool armv8pmu_event_want_user_access(struct perf_event *event)
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{
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return event->attr.config1 & 0x2;
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return ATTR_CFG_GET_FLD(&event->attr, rdpmc);
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}
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static struct attribute *armv8_pmuv3_format_attrs[] = {
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@ -206,28 +206,6 @@ static const struct attribute_group arm_spe_pmu_cap_group = {
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#define ATTR_CFG_FLD_inv_event_filter_LO 0
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#define ATTR_CFG_FLD_inv_event_filter_HI 63
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/* Why does everything I do descend into this? */
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#define __GEN_PMU_FORMAT_ATTR(cfg, lo, hi) \
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(lo) == (hi) ? #cfg ":" #lo "\n" : #cfg ":" #lo "-" #hi
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#define _GEN_PMU_FORMAT_ATTR(cfg, lo, hi) \
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__GEN_PMU_FORMAT_ATTR(cfg, lo, hi)
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#define GEN_PMU_FORMAT_ATTR(name) \
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PMU_FORMAT_ATTR(name, \
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_GEN_PMU_FORMAT_ATTR(ATTR_CFG_FLD_##name##_CFG, \
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ATTR_CFG_FLD_##name##_LO, \
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ATTR_CFG_FLD_##name##_HI))
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#define _ATTR_CFG_GET_FLD(attr, cfg, lo, hi) \
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((((attr)->cfg) >> lo) & GENMASK(hi - lo, 0))
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#define ATTR_CFG_GET_FLD(attr, name) \
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_ATTR_CFG_GET_FLD(attr, \
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ATTR_CFG_FLD_##name##_CFG, \
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ATTR_CFG_FLD_##name##_LO, \
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ATTR_CFG_FLD_##name##_HI)
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GEN_PMU_FORMAT_ATTR(ts_enable);
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GEN_PMU_FORMAT_ATTR(pa_enable);
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GEN_PMU_FORMAT_ATTR(pct_enable);
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@ -183,4 +183,26 @@ void armpmu_free_irq(int irq, int cpu);
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#define ARMV8_SPE_PDEV_NAME "arm,spe-v1"
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#define ARMV8_TRBE_PDEV_NAME "arm,trbe"
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/* Why does everything I do descend into this? */
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#define __GEN_PMU_FORMAT_ATTR(cfg, lo, hi) \
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(lo) == (hi) ? #cfg ":" #lo "\n" : #cfg ":" #lo "-" #hi
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#define _GEN_PMU_FORMAT_ATTR(cfg, lo, hi) \
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__GEN_PMU_FORMAT_ATTR(cfg, lo, hi)
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#define GEN_PMU_FORMAT_ATTR(name) \
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PMU_FORMAT_ATTR(name, \
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_GEN_PMU_FORMAT_ATTR(ATTR_CFG_FLD_##name##_CFG, \
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ATTR_CFG_FLD_##name##_LO, \
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ATTR_CFG_FLD_##name##_HI))
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#define _ATTR_CFG_GET_FLD(attr, cfg, lo, hi) \
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((((attr)->cfg) >> lo) & GENMASK_ULL(hi - lo, 0))
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#define ATTR_CFG_GET_FLD(attr, name) \
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_ATTR_CFG_GET_FLD(attr, \
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ATTR_CFG_FLD_##name##_CFG, \
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ATTR_CFG_FLD_##name##_LO, \
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ATTR_CFG_FLD_##name##_HI)
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#endif /* __ARM_PMU_H__ */
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