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drm/amd/display: Correct kdoc formats in dcn10_opp.c
Fixes the following W=1 kernel build warning: display/dc/dcn10/dcn10_opp.c:52: warning: Function parameter or member 'oppn10' not described in 'opp1_set_truncation' display/dc/dcn10/dcn10_opp.c:52: warning: Function parameter or member 'params' not described in 'opp1_set_truncation' display/dc/dcn10/dcn10_opp.c:52: warning: expecting prototype for set_truncation(). Prototype was for opp1_set_truncation() instead display/dc/dcn10/dcn10_opp.c:161: warning: Function parameter or member 'oppn10' not described in 'opp1_set_pixel_encoding' display/dc/dcn10/dcn10_opp.c:161: warning: Function parameter or member 'params' not described in 'opp1_set_pixel_encoding' display/dc/dcn10/dcn10_opp.c:161: warning: expecting prototype for set_pixel_encoding(). Prototype was for opp1_set_pixel_encoding() instead display/dc/dcn10/dcn10_opp.c:183: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Set Clamping Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -37,14 +37,14 @@
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#define CTX \
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#define CTX \
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oppn10->base.ctx
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oppn10->base.ctx
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/************* FORMATTER ************/
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/**
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/**
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* set_truncation
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* opp1_set_truncation():
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* 1) set truncation depth: 0 for 18 bpp or 1 for 24 bpp
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* 1) set truncation depth: 0 for 18 bpp or 1 for 24 bpp
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* 2) enable truncation
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* 2) enable truncation
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* 3) HW remove 12bit FMT support for DCE11 power saving reason.
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* 3) HW remove 12bit FMT support for DCE11 power saving reason.
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*
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* @oppn10: output_pixel_processor struct instance for dcn10.
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* @params: pointer to bit_depth_reduction_params.
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*/
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*/
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static void opp1_set_truncation(
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static void opp1_set_truncation(
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struct dcn10_opp *oppn10,
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struct dcn10_opp *oppn10,
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@ -149,11 +149,12 @@ void opp1_program_bit_depth_reduction(
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}
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}
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/**
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/**
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* set_pixel_encoding
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* opp1_set_pixel_encoding():
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*
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* Set Pixel Encoding
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* 0: RGB 4:4:4 or YCbCr 4:4:4 or YOnly
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* 0: RGB 4:4:4 or YCbCr 4:4:4 or YOnly
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* 1: YCbCr 4:2:2
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* 1: YCbCr 4:2:2
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*
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* @oppn10: output_pixel_processor struct instance for dcn10.
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* @params: pointer to clamping_and_pixel_encoding_params.
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*/
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*/
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static void opp1_set_pixel_encoding(
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static void opp1_set_pixel_encoding(
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struct dcn10_opp *oppn10,
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struct dcn10_opp *oppn10,
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@ -180,13 +181,16 @@ static void opp1_set_pixel_encoding(
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}
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}
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/**
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/**
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* Set Clamping
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* opp1_set_clamping():
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* 1) Set clamping format based on bpc - 0 for 6bpc (No clamping)
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* 1) Set clamping format based on bpc - 0 for 6bpc (No clamping)
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* 1 for 8 bpc
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* 1 for 8 bpc
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* 2 for 10 bpc
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* 2 for 10 bpc
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* 3 for 12 bpc
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* 3 for 12 bpc
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* 7 for programable
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* 7 for programable
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* 2) Enable clamp if Limited range requested
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* 2) Enable clamp if Limited range requested
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*
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* @oppn10: output_pixel_processor struct instance for dcn10.
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* @params: pointer to clamping_and_pixel_encoding_params.
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*/
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*/
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static void opp1_set_clamping(
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static void opp1_set_clamping(
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struct dcn10_opp *oppn10,
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struct dcn10_opp *oppn10,
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