Add clocks for I2C, USI (HSI2C) and RTC to the Exynos5410 clock driver.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Just like other Exynos5 family SoCs, this one has four UARTs. Add
missing UART3 clocks to the Exynos5410 clock driver.
Add clocks for USB and PWM.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
The arrays with initialization data of PLLs can be moved to initconst
section because they are referenced only from other initconst-level
symbols.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
The PNAME macro defines array of strings for names of mux parents.
Although the strings itself were const but pointers to them were not thus
this data resided in initdata. Make this an array of const pointers to
const strings and move to initconst section.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
The exynos5250_clk_sleep_init() function can be moved to init section
because it is referenced only from other init-level calls.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
The exynos5420_clk_sleep_init() function and arrays with initialization
data of PLLs can be moved to init section because they are referenced
only from other init-level symbols.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
The arrays with initialization data of PLLs can be moved to initconst
section because they are referenced only from other initconst-level
symbols.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
All of initialization data can be made const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
All of initialization data can be made const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
All of initialization data can be made const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
All of initialization data can be made const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
All of initialization data can be made const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
All of initialization data can be made const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
All of initialization data can be made const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
The arrays with initialization data of PLLs can be moved to initconst
section because they are referenced only from other initconst-level
symbols.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
All of initialization data can be made const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
All of initialization data can be made const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
The local exynos4_get_xom() function is referenced only from other
init-level functions.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
All of initialization data can be made const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
The platform_driver and of_device_id structs can be moved to init
section because they are referenced only from subsys_initcall-level
function.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
samsung_cmu_register_one() can accept pointer to const initialization
data: struct samsung_cmu_info. The members of the latter can also be
pointers to const data.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Add compatible for Exynos5410 so the PMU on this SoC would provide
CLKOUT.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
The samsung_clk_init() cannot return NULL. Either it returns allocated
memory or it panics.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This patch adds CLK_IS_CRITICAL flag to ACLK_CCORE_133 and ACLK_FSYS0_200
clocks. These clocks are critical for accessing CMU_CCORE and CMU_FSYS0
blocks registers. Let these clocks to be enabled all the time.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This patch adds the clock id for ACLK clock which is source clock
of AMBA AXI bus. This clock should be handled in the bus frequency
scaling driver.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This flag is a no-op now. Remove usage of the flag.
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clocks definition, dropping read-only registers
from the suspend/resume register save/restore list
and exposition of two clocks required for the
exynos5433 HDMI subsystem operation.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJWzuPVAAoJEE1bIKeAnHqLXKQP/jOSwlIp+q9GED7fHmX2hNN+
LLw65kJKv4FEd7LFEKAnkR9qOs79JxgSJNWvEIFS3ePnpNjLr/WchX7P8jg5N8or
axhQiYRlKoVOU7aqCLKq1zvDZbNyH/0C5cKZlY/2FVeGKFBXltOgoiM6mFrzLx2e
6INoP8cHeb4mNy/GdjmiKxjrzJcWqE6OIAfMPkWUP7wzHadWxlZ5sUhWihTEgkB/
JWY95M/nwTBIpwAD2OpqcjfNOvBWlCEaLxOHUOiEJmq+MsWvXFsHaYlc0yAvD4Dc
da1Mb0iQlz3rZ8FSOuGfBEGo/4SKJUK/qszpsDtjc5auaiXoYdYIwCdSDr0CSJn2
rmgI9+71F1KcJuXoCnyqIlWkPPRzJnJSxQ6zLB1Q/8WA9li69CVVlSUdbIGvuCfr
xp30leZq7jTaLdD4gYeSMyMtqoybE2g/5HGJTT+ahMCTvSQvo2MPz4owIEyAbJ5w
nTW803REVQqo9g5MQnn/G/UZ4l77BzAzcQOhf3nTerXOr9E0Qz/SlMPZda3I6orI
Bx0Tg+kYNvazaCF1MyPOMUk6rgCdoT1vc1TtLKe/UYoJRZKj16a84EeBlQU5OCYd
PqKgR9d0pO4JXkKFmWvU3p+WK6VtdhVAkNUYj4xHsktfgALfEGxsC7N6dK9q/lsN
n0AxqyCSeiovYcQWRvAH
=B/4a
-----END PGP SIGNATURE-----
Merge tag 'clk-samsung-4.6' of git://linuxtv.org/snawrocki/samsung into clk-next
Pull Samsung clk driver changes from Sylwester Nawrocki:
Mostly correction of errors in the exynos5433 SoC
clocks definition, dropping read-only registers
from the suspend/resume register save/restore list
and exposition of two clocks required for the
exynos5433 HDMI subsystem operation.
* tag 'clk-samsung-4.6' of git://linuxtv.org/snawrocki/samsung:
clk: samsung: exynos5433: Fix wrong registers of PCLK_GSCL_SMMU clocks
clk: samsung: exynos5433: Fix mout_aclk_cam1*_user clocks definition
clk: samsung: exynos5433: Drop RO registers from the save/restore lists
clk: samsung: exynos5433: Fix definitions of SCLK ISP SENSOR0 clocks
clk: samsung: exynos5433: Fix definitions of MUX_SEL_CAM04 clocks
clk: samsung: exynos5433: Fix typos in *_ISP_MPWM clock names
clk/samsung: exynos5433: add pclk_decon clock
clk/samsung: exynos5433: add definitions of HDMI-PHY output clocks
This fixes register assignment in the CLK_PCLK_SMMU_GSCL{1,2}
clocks definition.
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Control bits for the ACLK_CAM1_552_USER and ACLK_CAM1_400_USER
mux clocks are in MUX_SEL_CAM10, not MUX_SEL_CAM01 register.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This fixes bit field offsets in the CMU_TOP CLK_DIV_SCLK_ISP_SENSOR_{A,B}
clock definitions.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This corrects assignment of bit offsets of the MUX_SEL_CAM04 register
to the respective mux clocks.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Currently the Exynos5433 (ARMv8 SoC) clock driver depends on ARCH_EXYNOS
so it is built also on ARMv7. This does not bring any kind of benefit.
There won't be a single kernel image for ARMv7 and ARMv8 SoCs (like
multi_v7 for ARMv7).
Instead build clock drivers only for respective SoC's architecture.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Enable the COMPILE_TEST to get build coverage of some of Samsung clock
controller drivers. Still some of them will be built only if
appropriate SoC is chosen (like SOC_EXYNOS4415 or ARCH_S3C64XX).
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
This undocumented gate clock is used by DECON IP.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
HDMI driver must re-parent respective muxes during HDMI-PHY on/off
to HDMI-PHY output clocks. To reference those clocks their
definitions should be added.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Move all vendor's Kconfig into CCF menu section to prevent
new drivers putting their Kconfig files in a wrong place.
Some Kconfigs need to be modified at the same time to avoid build
warnings.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
[sboyd@codeaurora.org: Fix typos in commit message]
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
As usual, the bulk of this release is again DT file contents.
There's a huge number of changes here, and it's challenging to give a crisp
overview of just what is in here. To start with:
New boards:
- TI-based DM3730 from LogicPD (Torpedo)
- Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
- Raspberry Pi 2 DT files
- Watchdog on Meson8b
- Veyron-mickey (ASUS Chromebit) DTS
- Rockchip rk3228 SoC and eval board
- Sigma Designs Tango4
Improvements:
- Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
- Misc new devices for Rockchip rk3036 and rk3288
- Allwinner updates for misc SoCs and systems
... and a _large_ number of other changes across the field. Devices
added to SoC DTSI and board DTS files for a number of SoC vendors, new
product boards on already-supported SoCs, cleanups and refactorings of
existing DTS/DTSI files and a bunch of other changes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWnr6fAAoJEIwa5zzehBx3p+gP+wYLUqXjCYgyu6oJPxJbWghj
gPc4QJmhVlAWTqvE7Ut7RumWzGa7nUEH2QF9tiCLbDAw8727HJXhRHknFwaCsX45
BsvFQaKY99ClfUhoSI9GRa8e2jEArjzEPqkynHW/8FM20qWaj/Z8DDfixG75gR8u
onrMw6kprNGwmyQwqu5zLDXhUBCQIs1xRRSabUjV1P5420dbBaGgtmQrdj7k+JDt
wo9SKiG6d9CSYil3r7BC+0JwzbKNBxRGs2vv1BJOfbZ3Lj+uC0vj1AxoF/p7dOHy
ohuvt7UwwtoUzzFMcMUo7E8qxl9u6bbnPDlUoRF7DVVi5SQoeZd8BOZXOdLRN2OQ
qtgsmziDxtvh7Ydj6i89D69x7+GurAFcP8Aturprc5Zd5lO70PAYBD379IhIZ8y1
MVJltIEeuUZo7BaVBCHWQY9jJRtI3bAU6JdFPrFROsuo810IYd72Wbb1ZCfF7SV7
nBRvV7e71VQxb48c3p8Et5FntHuXfUlhkMrQ7Cb+2ugB/diGgZB9NfrZbP3Azv7f
A5Ey9tNHaOCUxzYDCw80jTa7OwVWNJf2kOT1yikASk3vODKLv4E5YQ2DULnObWG7
iRmLYuuGka4sMs0ZjpV3kaqs+8rWu08x2rEr5X0wfU+DalIzUWA2oDKSgPLJoacV
gXKP039CIxQAiottcppA
=XDLa
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As usual, the bulk of this release is again DT file contents.
There's a huge number of changes here, and it's challenging to give a
crisp overview of just what is in here. To start with:
New boards:
- TI-based DM3730 from LogicPD (Torpedo)
- Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
- Raspberry Pi 2 DT files
- Watchdog on Meson8b
- Veyron-mickey (ASUS Chromebit) DTS
- Rockchip rk3228 SoC and eval board
- Sigma Designs Tango4
Improvements:
- Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
- Misc new devices for Rockchip rk3036 and rk3288
- Allwinner updates for misc SoCs and systems
... and a _large_ number of other changes across the field. Devices
added to SoC DTSI and board DTS files for a number of SoC vendors, new
product boards on already-supported SoCs, cleanups and refactorings of
existing DTS/DTSI files and a bunch of other changes"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits)
ARM: dts: compulab: add new board description
ARM: versatile: add the syscon LEDs to the DT
dts: vt8500: Fix errors in SDHC node for WM8505
ARM: dts: imx6q: clean up unused ipu2grp
ARM: dts: silk: Add compatible property to "partitions" node
ARM: dts: gose: Add compatible property to "partitions" node
ARM: dts: porter: Add compatible property to "partitions" node
ARM: dts: koelsch: Add compatible property to "partitions" node
ARM: dts: lager: Add compatible property to "partitions" node
ARM: dts: bockw: Add compatible property to "partitions" node
ARM: dts: meson8b: Add watchdog node
Documentation: watchdog: Add new bindings for meson8b
ARM: meson: Add status LED for Odroid-C1
ARM: dts: uniphier: fix a typo in comment block
ARM: bcm2835: Add the auxiliary clocks to the device tree.
ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B
ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT.
ARM: bcm2835: Split the DT for peripherals from the DT for the CPU
ARM: realview: set up cache correctly on the PB11MPCore
ARM: dts: Unify G2D device node with other devices on exynos4
...
Proper source for MFC block is mout_user_aclk333 (in datasheet named
USER_MUX_ACLK_333), not the output of CLKDIV_ACLK_333 MUX.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Fix cpu clock configuration data for Exynos5422/5800 SoCs
(they use higher PCLK_DBG divider values than Exynos5420 and
support additional frequencies).
Based on Hardkernel's kernel for ODROID-XU3 board.
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5420.
Changes by Bartlomiej:
- split Exynos5420 support from the original patches
- moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This patch adds clocks, which are required for preserving parent clock
configuration on GSCL power domain on/off.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Add a gate clock for controlling all clocks of Security Sub System
(SSS).
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
As usual, this is the massive branch we have for each release. Lots of
various updates and additions of hardware descriptions on existing hardware,
as well as the usual additions of new boards and SoCs.
This is also the first release where we've started mixing 64- and 32-bit
DT updates in one branch.
(Specific details on what's actually here and new is pretty easy to tell
from the diffstat, so there's little point in duplicating listing it here.)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWQT2WAAoJEIwa5zzehBx37tgQAIBe5eDJFXFihTlyOQ2plL3q
vVH4OCzXIHELfM1J8CGZNah1wCQqNOts8RAmDCzxr+zSYuLOwJOEDZ6NKmErMxl0
NTj3+BsqKO3NRym970ofPqU9JRLQmpZ8K7dzk8Nwj2+r1WZHFu/j6Jv44n/Ns0lw
7+wxnG322lTm7SnvALCMD5lD4Y7VpThooWy5SdFtRoAetn+cLbVCJIeeQvO6Vxkp
NooeJR0t2e8cpbAND5Jwu6eeWRcIbrvgjYDe0omhrIY05i9yNvIsC2HuQFGjF43z
p2CnQvcKnhOXTZw3yse1Fx5igA7jqwVjjC/lVeDyxhusAtLpmuB6qbSaj7DpqkSQ
nJxX1d49WKm68K+aknmee1kYRrvc4DE/kORI4IxXnsVNMu16ifTVLnxKgUhwzukb
eZdTP6rsqgNozaYvh0k1vfSFd+CNSkBg+E9nrI3tU95yo3LOIhobVBCvBcWlmUvQ
JdavRztqosChjIx3a9i1eCNKJtCg9p4m+gWjUqVVWsxBHe/3HojzjZnsBSynIQMA
uGIVm0TKhNl1Svxl3oJo9257UCUK7+5PqJHK9IHrcWDULYx05JGSjuZcyvNS6Fo+
u1DMf0ud4gXJYhecFBa7b3zRjk5YxptgCCTjeEEOTUJbbhZqDjGFZlNuFi6dmqD3
ILJ2QMe/DGiPIlUmCfsx
=qY1q
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As usual, this is the massive branch we have for each release. Lots
of various updates and additions of hardware descriptions on existing
hardware, as well as the usual additions of new boards and SoCs.
This is also the first release where we've started mixing 64- and
32-bit DT updates in one branch.
(Specific details on what's actually here and new is pretty easy to
tell from the diffstat, so there's little point in duplicating listing
it here)"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
ARM: dts: uniphier: add system-bus-controller nodes
ARM64: juno: disable NOR flash node by default
ARM: dts: uniphier: add outer cache controller nodes
arm64: defconfig: Enable PCI generic host bridge by default
arm64: Juno: Add support for the PCIe host bridge on Juno R1
Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
dts/Makefile: Add build support for LS2080a QDS & RDB board DTS
dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards
dts/ls2080a: Update Simulator DTS to add support of various peripherals
dts/ls2080a: Remove text about writing to Free Software Foundation
dts/ls2080a: Update DTSI to add support of various peripherals
doc: DTS: Update DWC3 binding to provide reference to generic bindings
doc/bindings: Update GPIO devicetree binding documentation for LS2080A
Documentation/dts: Move FSL board-specific bindings out of /powerpc
Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
arm64: Rename FSL LS2085A SoC support code to LS2080A
arm64: Use generic Layerscape SoC family naming
ARM: dts: uniphier: add ProXstream2 Vodka board support
ARM: dts: uniphier: add ProXstream2 Gentil board support
...