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3 Commits

Author SHA1 Message Date
Vineet Gupta
b3d6aba8bd ARC: [dts] Add clk feeding into timers to DTs 
This allows us to introduce timers in DT in next commit

The core clk frequency hack in AXS103 platform is also extended,
where the core clk feeding into timers is updated in-place in FDT.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
 2016-05-09 09:32:29 +05:30
Vineet Gupta
9ba7648cc9 ARC: [dts] Rename cpu_intc -> core_intc 
This is again for future changes to use common DTSI for timers which
refer to @core_intc

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
 2016-05-09 09:32:29 +05:30
Vineet Gupta
fd1557923b ARC: [plat_arcfpga]->[plat_sim] 
* Remove remanants of legacy ARC FPGA platforms (AA4, ML509...)
* Only nsim simulation platform is left, rename platform accordingly
* AA4 DT stuff is compatible with nsim for ARC700 so rename it too

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
 2015-06-19 18:09:26 +05:30