Commit Graph

3532 Commits

Author SHA1 Message Date
Arnd Bergmann
f011770485 STM32 DT for v6.9, round 1
Highlights:
 ----------
 
 - MCU:
   - Add DSI support on stm32f769.
   - Add display support on stm32f769-disco.
   - Add stm32f769-disco-mb1166-reva09 board support which belongs to
     the novatek NT35510 panel.
 
 - MPU:
   - STM32MP13:
     - Add CRC support an enable it on stm32mp135f-dk.
     - Enable CRYP on stm32mp135f-dk.
 
   - STMP32MP15:
    - Fix DSI peripheral clock: use bus clock instead of kernel clock
      for pclk.
 
    - LXA: driver powerboard lines as open drain.
    - LXA: reduce RGMII drive strenght to reduce EMI emmissions.
 
   - STM32MP25:
     - Add video encoder / video decoder support.
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Merge tag 'stm32-dt-for-v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.9, round 1

Highlights:
----------

- MCU:
  - Add DSI support on stm32f769.
  - Add display support on stm32f769-disco.
  - Add stm32f769-disco-mb1166-reva09 board support which belongs to
    the novatek NT35510 panel.

- MPU:
  - STM32MP13:
    - Add CRC support an enable it on stm32mp135f-dk.
    - Enable CRYP on stm32mp135f-dk.

  - STMP32MP15:
   - Fix DSI peripheral clock: use bus clock instead of kernel clock
     for pclk.

   - LXA: driver powerboard lines as open drain.
   - LXA: reduce RGMII drive strenght to reduce EMI emmissions.

  - STM32MP25:
    - Add video encoder / video decoder support.

* tag 'stm32-dt-for-v6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  arm64: dts: st: add video encoder support to stm32mp255
  arm64: dts: st: add video decoder support to stm32mp255
  ARM: dts: stm32: enable crypto accelerator on stm32mp135f-dk
  ARM: dts: stm32: enable CRC on stm32mp135f-dk
  ARM: dts: stm32: add CRC on stm32mp131
  ARM: dts: add stm32f769-disco-mb1166-reva09
  ARM: dts: stm32: add display support on stm32f769-disco
  ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco
  ARM: dts: stm32: add DSI support on stm32f769
  dt-bindings: mfd: stm32f7: Add binding definition for DSI
  dt-bindings: nt35510: document 'port' property
  ARM: dts: stm32: lxa-tac: reduce RGMII interface drive strength
  ARM: dts: stm32: fix DSI peripheral clock on stm32mp15 boards
  ARM: dts: stm32: lxa-tac: drive powerboard lines as open-drain

Link: https://lore.kernel.org/r/a7ae1058-e24d-4a6b-900f-401f0e3ae17c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-03-04 07:46:45 +01:00
Arnd Bergmann
aefe054f2c Qualcomm ARM64 DeviceTree updates for v6.9
Four variants of Samsung Galaxy Core Prime and Grand Prime, built on
 MSM8916, and the Hardware Development Kit (HDK) for SM8550, are
 introduced.
 
 On X Elite audio and compute remoteprocs, IPCC, PCIe, AOSS QMP, SMP2P,
 TCSR, USB, display, audio, and soundwire support is introduced, and
 enabled across the CRD and QCP devices.
 
 For SM8650 PCIe controllers are moved to GIC-ITS and msi-map-mask is
 defined. Missing qlink-logging reserved-memory region is added for the
 modem remoteproc. FastRPC compute contexts are marked dma-coherent.
 Audio, USB Type-C and PM8010 support is introduced across MTP and QRD
 devices.
 
 GPU cooling devices are hooked up across MSM8916, MSM8939, SC8180X,
 SDM630, SDM845, SM6115, SM8150, SM8250, SM8350, and SM8550.
 
 UFS PHY clocks are corrected across MSM8996, MSM8998, SC8180X, SC8280XP,
 SDM845, SM6115, SM6125, SM8150, SM8250, SM8350, SM8550, and SM8650.
 
 PCI MSI interrupts are wired up across SM8150, SM8250, SM8350, SM8450,
 SM8550, SM8650, SC7280, and SC8180X
 
 On IPQ6018 QUP5 I2C, tsens sand thermal zones are defined. The Inline
 Crypto Engine (ICE) is enabled for IPQ9574.
 
 On MSM8953 the GPU and its IOMMU is introduced, the reset for the
 display subsystem is also wired up.
 
 VLS CLAMP registers are specified for USB3 PHYs on MSM8998, QCM2290, and
 SM6115.
 
 USB Type-C port management is enabled on QRB4210 RB2.
 
 On the SA8295P ADP the MAX20411 regulator powering the GPU rails is
 introduced and the GPU is enabled. The first PCI instance on SA8540P
 Ride is disabled for now, as a fix for the interrupt storm produced here
 has not been presented.
 
 On SA8775P the firmware memory map has changed and is updated. Safety
 IRQ is added to the Ethernet controller.
 
 On SC7180 UFS support is introduced and the cros-ec-spi is marked as
 wakeup source.
 
 For SC7280 capacity and DPC properties are added, cryptobam definition
 is improved to work in more firmware environments, more Chrome-specific
 properties are moved out from main dtsi, and cros-ec-spi is maked as a
 wakeup source. Slimbus definition is added to the platform.
 
 A missing reserved-memory range is added to Fairphone FP5, PMIC GLINK
 and Venus are enabled. LEDs are introduced and voltage settings
 corrected on the QCM6490 IDP, and RB3gen2 sees the same voltage changes
 and GCC protected clocks are introduced to make the board boot properly.
 
 RPMh sleep stats and a variety of cleanups and fixes are introduced for
 SC8180X.
 
 On SC8280XP the additional tsens instances are introduced. Camera
 Subsystem and Camera Control Interface (CCI) are added. PMIC die-temp
 vadc channels are introduced on the CRD, to allow ADC channels to be
 tied to the shared PMIC temp-alarms, to actually report temperature.
 
 On SDM630 USB QMP PHY support is introduced and enabled on the Inforce
 IFC6560 board. On the various Sony Xperia XA2 variants WLED is enabled
 and configured.
 
 On SM6350 display subsystem interconnects and tsens-based thermal zones
 are added. On SM7125 UFS support is added.
 
 On Fairphone FP4, on SM7225, display and GPU are enabled, and firmware
 paths are corrected.
 
 SM8150 PCIe controller definitions are corrected.
 
 As with SM8650, the SM8550 the fastrpc compute contexts are marked
 dm-coherent, and PCIe controllers are moved to use GIC-ITS. The UFS
 controller frequency definition is moved to the generic opp-table.
 Touchscreen is enabled on the QRD device.
 
 As usual, a variety of smaller cleanups and corrections to match
 DeviceTree bindings and style guidelines are introduced across the
 various files.
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Merge tag 'qcom-arm64-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 DeviceTree updates for v6.9

Four variants of Samsung Galaxy Core Prime and Grand Prime, built on
MSM8916, and the Hardware Development Kit (HDK) for SM8550, are
introduced.

On X Elite audio and compute remoteprocs, IPCC, PCIe, AOSS QMP, SMP2P,
TCSR, USB, display, audio, and soundwire support is introduced, and
enabled across the CRD and QCP devices.

For SM8650 PCIe controllers are moved to GIC-ITS and msi-map-mask is
defined. Missing qlink-logging reserved-memory region is added for the
modem remoteproc. FastRPC compute contexts are marked dma-coherent.
Audio, USB Type-C and PM8010 support is introduced across MTP and QRD
devices.

GPU cooling devices are hooked up across MSM8916, MSM8939, SC8180X,
SDM630, SDM845, SM6115, SM8150, SM8250, SM8350, and SM8550.

UFS PHY clocks are corrected across MSM8996, MSM8998, SC8180X, SC8280XP,
SDM845, SM6115, SM6125, SM8150, SM8250, SM8350, SM8550, and SM8650.

PCI MSI interrupts are wired up across SM8150, SM8250, SM8350, SM8450,
SM8550, SM8650, SC7280, and SC8180X

On IPQ6018 QUP5 I2C, tsens sand thermal zones are defined. The Inline
Crypto Engine (ICE) is enabled for IPQ9574.

On MSM8953 the GPU and its IOMMU is introduced, the reset for the
display subsystem is also wired up.

VLS CLAMP registers are specified for USB3 PHYs on MSM8998, QCM2290, and
SM6115.

USB Type-C port management is enabled on QRB4210 RB2.

On the SA8295P ADP the MAX20411 regulator powering the GPU rails is
introduced and the GPU is enabled. The first PCI instance on SA8540P
Ride is disabled for now, as a fix for the interrupt storm produced here
has not been presented.

On SA8775P the firmware memory map has changed and is updated. Safety
IRQ is added to the Ethernet controller.

On SC7180 UFS support is introduced and the cros-ec-spi is marked as
wakeup source.

For SC7280 capacity and DPC properties are added, cryptobam definition
is improved to work in more firmware environments, more Chrome-specific
properties are moved out from main dtsi, and cros-ec-spi is maked as a
wakeup source. Slimbus definition is added to the platform.

A missing reserved-memory range is added to Fairphone FP5, PMIC GLINK
and Venus are enabled. LEDs are introduced and voltage settings
corrected on the QCM6490 IDP, and RB3gen2 sees the same voltage changes
and GCC protected clocks are introduced to make the board boot properly.

RPMh sleep stats and a variety of cleanups and fixes are introduced for
SC8180X.

On SC8280XP the additional tsens instances are introduced. Camera
Subsystem and Camera Control Interface (CCI) are added. PMIC die-temp
vadc channels are introduced on the CRD, to allow ADC channels to be
tied to the shared PMIC temp-alarms, to actually report temperature.

On SDM630 USB QMP PHY support is introduced and enabled on the Inforce
IFC6560 board. On the various Sony Xperia XA2 variants WLED is enabled
and configured.

On SM6350 display subsystem interconnects and tsens-based thermal zones
are added. On SM7125 UFS support is added.

On Fairphone FP4, on SM7225, display and GPU are enabled, and firmware
paths are corrected.

SM8150 PCIe controller definitions are corrected.

As with SM8650, the SM8550 the fastrpc compute contexts are marked
dm-coherent, and PCIe controllers are moved to use GIC-ITS. The UFS
controller frequency definition is moved to the generic opp-table.
Touchscreen is enabled on the QRD device.

As usual, a variety of smaller cleanups and corrections to match
DeviceTree bindings and style guidelines are introduced across the
various files.

* tag 'qcom-arm64-for-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (176 commits)
  arm64: dts: qcom: sm6115: fix USB PHY configuration
  arm64: dts: sm8650: Add msi-map-mask for PCIe nodes
  arm64: dts: qcom: replace underscores in node names
  dt-bindings: arm: qcom: Add Samsung Galaxy Tab 4 10.1 LTE
  arm64: dts: qcom: pm4125: define USB-C related blocks
  arm64: dts: qcom: sa8540p-ride: disable pcie2a node
  arm64: dts: qcom: sc7280: add slimbus DT node
  arm64: dts: qcom: sc7280: Add capacity and DPC properties
  arm64: dts: qcom: pmi632: Add PBS client and use in LPG node
  arm64: dts: qcom: sm8550: Use GIC-ITS for PCIe0 and PCIe1
  arm64: dts: qcom: sm8150: correct PCIe wake-gpios
  arm64: dts: qcom: sdm845-db845c: correct PCIe wake-gpios
  arm64: dts: qcom: sm7225-fairphone-fp4: Enable display and GPU
  arm64: dts: qcom: sm6350: Remove "disabled" state of GMU
  arm64: dts: qcom: msm8916-samsung-fortuna/rossa: Add fuel gauge
  arm64: dts: qcom: sm6350: Add interconnect for MDSS
  arm64: dts: qcom: msm8916-samsung-fortuna/rossa: Add initial device trees
  arm64: dts: qcom: sm8550: Switch UFS from opp-table-hz to opp-v2
  arm64: dts: qcom: sc8180x: describe all PCI MSI interrupts
  arm64: dts: qcom: minor whitespace cleanup
  ...

Link: https://lore.kernel.org/r/20240225050146.484422-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-03-01 11:16:36 +01:00
Georgi Djakov
d1c1649113 Merge branch 'icc-sm7150' into icc-next
Add dt-bindings and interconnect driver support for the Qualcomm SM7150 SoC.

* icc-sm7150
  dt-bindings: interconnect: Add Qualcomm SM7150 DT bindings
  interconnect: qcom: Add SM7150 driver support

Link: https://lore.kernel.org/r/20240222174250.80493-1-danila@jiaxyga.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-02-29 22:43:01 +02:00
Danila Tikhonov
9c4058493b dt-bindings: interconnect: Add Qualcomm SM7150 DT bindings
The Qualcomm SM7150 platform has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240222174250.80493-2-danila@jiaxyga.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-02-29 22:42:19 +02:00
Arnd Bergmann
1422eb8585 Samsung DTS ARM64 changes for v6.9
Mostly work around Google GS101 SoC and Pixel phone (Oriole) adding
 support for:
 
 1. Multi Core Timer (MCT) clocksource.
 2. Several clock controllers (DTS and DT bindings) and use new clocks in
    several other device nodes.
 3. More serial-interface instances: USI8 and USI12 with I2C.
 
 Exynos850:
 1. SPI and DMA controllers (PL330).
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Merge tag 'samsung-dt64-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM64 changes for v6.9

Mostly work around Google GS101 SoC and Pixel phone (Oriole) adding
support for:

1. Multi Core Timer (MCT) clocksource.
2. Several clock controllers (DTS and DT bindings) and use new clocks in
   several other device nodes.
3. More serial-interface instances: USI8 and USI12 with I2C.

Exynos850:
1. SPI and DMA controllers (PL330).

* tag 'samsung-dt64-6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: fsd: Add fifosize for UART in Device Tree
  arm64: dts: exynos: gs101: minor whitespace cleanup
  arm64: dts: exynos: gs101: enable i2c bus 12 on gs101-oriole
  arm64: dts: exynos: gs101: define USI12 with I2C configuration
  arm64: dts: exynos: gs101: enable cmu-peric1 clock controller
  dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
  arm64: dts: exynos: Add SPI nodes for Exynos850
  arm64: dts: exynos: Add PDMA node for Exynos850
  arm64: dts: exynos: gs101: use correct clocks for usi_uart
  arm64: dts: exynos: gs101: use correct clocks for usi8
  arm64: dts: exynos: gs101: sysreg_peric0 needs a clock
  arm64: dts: exynos: gs101: enable eeprom on gs101-oriole
  arm64: dts: exynos: gs101: define USI8 with I2C configuration
  arm64: dts: exynos: gs101: update USI UART to use peric0 clocks
  arm64: dts: exynos: gs101: enable cmu-peric0 clock controller
  arm64: dts: exynos: gs101: remove reg-io-width from serial
  arm64: dts: exynos: gs101: define Multi Core Timer (MCT) node
  dt-bindings: clock: exynos850: Add PDMA clocks
  dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit

Link: https://lore.kernel.org/r/20240218182141.31213-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-02-29 16:10:36 +01:00
Dario Binacchi
55e963738a dt-bindings: mfd: stm32f7: Add binding definition for DSI
Add binding definition for MIPI DSI Host controller.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-02-29 09:50:09 +01:00
Sebastian Reichel
c81798cf9d dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
Add PCLK_VO1GRF to complement PCLK_VO0GRF. This will be needed
for HDMI support.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240126182919.48402-4-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-27 17:04:58 +01:00
Sebastian Reichel
11a29dc2e4 dt-bindings: clock: rk3588: drop CLK_NR_CLKS
CLK_NR_CLKS should not be part of the binding. Let's drop it, since
the kernel code no longer uses it either.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240126182919.48402-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-27 17:04:58 +01:00
Georgi Djakov
6025a81ae6 Merge branch 'icc-cleanup' into icc-next
* icc-cleanup
  interconnect: qcom: sm8550: Remove bogus per-RSC BCMs and nodes
  dt-bindings: interconnect: Remove bogus interconnect nodes
  interconnect: qcom: x1e80100: Remove bogus per-RSC BCMs and nodes
  interconnect: qcom: sa8775p: constify pointer to qcom_icc_node
  interconnect: qcom: sm8250: constify pointer to qcom_icc_node
  interconnect: qcom: sm6115: constify pointer to qcom_icc_node
  interconnect: qcom: sa8775p: constify pointer to qcom_icc_bcm
  interconnect: qcom: x1e80100: constify pointer to qcom_icc_bcm
  dt-bindings: interconnect: qcom,rpmh: Fix bouncing @codeaurora address
  interconnect: constify of_phandle_args in xlate

Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-02-26 00:42:03 +02:00
Sam Protsenko
76dedb9c0b dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1
Document CPU clock management unit compatibles and add corresponding
clock indices. Exynos850 has two CPU clusters (CL0 and CL1), each
containing 4 Cortex-A55 cores. CPU PLLs are generating main CPU clocks
for each cluster, and there are alternate ("switch") clocks that can be
used temporarily while re-configuring the PLL for the new rate. ACLK,
ATCLK, PCLKDBG and PERIPHCLK clocks are driving corresponding buses.
CLK_CLUSTERx_SCLK are actual leaf CPU clocks and should be used to
change CPU rates. Also some CoreSight clocks can be derived from
DBG_USER (debug clock).

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20240224202053.25313-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-02-25 16:48:45 +01:00
Théo Lebrun
4a85e82658 dt-bindings: clock: mobileye,eyeq5-clk: add bindings
Add DT schema bindings for the EyeQ5 clock controller driver.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240221-mbly-clk-v7-3-31d4ce3630c3@bootlin.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-02-21 22:14:28 -08:00
Eddie James
692678b69c dt-bindings: clock: ast2600: Add FSI clock
Add a definition for the FSI clock.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240215220759.976998-2-eajames@linux.ibm.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-02-21 21:45:45 -08:00
Frank Wunderlich
c9d9bea92c dt-bindings: reset: mediatek: add MT7988 infracfg reset IDs
Add reset constants for using as index in driver and dts.

Value is starting again from 0 because resets are used in another device
than existing constants.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240201182409.39878-2-linux@fw-web.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-02-21 21:03:17 -08:00
Chen Wang
41197eb5f9 dt-bindings: reset: sophgo: support SG2042
Add bindings for the reset generator on the SOPHGO SG2042 RISC-V SoC.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/35c348437b6e18972ccaf90d9c38040caccd1f11.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2024-02-21 11:51:39 +01:00
Danila Tikhonov
307b7d8f70 dt-bindings: arm: qcom,ids: Add IDs for SM8475 family
Add Qualcomm SM8475/SM8475P/SM8475_2 (cape) SoC IDs.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240212201428.87151-2-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-13 23:43:11 -06:00
Krzysztof Kozlowski
6e71647145 dt-bindings: use capital "OR" for multiple licenses in SPDX
Documentation/process/license-rules.rst and checkpatch expect the SPDX
identifier syntax for multiple licenses to use capital "OR".  Correct it
to keep consistent format and avoid copy-paste issues.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240208105327.129159-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
2024-02-13 12:12:28 -06:00
Geert Uytterhoeven
abb3fa662b clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks
According to the R-Car V4H Series Hardware User’s Manual Rev.1.00, the
parent clock of the Pin Function (PFC/GPIO) module clocks is the CP
clock.

Fix this by adding the missing CP clock, and correcting the PFC parents.

Fixes: f2afa78d5a ("dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions")
Fixes: 36ff366033 ("clk: renesas: r8a779g0: Add PFC/GPIO clocks")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5401fccd204dc90b44f0013e7f53b9eff8df8214.1706197297.git.geert+renesas@glider.be
2024-02-13 17:10:26 +01:00
Luca Weiss
05d1039503 dt-bindings: power: rpmpd: Add MSM8974 power domains
Add the compatibles and indexes for the rpmpd in MSM8974, both with the
standard PM8841+PM8941 PMICs but also devices found with PMA8084.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240210-msm8974-rpmpd-v2-1-595e2ff80ea1@z3ntu.xyz
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-02-13 13:16:49 +01:00
Bjorn Andersson
286ffaafa6 Merge branch '20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org' into clk-for-6.9
Merge the two SC8180X reset defines through a topic branch, to allow
them being picked up in the DeviceTree source tree as well.
2024-02-07 12:14:48 -06:00
Bjorn Andersson
d3b2afb925 Merge branch '20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz' into clk-for-6.9
Merge MSM8953 GCC DeviceTree binding update through topic branch, to
allow it to be merged into DeviceTree source tree as well.
2024-02-07 12:14:48 -06:00
André Draszik
455061eb32 dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
Add dt-schema documentation and clock IDs for the Connectivity
Peripheral 1 (PERIC1) clock management unit.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240201161258.1013664-3-andre.draszik@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-02-07 16:27:13 +01:00
Bjorn Andersson
cc2bc7a7ab Merge branch '20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org' into HEAD
Merge clock topic branch that introduces the SC8180X CLK_REF enable
clocks.
2024-02-06 17:54:05 -06:00
Manivannan Sadhasivam
26447dad81 dt-bindings: clock: qcom: Add missing UFS QREF clocks
Add missing QREF clocks for UFS MEM and UFS CARD controllers.

Fixes: 0fadcdfdcf ("dt-bindings: clock: Add SC8180x GCC binding")
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-3-58a49d2f4605@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 16:11:03 -06:00
Bjorn Andersson
5ca4cd8eaa Merge branch '20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz' into arm64-for-6.9
Merge MSM8953 GCC DeviceTree binding update from topic branch, to get
access to newly introduced MDSS reset constants.
2024-02-06 16:04:25 -06:00
Vladimir Lypak
18ba9974b8 dt-bindings: clock: gcc-msm8953: add more resets
Add new defines for some more BCRs found on MSM8953.

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
[luca: expand commit message, add more resets]
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20240125-msm8953-mdss-reset-v2-1-fd7824559426@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 16:03:26 -06:00
Bjorn Andersson
78654850f7 Merge branch '20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org' into clk-for-6.9
Merge X1E clock bindings through a topic branch, to make the defines
available for inclusion in DeviceTree branches as well.
2024-02-06 11:11:24 -06:00
Rajendra Nayak
7180f3685d dt-bindings: clock: qcom: Document the X1E80100 Camera Clock Controller
Add bindings documentation for the X1E80100 Camera Clock Controller.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-5-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 11:11:09 -06:00
Abel Vesa
80de9d9dfb dt-bindings: clock: qcom: Document the X1E80100 TCSR Clock Controller
Add bindings documentation for the X1E80100 TCSR Clock Controller.

Co-developed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-4-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 11:11:09 -06:00
Rajendra Nayak
bb213e13ce dt-bindings: clock: qcom: Document the X1E80100 GPU Clock Controller
Add bindings documentation for the X1E80100 Graphics Clock Controller.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-3-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 11:11:09 -06:00
Rajendra Nayak
4f70a09bde dt-bindings: clock: qcom: Document the X1E80100 Display Clock Controller
Add bindings documentation for the X1E80100 Display Clock Controller.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-2-7fb08c861c7c@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-02-06 11:11:09 -06:00
Conor Dooley
c886b7297e dt-bindings: clock: mpfs: add more MSSPLL output definitions
There are 3 undocumented outputs of the MSSPLL that are used for the CAN
bus, "user crypto" module and eMMC. Add their clock IDs so that they can
be hooked up in DT.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-02-06 14:07:18 +00:00
Konrad Dybcio
e92c932674 dt-bindings: interconnect: Remove bogus interconnect nodes
The downstream kernel has infrastructure for passing votes from different
interconnect nodes onto different RPMh RSCs. This neither implemented, not
is going to be implemented upstream (in favor of a different solution
using ICC tags through the same node).

Unfortunately, as it happens, meaningless (in the upstream context) parts
of the vendor driver were copied, ending up causing havoc - since all
"per-RSC" (in quotes because they all point to the main APPS one) BCMs
defined within the driver overwrite the value in RPMh on every
aggregation.

To both avoid keeping bogus code around and possibly introducing
impossible-to-track-down bugs (busses shutting down for no reason), get
rid of the duplicated ICC node definitions.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240102-topic-x1e_fixes-v1-2-70723e08d5f6@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-01-31 15:48:19 +02:00
Adam Skladowski
47878b4512 dt-bindings: interconnect: Add Qualcomm MSM8909 DT bindings
Add bindings for Qualcomm MSM8909 Network-On-Chip interconnect devices.

[Stephan: Drop separate mm-snoc that exists downstream since it's
 actually the same NoC as SNoC in hardware]

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Link: https://lore.kernel.org/r/20231220-icc-msm8909-v2-1-3b68bbed2891@kernkonzept.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2024-01-31 15:08:46 +02:00
Duy Nguyen
3bbdf8c3d3 dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
V4M (R8A779H0) SoC.

Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be
2024-01-31 11:04:14 +01:00
Duy Nguyen
8923149ffc dt-bindings: power: Add r8a779h0 SYSC power domain definitions
Add power domain indices for the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/c5cbef71178cada761e9da7bcbb6f21334f93ef8.1706194617.git.geert+renesas@glider.be
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2024-01-30 13:53:14 +01:00
Satya Priya Kakitapalli
4b3dbd706a dt-bindings: clock: qcom,gcc-sm8150: Add gcc video resets for sm8150
Add gcc video axic, axi0 and axi1 resets for the global clock controller
on sm8150.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240111-sm8150-dfs-support-v2-2-6edb44c83d3b@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-01-28 11:54:09 -06:00
Tengfei Fan
3019d8f7ea dt-bindings: arm: qcom,ids: add SoC ID for QCM8550 and QCS8550
Add the ID for the Qualcomm QCM8550 and QCS8550 SoC, QCS8550 is a QCS
version of QCM8550.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20240119100621.11788-3-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-01-27 21:44:37 -06:00
Sam Protsenko
bc8cc7fb55 dt-bindings: clock: exynos850: Add PDMA clocks
Add constants for Peripheral DMA (PDMA) clocks in CMU_CORE controller:
  - PDMA_ACLK: clock for PDMA0 (regular DMA)
  - SPDMA_ACLK: clock for PDMA1 (secure DMA)

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20240120012948.8836-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-01-23 13:23:11 +01:00
Tudor Ambarus
f80c43887a dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit
Add dt-schema documentation for the Connectivity Peripheral 0 (PERIC0)
clock management unit.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240119111132.1290455-2-tudor.ambarus@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-01-23 10:46:55 +01:00
Linus Torvalds
65163d16fc dmaengine fixes for v6.8-rc1
Driver fixes for:
  - Xilinx xdma driver operator precedence and initialization fix
  - Excess kernel-doc warning fix in imx-sdma xilinx xdma drivers
  - format-overflow warning fix for rz-dmac, sh usb dmac drivers
  - 'output may be truncated' fix for shdma, fsl-qdma and dw-edma drivers
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Merge tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

Pull dmaengine updates from Vinod Koul:
 "New support:
   - Loongson LS2X APB DMA controller
   - sf-pdma: mpfs-pdma support
   - Qualcomm X1E80100 GPI dma controller support

  Updates:
   - Xilinx XDMA updates to support interleaved DMA transfers
   - TI PSIL threads for AM62P and J722S and cfg register regions
     description
   - axi-dmac Improving the cyclic DMA transfers
   - Tegra Support dma-channel-mask property
   - Remaining platform remove callback returning void conversions

 Driver fixes for:
   - Xilinx xdma driver operator precedence and initialization fix
   - Excess kernel-doc warning fix in imx-sdma xilinx xdma drivers
   - format-overflow warning fix for rz-dmac, sh usb dmac drivers
   - 'output may be truncated' fix for shdma, fsl-qdma and dw-edma
     drivers"

* tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (58 commits)
  dmaengine: dw-edma: increase size of 'name' in debugfs code
  dmaengine: fsl-qdma: increase size of 'irq_name'
  dmaengine: shdma: increase size of 'dev_id'
  dmaengine: xilinx: xdma: Fix kernel-doc warnings
  dmaengine: usb-dmac: Avoid format-overflow warning
  dmaengine: sh: rz-dmac: Avoid format-overflow warning
  dmaengine: imx-sdma: fix Excess kernel-doc warnings
  dmaengine: xilinx: xdma: Fix initialization location of desc in xdma_channel_isr()
  dmaengine: xilinx: xdma: Fix operator precedence in xdma_prep_interleaved_dma()
  dmaengine: xilinx: xdma: statify xdma_prep_interleaved_dma
  dmaengine: xilinx: xdma: Workaround truncation compilation error
  dmaengine: pl330: issue_pending waits until WFP state
  dmaengine: xilinx: xdma: Implement interleaved DMA transfers
  dmaengine: xilinx: xdma: Prepare the introduction of interleaved DMA transfers
  dmaengine: xilinx: xdma: Add transfer error reporting
  dmaengine: xilinx: xdma: Add error checking in xdma_channel_isr()
  dmaengine: xilinx: xdma: Rework xdma_terminate_all()
  dmaengine: xilinx: xdma: Ease dma_pool alignment requirements
  dmaengine: xilinx: xdma: Add necessary macro definitions
  dmaengine: xilinx: xdma: Get rid of unused code
  ...
2024-01-20 15:03:25 -08:00
Linus Torvalds
0c4b09cb54 Core:
- Move the generic PM domain and its governor to the pmdomain subsystem
  - Drop the unused pm_genpd_opp_to_performance_state()
 
 Providers:
  - Convert some providers to let the ->remove() callback return void
  - amlogic: Add support for G12A ISP power domain
  - arm: Move the SCPI power-domain driver to the pmdomain subsystem
  - arm: Move Kconfig options to the pmdomain subsystem
  - qcom: Update part number to X1E80100 for the rpmhpd
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Merge tag 'pmdomain-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

Pull pmdomain updates from Ulf Hansson:
 "Core:
   - Move the generic PM domain and its governor to the pmdomain
     subsystem
   - Drop the unused pm_genpd_opp_to_performance_state()

  Providers:
   - Convert some providers to let the ->remove() callback return void
   - amlogic: Add support for G12A ISP power domain
   - arm: Move the SCPI power-domain driver to the pmdomain subsystem
   - arm: Move Kconfig options to the pmdomain subsystem
   - qcom: Update part number to X1E80100 for the rpmhpd"

* tag 'pmdomain-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm:
  PM: domains: Move genpd and its governor to the pmdomain subsystem
  PM: domains: Drop redundant header for genpd
  PM: domains: Drop the unused pm_genpd_opp_to_performance_state()
  PM: domains: fix domain_governor kernel-doc warnings
  pmdomain: xilinx/zynqmp: Convert to platform remove callback returning void
  pmdomain: qcom-cpr: Convert to platform remove callback returning void
  pmdomain: imx93-pd: Convert to platform remove callback returning void
  pmdomain: imx93-blk-ctrl: Convert to platform remove callback returning void
  pmdomain: imx8mp-blk-ctrl: Convert to platform remove callback returning void
  pmdomain: imx8m-blk-ctrl: Convert to platform remove callback returning void
  pmdomain: imx-gpcv2: Convert to platform remove callback returning void
  pmdomain: imx-gpc: Convert to platform remove callback returning void
  pmdomain: imx-pgc: Convert to platform remove callback returning void
  pmdomain: amlogic: meson-ee-pwrc: add support for G12A ISP power domain
  dt-bindings: power: meson-g12a-power: document ISP power domain
  firmware: arm_scpi: Move power-domain driver to the pmdomain dir
  pmdomain: arm_scmi: Move Kconfig options to the pmdomain subsystem
  pmdomain: qcom: rpmhpd: Update part number to X1E80100
  dt-bindings: power: rpmpd: Update part number to X1E80100
2024-01-12 13:54:25 -08:00
Linus Torvalds
c736c9a955 Only a couple new SoCs have support added this time, primarily for Qualcomm
SM8650 based on the diffstat. Otherwise this is a collection of non-critical
 fixes and cleanups to various clk drivers and their DT bindings. Nothing is
 changed in the core clk framework this time, although there's a patch to fix a
 basic clk type initialization function. In general, this pile looks to be on
 the smaller side.
 
 New Drivers:
  - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
  - Mediatek MT7988 SoC clocks
 
 Updates:
  - Update Zynqmp driver for Versal NET platforms
  - Add clk driver for Versal clocking wizard IP
  - Support for stm32mp25 clks
  - Add glitch free PLL setting support to si5351 clk driver
  - Add DSI clocks on Amlogic g12/sm1
  - Add CSI and ISP clocks on Amlogic g12/sm1
  - Document bindings for i.MX93 ANATOP clock driver
  - Free clk_node in i.MX SCU driver for resource with different owner
  - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
  - Fix the name of the fvco in i.MX pll14xx by renaming it to fout
  - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
  - Add interrupt controller and Ethernet clocks and resets on Renesas RZ/G3S
  - Check reset monitor registers on Renesas RZ/G2L-alike SoCs
  - Reuse reset functionality in the Renesas RZ/G2L clock driver
  - Global and RPMh clock support for the Qualcomm X1E80100 SoC
  - Support for the Stromer APCS PLL found in Qualcomm IPQ5018
  - Add a new type of branch clock, with support for controlling separate
    memory control bits, to the Qualcomm clk driver
  - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000 and
    QRU1000
  - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
  - Add support for the camera clock controller on Qualcomm SC8280XP
  - Correct PLL configuration in GPU and video clock controllers for
    Qualcomm SM8150
  - Add runtime PM support and a few missing resets to Qualcomm SM8150
    video clock controller
  - Fix configuration of various GCC GDSCs on Qualcomm SM8550
  - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
  - Fix up GPU and display clock controllers PLL configuration settings
    on Qualcomm SM8550
  - Cleanup variable init in Allwinner nkm module
  - Convert various DT bindings to YAML
  - A few kernel-doc fixes for Samsung SoC clock controllers
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Only a couple new SoCs have support added this time, primarily for
  Qualcomm SM8650 based on the diffstat. Otherwise this is a collection
  of non-critical fixes and cleanups to various clk drivers and their DT
  bindings.

  Nothing is changed in the core clk framework this time, although
  there's a patch to fix a basic clk type initialization function. In
  general, this pile looks to be on the smaller side.

  New Drivers:
   - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
   - Mediatek MT7988 SoC clocks

  Updates:
   - Update Zynqmp driver for Versal NET platforms
   - Add clk driver for Versal clocking wizard IP
   - Support for stm32mp25 clks
   - Add glitch free PLL setting support to si5351 clk driver
   - Add DSI clocks on Amlogic g12/sm1
   - Add CSI and ISP clocks on Amlogic g12/sm1
   - Document bindings for i.MX93 ANATOP clock driver
   - Free clk_node in i.MX SCU driver for resource with different owner
   - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
   - Fix the name of the fvco in i.MX pll14xx by renaming it to fout
   - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
   - Add interrupt controller and Ethernet clocks and resets on Renesas
     RZ/G3S
   - Check reset monitor registers on Renesas RZ/G2L-alike SoCs
   - Reuse reset functionality in the Renesas RZ/G2L clock driver
   - Global and RPMh clock support for the Qualcomm X1E80100 SoC
   - Support for the Stromer APCS PLL found in Qualcomm IPQ5018
   - Add a new type of branch clock, with support for controlling
     separate memory control bits, to the Qualcomm clk driver
   - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000
     and QRU1000
   - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
   - Add support for the camera clock controller on Qualcomm SC8280XP
   - Correct PLL configuration in GPU and video clock controllers for
     Qualcomm SM8150
   - Add runtime PM support and a few missing resets to Qualcomm SM8150
     video clock controller
   - Fix configuration of various GCC GDSCs on Qualcomm SM8550
   - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
   - Fix up GPU and display clock controllers PLL configuration settings
     on Qualcomm SM8550
   - Cleanup variable init in Allwinner nkm module
   - Convert various DT bindings to YAML
   - A few kernel-doc fixes for Samsung SoC clock controllers"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits)
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
  clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx
  clk: starfive: Add flags argument to JH71X0__MUX macro
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  ...
2024-01-12 13:42:35 -08:00
Linus Torvalds
cf65598d59 drm-next for 6.8:
new drivers:
 - imagination - new driver for Imagination Technologies GPU
 - xe - new driver for Intel GPUs using core drm concepts
 
 core:
 - add CLOSE_FB ioctl
 - remove old UMS ioctls
 - increase max objects to accomodate AMD color mgmt
 
 encoder:
 - create per-encoder debugfs directory
 
 edid:
 - split out drm_eld
 - SAD helpers
 - drop edid_firmware module parameter
 
 format-helper:
 - cache format conversion buffers
 
 sched:
 - move from kthread to workqueue
 - rename some internals
 - implement dynamic job-flow control
 
 gpuvm:
 - provide more features to handle GEM objects
 
 client:
 - don't acquire module reference
 
 displayport:
 - add mst path property documentation
 
 fdinfo:
 - alignment fix
 
 dma-buf:
 - add fence timestamp helper
 - add fence deadline support
 
 bridge:
 - transparent aux-bridge for DP/USB-C
 - lt8912b: add suspend/resume support and power regulator support
 
 panel:
 - edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49
 - chromebook panel support
 - elida-kd35t133: rework pm
 - powkiddy RK2023 panel
 - himax-hx8394: drop prepare/unprepare and shutdown logic
 - BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G
 - Evervision VGG644804, SDC ATNA45AF01
 - nv3052c: register docs, init sequence fixes, fascontek FS035VG158
 - st7701: Anbernic RG-ARC support
 - r63353 panel controller
 - Ilitek ILI9805 panel controller
 - AUO G156HAN04.0
 
 simplefb:
 - support memory regions
 - support power domains
 
 amdgpu:
 - add new 64-bit sequence number infrastructure
 - add AMD specific color management
 - ACPI WBRF support for RF interference handling
 - GPUVM updates
 - RAS updates
 - DCN 3.5 updates
 - Rework PCIe link speed handling
 - Document GPU reset types
 - DMUB fixes
 - eDP fixes
 - NBIO 7.9/7.11 updates
 - SubVP updates
 - XGMI PCIe state dumping for aqua vanjaram
 - GFX11 golden register updates
 - enable tunnelling on high pri compute
 
 amdkfd:
 - Migrate TLB flushing logic to amdgpu
 - Trap handler fixes
 - Fix restore workers handling on suspend/resume
 - Fix possible memory leak in pqm_uninit()
 - support import/export of dma-bufs using GEM handles
 
 radeon:
 - fix possible overflows in command buffer checking
 - check for errors in ring_lock
 
 i915:
 - reorg display code for reuse in xe driver
 - fdinfo memory stats printing
 - DP MST bandwidth mgmt improvements
 - DP panel replay enabling
 - MTL C20 phy state verification
 - MTL DP DSC fractional bpp support
 - Audio fastset support
 - use dma_fence interfaces instead of i915_sw_fence
 - Separate gem and display code
 - AUX register macro refactoring
 - Separate display module/device parameters
 - Move display capabilities debugfs under display
 - Makefile cleanups
 - Register cleanups
 - Move display lock inits under display/
 - VLV/CHV DPIO PHY register and interface refactoring
 - DSI VBT sequence refactoring
 - C10/C20 PHY PLL hardware readout
 - DPLL code cleanups
 - Cleanup PXP plane protection checks
 - Improve display debug msgs
 - PSR selective fetch fixes/improvements
 - DP MST fixes
 - Xe2LPD FBC restrictions removed
 - DGFX uses direct VBT pin mapping
 - more MTL WAs
 - fix MTL eDP bug
 - eliminate use of kmap_atomic
 
 habanalabs:
 - sysfs entry to identify a device minor id with debugfs path
 - sysfs entry to expose device module id
 - add signed device info retrieval through INFO ioctl
 - add Gaudi2C device support
 - pcie reset prepare/done hooks
 
 msm:
 - Add support for SDM670, SM8650
 - Handle the CFG interconnect to fix the obscure hangs / timeouts
 - Kconfig fix for QMP dependency
 - use managed allocators
 - DPU: SDM670, SM8650 support
 - DPU: Enable SmartDMA on SM8350 and SM8450
 - DP: enable runtime PM support
 - GPU: add metadata UAPI
 - GPU: move devcoredumps to GPU device
 - GPU: convert to drm_exec
 
 ivpu:
 - update FW API
 - new debugfs file
 - a new NOP job submission test mode
 - improve suspend/resume
 - PM improvements
 - MMU PT optimizations
 - firmware profile frequency support
 - support for uncached buffers
 - switch to gem shmem helpers
 - replace kthread with threaded irqs
 
 rockchip:
 - rk3066_hdmi: convert to atomic
 - vop2: support nv20 and nv30
 - rk3588 support
 
 mediatek:
 - use devm_platform_ioremap_resource
 - stop using iommu_present
 - MT8188 VDOSYS1 display support
 
 panfrost:
 - PM improvements
 - improve interrupt handling as poweroff
 
 qaic:
 - allow to run with single MSI
 - support host/device time sync
 - switch to persistent DRM devices
 
 exynos:
 - fix potential error pointer dereference
 - fix wrong error checking
 - add missing call to drm_atomic_helper_shutdown
 
 omapdrm:
 - dma-fence lockdep annotation fix
 
 tidss:
 - dma-fence lockdep annotation fix
 - support for AM62A7
 
 v3d:
 - BCM2712 - rpi5 support
 - fdinfo + gputop support
 - uapi for CPU job handling
 
 virtio-gpu:
 - add context debug name
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Merge tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "This contains two major new drivers:

   - imagination is a first driver for Imagination Technologies devices,
     it only covers very specific devices, but there is hope to grow it

   - xe is a reboot of the i915 GPU (shares display) side using a more
     upstream focused development model, and trying to maximise code
     sharing. It's not enabled for any hw by default, and will hopefully
     get switched on for Intel's Lunarlake.

  This also drops a bunch of the old UMS ioctls. It's been dead long
  enough.

  amdgpu has a bunch of new color management code that is being used in
  the Steam Deck.

  amdgpu also has a new ACPI WBRF interaction to help avoid radio
  interference.

  Otherwise it's the usual lots of changes in lots of places.

  Detailed summary:

  new drivers:
   - imagination - new driver for Imagination Technologies GPU
   - xe - new driver for Intel GPUs using core drm concepts

  core:
   - add CLOSE_FB ioctl
   - remove old UMS ioctls
   - increase max objects to accomodate AMD color mgmt

  encoder:
   - create per-encoder debugfs directory

  edid:
   - split out drm_eld
   - SAD helpers
   - drop edid_firmware module parameter

  format-helper:
   - cache format conversion buffers

  sched:
   - move from kthread to workqueue
   - rename some internals
   - implement dynamic job-flow control

  gpuvm:
   - provide more features to handle GEM objects

  client:
   - don't acquire module reference

  displayport:
   - add mst path property documentation

  fdinfo:
   - alignment fix

  dma-buf:
   - add fence timestamp helper
   - add fence deadline support

  bridge:
   - transparent aux-bridge for DP/USB-C
   - lt8912b: add suspend/resume support and power regulator support

  panel:
   - edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49
   - chromebook panel support
   - elida-kd35t133: rework pm
   - powkiddy RK2023 panel
   - himax-hx8394: drop prepare/unprepare and shutdown logic
   - BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G
   - Evervision VGG644804, SDC ATNA45AF01
   - nv3052c: register docs, init sequence fixes, fascontek FS035VG158
   - st7701: Anbernic RG-ARC support
   - r63353 panel controller
   - Ilitek ILI9805 panel controller
   - AUO G156HAN04.0

  simplefb:
   - support memory regions
   - support power domains

  amdgpu:
   - add new 64-bit sequence number infrastructure
   - add AMD specific color management
   - ACPI WBRF support for RF interference handling
   - GPUVM updates
   - RAS updates
   - DCN 3.5 updates
   - Rework PCIe link speed handling
   - Document GPU reset types
   - DMUB fixes
   - eDP fixes
   - NBIO 7.9/7.11 updates
   - SubVP updates
   - XGMI PCIe state dumping for aqua vanjaram
   - GFX11 golden register updates
   - enable tunnelling on high pri compute

  amdkfd:
   - Migrate TLB flushing logic to amdgpu
   - Trap handler fixes
   - Fix restore workers handling on suspend/resume
   - Fix possible memory leak in pqm_uninit()
   - support import/export of dma-bufs using GEM handles

  radeon:
   - fix possible overflows in command buffer checking
   - check for errors in ring_lock

  i915:
   - reorg display code for reuse in xe driver
   - fdinfo memory stats printing
   - DP MST bandwidth mgmt improvements
   - DP panel replay enabling
   - MTL C20 phy state verification
   - MTL DP DSC fractional bpp support
   - Audio fastset support
   - use dma_fence interfaces instead of i915_sw_fence
   - Separate gem and display code
   - AUX register macro refactoring
   - Separate display module/device parameters
   - Move display capabilities debugfs under display
   - Makefile cleanups
   - Register cleanups
   - Move display lock inits under display/
   - VLV/CHV DPIO PHY register and interface refactoring
   - DSI VBT sequence refactoring
   - C10/C20 PHY PLL hardware readout
   - DPLL code cleanups
   - Cleanup PXP plane protection checks
   - Improve display debug msgs
   - PSR selective fetch fixes/improvements
   - DP MST fixes
   - Xe2LPD FBC restrictions removed
   - DGFX uses direct VBT pin mapping
   - more MTL WAs
   - fix MTL eDP bug
   - eliminate use of kmap_atomic

  habanalabs:
   - sysfs entry to identify a device minor id with debugfs path
   - sysfs entry to expose device module id
   - add signed device info retrieval through INFO ioctl
   - add Gaudi2C device support
   - pcie reset prepare/done hooks

  msm:
   - Add support for SDM670, SM8650
   - Handle the CFG interconnect to fix the obscure hangs / timeouts
   - Kconfig fix for QMP dependency
   - use managed allocators
   - DPU: SDM670, SM8650 support
   - DPU: Enable SmartDMA on SM8350 and SM8450
   - DP: enable runtime PM support
   - GPU: add metadata UAPI
   - GPU: move devcoredumps to GPU device
   - GPU: convert to drm_exec

  ivpu:
   - update FW API
   - new debugfs file
   - a new NOP job submission test mode
   - improve suspend/resume
   - PM improvements
   - MMU PT optimizations
   - firmware profile frequency support
   - support for uncached buffers
   - switch to gem shmem helpers
   - replace kthread with threaded irqs

  rockchip:
   - rk3066_hdmi: convert to atomic
   - vop2: support nv20 and nv30
   - rk3588 support

  mediatek:
   - use devm_platform_ioremap_resource
   - stop using iommu_present
   - MT8188 VDOSYS1 display support

  panfrost:
   - PM improvements
   - improve interrupt handling as poweroff

  qaic:
   - allow to run with single MSI
   - support host/device time sync
   - switch to persistent DRM devices

  exynos:
   - fix potential error pointer dereference
   - fix wrong error checking
   - add missing call to drm_atomic_helper_shutdown

  omapdrm:
   - dma-fence lockdep annotation fix

  tidss:
   - dma-fence lockdep annotation fix
   - support for AM62A7

  v3d:
   - BCM2712 - rpi5 support
   - fdinfo + gputop support
   - uapi for CPU job handling

  virtio-gpu:
   - add context debug name"

* tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm: (2340 commits)
  drm/amd/display: Allow z8/z10 from driver
  drm/amd/display: fix bandwidth validation failure on DCN 2.1
  drm/amdgpu: apply the RV2 system aperture fix to RN/CZN as well
  drm/amd/display: Move fixpt_from_s3132 to amdgpu_dm
  drm/amd/display: Fix recent checkpatch errors in amdgpu_dm
  Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole"
  drm/amd/display: avoid stringop-overflow warnings for dp_decide_lane_settings()
  drm/amd/display: Fix power_helpers.c codestyle
  drm/amd/display: Fix hdcp_log.h codestyle
  drm/amd/display: Fix hdcp2_execution.c codestyle
  drm/amd/display: Fix hdcp_psp.h codestyle
  drm/amd/display: Fix freesync.c codestyle
  drm/amd/display: Fix hdcp_psp.c codestyle
  drm/amd/display: Fix hdcp1_execution.c codestyle
  drm/amd/pm/smu7: fix a memleak in smu7_hwmgr_backend_init
  drm/amdkfd: Fix iterator used outside loop in 'kfd_add_peer_prop()'
  drm/amdgpu: Drop 'fence' check in 'to_amdgpu_amdkfd_fence()'
  drm/amdkfd: Confirm list is non-empty before utilizing list_first_entry in kfd_topology.c
  drm/amdgpu: Fix '*fw' from request_firmware() not released in 'amdgpu_ucode_request()'
  drm/amdgpu: Fix variable 'mca_funcs' dereferenced before NULL check in 'amdgpu_mca_smu_get_mca_entry()'
  ...
2024-01-12 11:32:19 -08:00
Linus Torvalds
f6597d1706 SoC: driver updates for 6.8
A new drivers/cache/ subsystem is added to contain drivers for abstracting
 cache flush methods on riscv and potentially others, as this is needed for
 handling non-coherent DMA but several SoCs require nonstandard hardware
 methods for it.
 
 op-tee gains support for asynchronous notification with FF-A, as well
 as support for a system thread for executing in secure world.
 
 The tee, reset, bus, memory and scmi subsystems have a couple of minor
 updates.
 
 Platform specific soc driver changes include:
 
  - Samsung Exynos gains driver support for Google GS101 (Tensor G1)
    across multiple subsystems
 
  - Qualcomm Snapdragon gains support for SM8650 and X1E along with
    added features for some other SoCs
 
  - Mediatek adds support for "Smart Voltage Scaling" on MT8186 and MT8195,
    and driver support for MT8188 along with some code refactoring.
 
  - Microchip Polarfire FPGA support for "Auto Update" of the FPGA bitstream
 
  - Apple M1 mailbox driver is rewritten into a SoC driver
 
  - minor updates on amlogic, mvebu, ti, zynq, imx, renesas and hisilicon
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Merge tag 'soc-drivers-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
 "A new drivers/cache/ subsystem is added to contain drivers for
  abstracting cache flush methods on riscv and potentially others, as
  this is needed for handling non-coherent DMA but several SoCs require
  nonstandard hardware methods for it.

  op-tee gains support for asynchronous notification with FF-A, as well
  as support for a system thread for executing in secure world.

  The tee, reset, bus, memory and scmi subsystems have a couple of minor
  updates.

  Platform specific soc driver changes include:

   - Samsung Exynos gains driver support for Google GS101 (Tensor G1)
     across multiple subsystems

   - Qualcomm Snapdragon gains support for SM8650 and X1E along with
     added features for some other SoCs

   - Mediatek adds support for "Smart Voltage Scaling" on MT8186 and
     MT8195, and driver support for MT8188 along with some code
     refactoring.

   - Microchip Polarfire FPGA support for "Auto Update" of the FPGA
     bitstream

   - Apple M1 mailbox driver is rewritten into a SoC driver

   - minor updates on amlogic, mvebu, ti, zynq, imx, renesas and
     hisilicon"

* tag 'soc-drivers-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (189 commits)
  memory: ti-emif-pm: Convert to platform remove callback returning void
  memory: ti-aemif: Convert to platform remove callback returning void
  memory: tegra210-emc: Convert to platform remove callback returning void
  memory: tegra186-emc: Convert to platform remove callback returning void
  memory: stm32-fmc2-ebi: Convert to platform remove callback returning void
  memory: exynos5422-dmc: Convert to platform remove callback returning void
  memory: renesas-rpc-if: Convert to platform remove callback returning void
  memory: omap-gpmc: Convert to platform remove callback returning void
  memory: mtk-smi: Convert to platform remove callback returning void
  memory: jz4780-nemc: Convert to platform remove callback returning void
  memory: fsl_ifc: Convert to platform remove callback returning void
  memory: fsl-corenet-cf: Convert to platform remove callback returning void
  memory: emif: Convert to platform remove callback returning void
  memory: brcmstb_memc: Convert to platform remove callback returning void
  memory: brcmstb_dpfe: Convert to platform remove callback returning void
  soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offset
  firmware: qcom: qseecom: fix memory leaks in error paths
  dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
  soc: qcom: llcc: Fix typo in kernel-doc
  dt-bindings: soc: qcom,aoss-qmp: document the X1E80100 Always-On Subsystem side channel
  ...
2024-01-11 11:31:46 -08:00
Stephen Boyd
a4dcb2f84b Merge branches 'clk-zynq', 'clk-xilinx' and 'clk-stm' into clk-next
- Update Zynqmp driver for Versal NET platforms
 - Add clk driver for Versal clocking wizard IP

* clk-zynq:
  drivers: clk: zynqmp: update divider round rate logic
  drivers: clk: zynqmp: calculate closest mux rate

* clk-xilinx:
  clocking-wizard: Add support for versal clocking wizard
  dt-bindings: clock: xilinx: add versal compatible

* clk-stm:
  dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform
  clk: stm32mp1: use stm32mp13 reset driver
  clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
2024-01-09 11:55:06 -08:00
Stephen Boyd
23bd8c4ad1 Merge branches 'clk-imx', 'clk-qcom', 'clk-amlogic' and 'clk-mediatek' into clk-next
* clk-imx:
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  dt-bindings: clock: support i.MX93 ANATOP clock module

* clk-qcom: (41 commits)
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  clk: qcom: gcc-sm8550: Mark RCGs shared where applicable
  clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs
  clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable
  clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag
  clk: qcom: camcc-sc8280xp: Prevent error pointer dereference
  clk: qcom: videocc-sm8150: Add runtime PM support
  clk: qcom: videocc-sm8150: Add missing PLL config property
  clk: qcom: videocc-sm8150: Update the videocc resets
  dt-bindings: clock: Update the videocc resets for sm8150
  clk: qcom: rpmh: Add support for X1E80100 rpmh clocks
  clk: qcom: Add Global Clock controller (GCC) driver for X1E80100
  dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100
  dt-bindings: clock: qcom: Add X1E80100 GCC clocks
  clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000
  clk: qcom: branch: Add mem ops support for branch2 clocks
  ...

* clk-amlogic:
  clk: meson: g12a: add CSI & ISP gates clocks
  clk: meson: g12a: add MIPI ISP clocks
  dt-bindings: clock: g12a-clkc: add MIPI ISP & CSI PHY clock ids
  clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks
  dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids

* clk-mediatek:
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: brcm,kona-ccu: convert to YAML
  dt-bindings: arm: mediatek: move ethsys controller & convert to DT schema
  dt-bindings: Remove alt_ref from versal
2024-01-09 11:52:49 -08:00
Daniel Golle
5cfa3beb77 dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
Add reset ID for ethwarp subsystem allowing to reset the built-in
Ethernet switch of the MediaTek MT7988 SoC.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/0c14bbacf471683af67ffa7572bfa1d5c45a0b5d.1702849494.git.daniel@makrotopia.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-03 15:55:15 -08:00
Sam Shih
8187e001de dt-bindings: clock: mediatek: add MT7988 clock IDs
Add MT7988 clock dt-bindings for topckgen, apmixedsys, infracfg,
ethernet and xfipll subsystem clocks.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/27f99db432e9ccc804cc5b6501d7d17d72cae879.1702849494.git.daniel@makrotopia.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-03 15:55:12 -08:00
Inochi Amaoto
5a72f07111 dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
Add definition for the clock controller of the CV1800 series SoC.

For CV181X, it has a clock that CV180X does not have. To avoid misuse,
also add a compatible string to identify CV181X series SoC.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://github.com/milkv-duo/duo-files/blob/main/hardware/CV1800B/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-03 15:52:52 -08:00
Arnd Bergmann
2d7123c7e1 Qualcomm ARM64 updates for v6.8
Support is added for the new Snapdragon 8 Gen 3 mobile platform, with
 support for the MTP and QRD development devices, the new Snapdragon X
 Elite compute platform with QCP and CRD development/references devices,
 the QCS6590/QCM6490 platform with support for the IDP development device
 and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset
 built on MSM8939, and Xiaomi Pad 6 on SM8250.
 
 On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one
 additional QUP SPI controller is added.
 
 CPU OPP tables are selectively enabled based on fuses, for both IPQ5332
 and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes.
 
 Common elements of the IPQ9574 RDP boards are refactored into a common
 include file. IPQ9574 also gains description of its LEDs and WPS
 busttons.
 
 MSM8916 finally gets the DSP-based audio described, and this is enabled
 for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains
 notification LED, battery and charger support is added to Loncheer
 L8150, and GPU is enabled for Samsung Galaxy Tab A.
 
 Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is
 enabled as well. The Longcheer L9100 gains RGB notification LED support,
 and the wireless subsystem is enabled.
 
 Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is
 enabled, to allow using wakeup interrupts. Interconnect providers, MPM
 and display are added to QCM2290.
 
 UFS, remoteprocs and WiFi is enabled for Fairphone FP5.
 On Fairphone FP3 audio, WiFi and Bluetooth are enabled.
 
 On the Robotics RB1, HDMI and the CAN bus controller are added. On
 Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled.
 Bluetooth is enabled on the Robotics RB5.
 
 On SA8775P tsens and thermal is added, as well as the random number
 generator.
 
 Sound and RTC support is added for the Acer Aspire 1.
 
 On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices
 to inherit the base dtsi. Support for UFS, crypto, TrustZone based
 remoteprocs, the Camera Control Interface (CCI) and random number
 generator support are added. Additionally a variety of smaller fixes are
 introduced.
 
 A variety of fixes are introduced for SC8180X, in particular missing
 power-domains and interconnects.
 
 On SC8280XP the camera clock controller is added, and a number of
 smaller fixes are introduced.
 
 The display subsystem in SDM670 is described.
 
 On SDX75 interconnect providers are added, as is USB3 and the related
 PHY, which is then enabled on the IDP device.
 
 On SM6115 interconnect providers are added and existing clients are
 wired up. A UART controller is added as well.
 
 The MPM is added, to provide wakeup interrutps, on SM6375. The modem
 subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator
 supplies are corrected.
 
 On SM8150 the DisplayPort controller is added, for USB Type-C output,
 which together with the addition of HDMI is described on the HDK board.
 
 GPU and random number generator support are added to SM8450, and enabled
 on the HDK board.
 
 On SM8550 GPU, IPA, random number generator, missing SoundWire ports are
 added, and enabled on both MTP and QRD devices.
 
 Additionally a large number of smaller functional and DeviceTree binding
 validation issues are corrected across a variety of platforms.
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Merge tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 updates for v6.8

Support is added for the new Snapdragon 8 Gen 3 mobile platform, with
support for the MTP and QRD development devices, the new Snapdragon X
Elite compute platform with QCP and CRD development/references devices,
the QCS6590/QCM6490 platform with support for the IDP development device
and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset
built on MSM8939, and Xiaomi Pad 6 on SM8250.

On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one
additional QUP SPI controller is added.

CPU OPP tables are selectively enabled based on fuses, for both IPQ5332
and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes.

Common elements of the IPQ9574 RDP boards are refactored into a common
include file. IPQ9574 also gains description of its LEDs and WPS
busttons.

MSM8916 finally gets the DSP-based audio described, and this is enabled
for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains
notification LED, battery and charger support is added to Loncheer
L8150, and GPU is enabled for Samsung Galaxy Tab A.

Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is
enabled as well. The Longcheer L9100 gains RGB notification LED support,
and the wireless subsystem is enabled.

Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is
enabled, to allow using wakeup interrupts. Interconnect providers, MPM
and display are added to QCM2290.

UFS, remoteprocs and WiFi is enabled for Fairphone FP5.
On Fairphone FP3 audio, WiFi and Bluetooth are enabled.

On the Robotics RB1, HDMI and the CAN bus controller are added. On
Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled.
Bluetooth is enabled on the Robotics RB5.

On SA8775P tsens and thermal is added, as well as the random number
generator.

Sound and RTC support is added for the Acer Aspire 1.

On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices
to inherit the base dtsi. Support for UFS, crypto, TrustZone based
remoteprocs, the Camera Control Interface (CCI) and random number
generator support are added. Additionally a variety of smaller fixes are
introduced.

A variety of fixes are introduced for SC8180X, in particular missing
power-domains and interconnects.

On SC8280XP the camera clock controller is added, and a number of
smaller fixes are introduced.

The display subsystem in SDM670 is described.

On SDX75 interconnect providers are added, as is USB3 and the related
PHY, which is then enabled on the IDP device.

On SM6115 interconnect providers are added and existing clients are
wired up. A UART controller is added as well.

The MPM is added, to provide wakeup interrutps, on SM6375. The modem
subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator
supplies are corrected.

On SM8150 the DisplayPort controller is added, for USB Type-C output,
which together with the addition of HDMI is described on the HDK board.

GPU and random number generator support are added to SM8450, and enabled
on the HDK board.

On SM8550 GPU, IPA, random number generator, missing SoundWire ports are
added, and enabled on both MTP and QRD devices.

Additionally a large number of smaller functional and DeviceTree binding
validation issues are corrected across a variety of platforms.

* tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (288 commits)
  arm64: dts: qcom: sc8180x-primus: Allow UFS regulators load/mode setting
  arm64: dts: qcom: sc8180x: Describe the GIC redistributor
  arm64: dts: qcom: sc8180x: Add interconnects to UFS
  arm64: dts: qcom: sc8180x: Add missing MDP clocks
  arm64: dts: qcom: sc8180x: Add UFS GDSC
  arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi
  arm64: dts: qcom: sc7280: Rename reserved-memory nodes
  arm64: dts: qcom: sc7280: Remove unused second MPSS reg
  arm64: dts: qcom: sdm670: add display subsystem
  arm64: dts: qcom: sm8150-hdk: enable DisplayPort and USB-C altmode
  arm64: dts: qcom: sm8150: add USB-C ports to the OTG USB host
  arm64: dts: qcom: sm8150: add USB-C ports to the USB+DP QMP PHY
  arm64: dts: qcom: sm8150: add DisplayPort controller
  arm64: dts: qcom: sm8150-hdk: fix SS USB regulators
  arm64: dts: qcom: sm8150-hdk: enable HDMI output
  arm64: dts: qcom: sm8150: make dispcc cast minimal vote on MMCX
  arm64: dts: qcom: sm8650: add fastrpc-compute-cb nodes
  arm64: dts: qcom: sm8550-qrd: add PM8010 regulators
  arm64: dts: qcom: sm8550-mtp: Add pm8010 regulators
  arm64: dts: qcom: qcm2290: Hook up MPM
  ...

Link: https://lore.kernel.org/r/20231219145402.874161-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22 11:45:31 +00:00
Arnd Bergmann
feb69ea40a Reset controller updates for v6.8
Make use of devm_platform_get_and_ioremap_resource() and
 device_get_match_data() in several drivers, support the Amlogic C3 reset
 controller, and improve various device tree binding documents.
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Merge tag 'reset-for-v6.8' of git://git.pengutronix.de/pza/linux into soc/drivers

Reset controller updates for v6.8

Make use of devm_platform_get_and_ioremap_resource() and
device_get_match_data() in several drivers, support the Amlogic C3 reset
controller, and improve various device tree binding documents.

* tag 'reset-for-v6.8' of git://git.pengutronix.de/pza/linux:
  dt-bindings: reset: hisilicon,hi3660-reset: Drop providers and consumers from example
  dt-bindings: reset: imx-src: Simplify compatible schema and drop unneeded quotes
  dt-bindings: reset: qcom: drop unneeded quotes
  dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/Five SoC
  reset: Use device_get_match_data()
  reset: reset-meson: add support for Amlogic C3 SoC Reset Controller
  dt-bindings: reset: Add compatible and DT bindings for Amlogic C3 Reset Controller
  reset: uniphier-glue: Use devm_platform_get_and_ioremap_resource()
  reset: sunplus: Use devm_platform_get_and_ioremap_resource()
  reset: simple: Convert to devm_platform_get_and_ioremap_resource()
  reset: qcom: Convert to devm_platform_ioremap_resource()
  reset: qcom-aoss: Convert to devm_platform_ioremap_resource()
  reset: meson-audio-arb: Convert to devm_platform_ioremap_resource()
  reset: brcmstb: Use devm_platform_get_and_ioremap_resource()

Link: https://lore.kernel.org/r/20231213153313.278867-1-p.zabel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22 11:36:16 +00:00
Arnd Bergmann
ec5b7be617 Samsung SoC driver changes for v6.8
1. Add support for Google GS101 SoC to different drivers: clock
    controller, serial and watchdog.
 
    The clock driver changes depend on few bindings headers, which I put
    in a topic branch with the bindings refactoring and GS101 support,
    therefore this this pull request includes that bindings topic branch.
 
    The rest of the bindings topic branch is not necessary here, however
    keeping everything together makes it easier to share between
    branches.  The bindings topic branch is mostly refactoring all the
    compatibles to add SoC-specific compatible followed by fallback.
 
 2. Exynos ChipID: recognize ExynosAutov920.
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Merge tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers

Samsung SoC driver changes for v6.8

1. Add support for Google GS101 SoC to different drivers: clock
   controller, serial and watchdog.

   The clock driver changes depend on few bindings headers, which I put
   in a topic branch with the bindings refactoring and GS101 support,
   therefore this this pull request includes that bindings topic branch.

   The rest of the bindings topic branch is not necessary here, however
   keeping everything together makes it easier to share between
   branches.  The bindings topic branch is mostly refactoring all the
   compatibles to add SoC-specific compatible followed by fallback.

2. Exynos ChipID: recognize ExynosAutov920.

* tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (40 commits)
  dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
  watchdog: s3c2410_wdt: Add support for Google gs101 SoC
  watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro
  watchdog: s3c2410_wdt: Add support for WTCON register DBGACK_MASK bit
  tty: serial: samsung: Add gs101 compatible and common fifoszdt_serial_drv_data
  clk: samsung: clk-gs101: Add cmu_top, cmu_misc and cmu_apm support
  clk: samsung: clk-pll: Add support for pll_{0516,0517,518}
  dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix
  dt-bindings: soc: samsung: usi: add google,gs101-usi compatible
  dt-bindings: serial: samsung: Make samsung,uart-fifosize a required property
  dt-bindings: serial: samsung: Add google-gs101-uart compatible
  dt-bindings: watchdog: Document Google gs101 watchdog bindings
  dt-bindings: samsung: exynos-sysreg: combine exynosautov920 with other enum
  dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101
  dt-bindings: clock: Add Google gs101 clock management unit bindings
  dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible
  dt-bindings: watchdog: samsung: add specific compatible for Tesla FSD
  dt-bindings: samsung: exynos-pmu: add specific compatible for Tesla FSD
  dt-bindings: serial: samsung: add specific compatible for Tesla FSD
  dt-bindings: pwm: samsung: add specific compatible for Tesla FSD
  ...

Link: https://lore.kernel.org/r/20231220084722.22149-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22 11:19:20 +00:00
Frank Li
1e9b052582 dt-bindings: dma: fsl-edma: Add fsl-edma.h to prevent hardcoding in dts
Introduce a common dt-bindings header file, fsl-edma.h, shared between
the driver and dts files. This addition aims to eliminate hardcoded values
in dts files, promoting maintainability and consistency.

DTS header file not support BIT() macro yet. Directly use 2^n number.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231114154824.3617255-3-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-12-21 21:41:06 +05:30
Arnd Bergmann
76955bc85b MediaTek ARM64 DeviceTree updates for v6.8
This adds devicetree bindings and nodes for:
  - Media Data Path 3 (MDP3) bindings and enablement on MT8195
  - Smart Voltage Scaling (SVS) on MT8195
  - LVTS SoC thermal on MT8192
  - MT8188 SoC along with its resets, display bindings, and more
  - MT8183 hardware video decoder (mtk-vcodec-dec)
 
 Adds the following new machines:
  - MT8188 Evaluation Board (EVB)
  - MT8183 Chromebooks: Kukui-Katsu, Jacuzzi-Makomo, Pico, Pico6
 
 Performs cleanups for various MediaTek SoCs and PMICs, and also
 includes some spare fixes.
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Merge tag 'mtk-dts64-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt

MediaTek ARM64 DeviceTree updates for v6.8

This adds devicetree bindings and nodes for:
 - Media Data Path 3 (MDP3) bindings and enablement on MT8195
 - Smart Voltage Scaling (SVS) on MT8195
 - LVTS SoC thermal on MT8192
 - MT8188 SoC along with its resets, display bindings, and more
 - MT8183 hardware video decoder (mtk-vcodec-dec)

Adds the following new machines:
 - MT8188 Evaluation Board (EVB)
 - MT8183 Chromebooks: Kukui-Katsu, Jacuzzi-Makomo, Pico, Pico6

Performs cleanups for various MediaTek SoCs and PMICs, and also
includes some spare fixes.

* tag 'mtk-dts64-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (60 commits)
  arm64: dts: mediatek: mt8192: Add Smart Voltage Scaling node
  arm64: dts: mediatek: mt8195: Add SVS node and reduce LVTS_AP iospace
  arm64: dts: mediatek: mt8183: Change iospaces for thermal and svs
  arm64: dts: mediatek: mt8186: fix address warning for ADSP mailboxes
  arm64: dts: mediatek: mt8186: Fix alias prefix for ovl_2l0
  arm64: dts: mt6358: Drop bogus "regulator-fixed" compatible properties
  arm64: dts: mt8183: kukui-jacuzzi: Drop bogus anx7625 panel_flag property
  arm64: dts: Add MediaTek MT8188 dts and evaluation board and Makefile
  dt-bindings: soc: mediatek: pwrap: Modify compatible for MT8188
  dt-bindings: arm: mediatek: Add mt8188 pericfg compatible
  dt-bindings: arm: Add compatible for MediaTek MT8188
  arm64: dts: mediatek: mt8195: add DSI and MIPI DPHY nodes
  dt-bindings: display: mediatek: dsi: add compatible for MediaTek MT8195
  arm64: dts: mediatek: mt6358: Merge ldo_vcn33_* regulators
  dt-bindings: arm: mediatek: convert audsys and mt2701-afe-pcm to yaml
  arm64: dts: mediatek: mt8195: add MDP3 nodes
  arm64: dts: mediatek: mt8195: revise VDOSYS RDMA node name
  arm64: dts: mediatek: mt8183: correct MDP3 DMA-related nodes
  dt-bindings: display: mediatek: padding: add compatible for MT8195
  dt-bindings: display: mediatek: split: add compatible for MT8195
  ...

Link: https://lore.kernel.org/r/20231212114515.121695-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-21 15:45:21 +00:00
Tudor Ambarus
35f32e39b4 dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
The gs101 clock defines from the bindings header are derived from the
clock register names found in the datasheet under some certain rules.

The CMU TOP gate clock defines missed to include the required "CMU"
differentiator which will cause collisions with the gate clock defines
of other clock units. Rename the TOP gate clock defines to include "CMU".

Update the clock driver to use the new defines in order to not break
compilation and bisect-ability. There are no device trees that use the
previous defines.

Fixes: 0a910f1606 ("dt-bindings: clock: Add Google gs101 clock management unit bindings")
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20231218064333.479885-1-tudor.ambarus@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-18 09:59:20 +01:00
Gabriel Fernandez
b5be49db3d dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform
Adds clock and reset binding entries for STM32MP25 SoC family

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231208143700.354785-4-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:33:26 -08:00
Bjorn Andersson
ea0b1a4c5a Merge branch 'icc-sm6115' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD
Merge the SM6115 interconnect binding to allow referecing the
interconnect header files and the ports defined in these.
2023-12-16 23:18:16 -06:00
Bjorn Andersson
d00e87f0e2 Merge branch '20231201-videocc-8150-v3-1-56bec3a5e443@quicinc.com' into clk-for-6.8
Merge SM8150 Video clock controller through a topic branch, to allow
constants to be made available in the DeviceTree branch as well.
2023-12-15 22:59:48 -06:00
Satya Priya Kakitapalli
3185f96968 dt-bindings: clock: Update the videocc resets for sm8150
Add all the available resets for the video clock controller
on sm8150.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231201-videocc-8150-v3-1-56bec3a5e443@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15 22:59:38 -06:00
Andy Yan
dc7226acac dt-bindings: rockchip,vop2: Add more endpoint definition
There are 2 HDMI, 2 DP, 2 eDP on rk3588, so add
corresponding endpoint definition for it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115907.1785377-1-andyshrk@163.com
2023-12-13 15:37:27 +01:00
Peter Griffin
5b02a863ba dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix
166 was skipped by mistake and two clocks:
* CLK_MOUT_CMU_HSI0_USBDPDGB
* CLK_GOUT_HSI0_USBDPDGB

Have an incorrect DGB ending instead of DBG.

This is an ABI break, but as the patch was only applied yesterday this
header has never been in an actual release so it seems better to fix
this early than ignore it.

Fixes: 0a910f1606 ("dt-bindings: clock: Add Google gs101 clock management unit bindings")
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20231211162331.435900-7-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-12 20:22:43 +01:00
Hsiao Chien Sung
3526cfaed2
dt-bindings: reset: mt8188: Add VDOSYS reset control bits
Add MT8188 VDOSYS0 and VDOSYS1 reset control bits.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11 11:12:59 +01:00
Peter Griffin
0a910f1606 dt-bindings: clock: Add Google gs101 clock management unit bindings
Provide dt-schema documentation for Google gs101 SoC clock controller.
Currently this adds support for cmu_top, cmu_misc and cmu_apm.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231209233106.147416-3-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-10 14:59:40 +01:00
Bjorn Andersson
779266b127 Merge branch 'icc-x1e80100' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8
Merge the X1E80100 interconnect binding to get access to the
interconnect port constants.
2023-12-07 20:24:09 -08:00
Bjorn Andersson
d64254b46a Merge branch '20231205061002.30759-4-quic_sibis@quicinc.com' into arm64-for-6.8
Merge the X1E80100 clock bindings to get access to the clock constants.
2023-12-07 20:22:50 -08:00
Bjorn Andersson
12c4ffcd3b Merge branch '20231205061002.30759-4-quic_sibis@quicinc.com' into clk-for-6.8
Merge the X1E80100 DeviceTree bindings through a topic branch, to allow
the clock constants to be shared with the DeviceTree branch.
2023-12-07 20:19:15 -08:00
Rajendra Nayak
4dc7e7d2ee dt-bindings: clock: qcom: Add X1E80100 GCC clocks
Add device tree bindings for global clock controller on X1E80100 SoCs.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231205061002.30759-2-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 20:18:21 -08:00
Bjorn Andersson
5ceab14eb6 Merge branch 'icc-sm8650' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8
Merge the SM8650 interconnect binding, to gain access to the
interconnect port constants.
2023-12-07 19:18:08 -08:00
Bjorn Andersson
40d9c6ea64 Merge branch '20231106-topic-sm8650-upstream-clocks-v3-5-761a6fadb4c0@linaro.org' into arm64-for-6.8
Merge the SM8650 clock bindings, to gain access to the clock constants.
2023-12-07 19:16:43 -08:00
Bjorn Andersson
cdf1c63d23 Merge branch '20231123064735.2979802-2-quic_imrashai@quicinc.com' into clk-for-6.8
Merge the ECPI clock controller through a topic branch to make it
possible to merge the clock constants into the DeviceTree branch as
well.
2023-12-07 08:46:01 -08:00
Imran Shaik
d4a599c59d dt-bindings: clock: qcom: Add ECPRICC clocks for QDU1000 and QRU1000
Add device tree bindings for qcom ecpri clock controller on QDU1000 and
QRU1000 SoCs.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231123064735.2979802-2-quic_imrashai@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:45:51 -08:00
Nia Espera
7bf421f445 dt-bindings: iio: adc: qcom: Add Qualcomm smb139x
Bindings for a charger controller chip found on sm8350

Signed-off-by: Nia Espera <nespera@igalia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20231111-nia-sm8350-for-upstream-v4-1-3a638b02eea5@igalia.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:27:28 -08:00
Bjorn Andersson
6514b6efdd Merge branch '20231106-topic-sm8650-upstream-clocks-v3-5-761a6fadb4c0@linaro.org' into clk-for-6.8
Merge SM8650 GCC, TCSRCC, DISPCC, GPUCC and RPMHCC bindings through a
topic branch to make it possible to also merge and use the constants in
the DeviceTree branch.
2023-12-07 08:08:54 -08:00
Neil Armstrong
a0aa7fa5c3 dt-bindings: clock: qcom: document the SM8650 GPU Clock Controller
Add bindings documentation for the SM8650 Graphics Clock Controller.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-4-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:47 -08:00
Neil Armstrong
c1120359d4 dt-bindings: clock: qcom: document the SM8650 Display Clock Controller
Add bindings documentation for the SM8650 Display Clock Controller.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-3-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:47 -08:00
Neil Armstrong
b69d932154 dt-bindings: clock: qcom: document the SM8650 General Clock Controller
Add bindings documentation for the SM8650 General Clock Controller.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-2-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:47 -08:00
Neil Armstrong
1a3b3bd142 dt-bindings: clock: qcom: document the SM8650 TCSR Clock Controller
Add bindings documentation for the SM8650 TCSR Clock Controller.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-1-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:46 -08:00
Vincent Knecht
3f373de6da dt-bindings: clock: qcom,gcc-msm8939: Add CSI2 related clocks
When adding in the indexes for this clock-controller we missed
GCC_CAMSS_CSI2_AHB_CLK, GCC_CAMSS_CSI2_CLK, GCC_CAMSS_CSI2PHY_CLK,
GCC_CAMSS_CSI2PIX_CLK and GCC_CAMSS_CSI2RDI_CLK.

Add them in now.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231029061948.505883-1-vincent.knecht@mailoo.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:04:40 -08:00
Bjorn Andersson
7a56e64a56 Merge branch '20231026105345.3376-3-bryan.odonoghue@linaro.org' into arm64-for-6.8
Merge the SC8280XP Camera Clock Controller binding updates from the
topic branch, to gain access to clock defines to be used in DeviceTree
source.
2023-12-07 08:01:58 -08:00
Bryan O'Donoghue
206cd759fb dt-bindings: clock: Add SC8280XP CAMCC
Add device tree bindings for the camera clock controller on
Qualcomm SC8280XP platform.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231026105345.3376-3-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:00:51 -08:00
Neil Armstrong
216382b155 dt-bindings: arm: qcom,ids: Add SoC ID for SM8650
Add the ID for the Qualcomm SM8650 SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-socinfo-v2-1-4751e7391dc9@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 07:55:36 -08:00
Konrad Dybcio
658902913c dt-bindings: interconnect: Add Qualcomm SM6115 NoC
Add bindings for Qualcomm SM6115 Network-On-Chip interconnect.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-6115icc-v3-1-bd8907b8cfd7@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-12-06 17:16:07 +02:00
Luca Weiss
18c74d56fe iio: adc: Add PM7325 PMIC7 ADC bindings
Add the defines for the ADC channels found on the PM7325. The list is
taken from downstream msm-5.4 and adjusted for mainline.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-1-f14df01922e6@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02 17:24:58 -08:00
Neil Armstrong
f32f977fa8 dt-bindings: power: meson-g12a-power: document ISP power domain
Add MIPI ISP power domain ID to the G12A Power domains bindings header

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com>
Tested-by: Daniel Scally <dan.scally@ideasonboard.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231123-topic-amlogic-upstream-isp-pmdomain-v2-1-61f2fcf709e5@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-11-30 12:01:12 +01:00
Zelong Dong
0c0ea61c9b dt-bindings: reset: Add compatible and DT bindings for Amlogic C3 Reset Controller
Add new compatible and DT bindings for Amlogic C3 Reset Controller

Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230914064018.18790-2-zelong.dong@amlogic.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28 17:21:59 +01:00
Neil Armstrong
439d3404ad dt-bindings: clock: g12a-clkc: add MIPI ISP & CSI PHY clock ids
Add MIPI ISP & CSI PHY clock ids to G12A clock bindings header

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com>
Tested-by: Daniel Scally <dan.scally@ideasonboard.com>
Link: https://lore.kernel.org/r/20231114-topic-amlogic-upstream-isp-clocks-v1-1-223958791501@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-11-24 18:03:00 +01:00
Neil Armstrong
bd5ef3f21d dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids
Add new CLK ids for the CTS_ENCL and CTS_ENCL_SEL clocks
on G12A compatible SoCs.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231124-amlogic-v6-4-upstream-dsi-ccf-vim3-v9-1-95256ed139e6@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-11-24 17:07:40 +01:00
Rajendra Nayak
dc84a76f05 dt-bindings: interconnect: Add Qualcomm X1E80100 SoC
The Qualcomm X1E80100 SoC has several bus fabrics that could be controlled
and tuned dynamically according to the bandwidth demand.

Co-developed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231123135028.29433-2-quic_sibis@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-11-24 00:24:07 +02:00
Neil Armstrong
80abebd9bf dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm SM8650 SoC
Document the RPMh Network-On-Chip Interconnect of the SM8650 platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231123-topic-sm8650-upstream-interconnect-v2-1-7e050874f59b@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-11-24 00:14:52 +02:00
Linus Torvalds
12418ece0d linux-watchdog 6.7-rc1 tag
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Merge tag 'linux-watchdog-6.7-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - add support for Amlogic C3 and S4 SoCs

 - add IT8613 ID

 - add MSM8226 and MSM8974 compatibles

 - other small fixes and improvements

* tag 'linux-watchdog-6.7-rc1' of git://www.linux-watchdog.org/linux-watchdog: (24 commits)
  dt-bindings: watchdog: Add support for Amlogic C3 and S4 SoCs
  watchdog: mlx-wdt: Parameter desctiption warning fix
  watchdog: aspeed: Add support for aspeed,reset-mask DT property
  dt-bindings: watchdog: aspeed-wdt: Add aspeed,reset-mask property
  watchdog: apple: Deactivate on suspend
  dt-bindings: watchdog: qcom-wdt: Add MSM8226 and MSM8974 compatibles
  dt-bindings: watchdog: fsl-imx7ulp-wdt: Add 'fsl,ext-reset-output'
  wdog: imx7ulp: Enable wdog int_en bit for watchdog any reset
  drivers: watchdog: marvell_gti: Program the max_hw_heartbeat_ms
  drivers: watchdog: marvell_gti: fix zero pretimeout handling
  watchdog: marvell_gti: Replace of_platform.h with explicit includes
  watchdog: imx_sc_wdt: continue if the wdog already enabled
  watchdog: st_lpc: Use device_get_match_data()
  watchdog: wdat_wdt: Add timeout value as a param in ping method
  watchdog: gpio_wdt: Make use of device properties
  sbsa_gwdt: Calculate timeout with 64-bit math
  watchdog: ixp4xx: Make sure restart always works
  watchdog: it87_wdt: add IT8613 ID
  watchdog: marvell_gti_wdt: Fix error code in probe()
  Watchdog: marvell_gti_wdt: Remove redundant dev_err_probe() for platform_get_irq()
  ...
2023-11-09 13:54:25 -08:00
Linus Torvalds
90b0c2b2ed Pin control changes for the v6.7 kernel cycle
New drivers:
 
 - Realtek RTD family pin control driver and RTD1619B,
   RTD1319D and RTD1315E subdrivers.
 
 - Nuvoton NPCM8xx combined pin control and GPIO driver.
 
 - Amlogic T7 pin control driver.
 
 - Renesas RZ/G3S pin control driver.
 
 Improvements:
 
 - A number of additional UART groups added to the Mediatek
   MT7981 driver.
 
 - MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125
   and SDM660.
 
 - Extra GPIO banks for the Sunxi H616.
 
 - MLSP I2C6 function support in Qualcomm MSM8226.
 
 - Some __counted_by() annotations for dynamic arrays.
 
 - Ongoing work to make remove() return void.
 
 - LSBC groups and functions in the Renesas R8A7778.
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Merge tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "No pin control core changes this time.

  New drivers:

   - Realtek RTD family pin control driver and RTD1619B, RTD1319D and
     RTD1315E subdrivers

   - Nuvoton NPCM8xx combined pin control and GPIO driver

   - Amlogic T7 pin control driver

   - Renesas RZ/G3S pin control driver

  Improvements:

   - A number of additional UART groups added to the Mediatek MT7981
     driver

   - MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125 and SDM660

   - Extra GPIO banks for the Sunxi H616

   - MLSP I2C6 function support in Qualcomm MSM8226

   - Some __counted_by() annotations for dynamic arrays

   - Ongoing work to make remove() return void

   - LSBC groups and functions in the Renesas R8A7778"

* tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (110 commits)
  pinctrl: Use device_get_match_data()
  dt-bindings: pinctrl: qcom,sa8775p-tlmm: add missing wakeup-parent
  dt-bindings: pinctrl: nuvoton,npcm845: Add missing additionalProperties on gpio child nodes
  dt-bindings: pinctrl: brcm: Ensure all child node properties are documented
  pinctrl: renesas: rzn1: Convert to platform remove callback returning void
  pinctrl: renesas: rzg2l: Add RZ/G3S support
  dt-bindings: pinctrl: renesas: Document RZ/G3S SoC
  pinctrl: renesas: rzg2l: Add support for different DS values on different groups
  pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration
  pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S
  pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets
  pinctrl: renesas: rzg2l: Index all registers based on port offset
  pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request()
  pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions
  pinctrl: intel: fetch community only when we need it
  pinctrl: cherryview: reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case
  pinctrl: cherryview: Convert to platform remove callback returning void
  pinctrl: sprd-sc9860: Convert to platform remove callback returning void
  pinctrl: qcom/msm: Convert to platform remove callback returning void
  pinctrl: qcom/lpi: Convert to platform remove callback returning void
  ...
2023-11-03 19:15:19 -10:00
Linus Torvalds
d99b91a99b Char/Misc and other driver changes for 6.7-rc1
Here is the big set of char/misc and other small driver subsystem
 changes for 6.7-rc1.  Included in here are:
   - IIO subsystem driver updates and additions (largest part of this
     pull request)
   - FPGA subsystem driver updates
   - Counter subsystem driver updates
   - ICC subsystem driver updates
   - extcon subsystem driver updates
   - mei driver updates and additions
   - nvmem subsystem driver updates and additions
   - comedi subsystem dependency fixes
   - parport driver fixups
   - cdx subsystem driver and core updates
   - splice support for /dev/zero and /dev/full
   - other smaller driver cleanups
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc updates from Greg KH:
 "Here is the big set of char/misc and other small driver subsystem
  changes for 6.7-rc1. Included in here are:

   - IIO subsystem driver updates and additions (largest part of this
     pull request)

   - FPGA subsystem driver updates

   - Counter subsystem driver updates

   - ICC subsystem driver updates

   - extcon subsystem driver updates

   - mei driver updates and additions

   - nvmem subsystem driver updates and additions

   - comedi subsystem dependency fixes

   - parport driver fixups

   - cdx subsystem driver and core updates

   - splice support for /dev/zero and /dev/full

   - other smaller driver cleanups

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (326 commits)
  cdx: add sysfs for subsystem, class and revision
  cdx: add sysfs for bus reset
  cdx: add support for bus enable and disable
  cdx: Register cdx bus as a device on cdx subsystem
  cdx: Create symbol namespaces for cdx subsystem
  cdx: Introduce lock to protect controller ops
  cdx: Remove cdx controller list from cdx bus system
  dts: ti: k3-am625-beagleplay: Add beaglecc1352
  greybus: Add BeaglePlay Linux Driver
  dt-bindings: net: Add ti,cc1352p7
  dt-bindings: eeprom: at24: allow NVMEM cells based on old syntax
  dt-bindings: nvmem: SID: allow NVMEM cells based on old syntax
  Revert "nvmem: add new config option"
  MAINTAINERS: coresight: Add missing Coresight files
  misc: pci_endpoint_test: Add deviceID for J721S2 PCIe EP device support
  firmware: xilinx: Move EXPORT_SYMBOL_GPL next to zynqmp_pm_feature definition
  uacce: make uacce_class constant
  ocxl: make ocxl_class constant
  cxl: make cxl_class constant
  misc: phantom: make phantom_class constant
  ...
2023-11-03 14:51:08 -10:00
Linus Torvalds
385903a7ec SoC driver updates for 6.7
The highlights for the driver support this time are
 
  - Qualcomm platforms gain support for the Qualcomm Secure Execution
    Environment firmware interface to access EFI variables on certain
    devices, and new features for multiple platform and firmware drivers.
 
  - Arm FF-A firmware support gains support for v1.1 specification features,
    in particular notification and memory transaction descriptor changes.
 
  - SCMI firmware support now support v3.2 features for clock and DVFS
    configuration and a new transport for Qualcomm platforms.
 
  - Minor cleanups and bugfixes are added to pretty much all the active
    platforms: qualcomm, broadcom, dove, ti-k3, rockchip, sifive, amlogic,
    atmel, tegra, aspeed, vexpress, mediatek, samsung and more.
    In particular, this contains portions of the treewide conversion to
    use __counted_by annotations and the device_get_match_data helper.
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Merge tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
 "The highlights for the driver support this time are

   - Qualcomm platforms gain support for the Qualcomm Secure Execution
     Environment firmware interface to access EFI variables on certain
     devices, and new features for multiple platform and firmware
     drivers.

   - Arm FF-A firmware support gains support for v1.1 specification
     features, in particular notification and memory transaction
     descriptor changes.

   - SCMI firmware support now support v3.2 features for clock and DVFS
     configuration and a new transport for Qualcomm platforms.

   - Minor cleanups and bugfixes are added to pretty much all the active
     platforms: qualcomm, broadcom, dove, ti-k3, rockchip, sifive,
     amlogic, atmel, tegra, aspeed, vexpress, mediatek, samsung and
     more.

     In particular, this contains portions of the treewide conversion to
     use __counted_by annotations and the device_get_match_data helper"

* tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (156 commits)
  soc: qcom: pmic_glink_altmode: Print return value on error
  firmware: qcom: scm: remove unneeded 'extern' specifiers
  firmware: qcom: scm: add a missing forward declaration for struct device
  firmware: qcom: move Qualcomm code into its own directory
  soc: samsung: exynos-chipid: Convert to platform remove callback returning void
  soc: qcom: apr: Add __counted_by for struct apr_rx_buf and use struct_size()
  soc: qcom: pmic_glink: fix connector type to be DisplayPort
  soc: ti: k3-socinfo: Avoid overriding return value
  soc: ti: k3-socinfo: Fix typo in bitfield documentation
  soc: ti: knav_qmss_queue: Use device_get_match_data()
  firmware: ti_sci: Use device_get_match_data()
  firmware: qcom: qseecom: add missing include guards
  soc/pxa: ssp: Convert to platform remove callback returning void
  soc/mediatek: mtk-mmsys: Convert to platform remove callback returning void
  soc/mediatek: mtk-devapc: Convert to platform remove callback returning void
  soc/loongson: loongson2_guts: Convert to platform remove callback returning void
  soc/litex: litex_soc_ctrl: Convert to platform remove callback returning void
  soc/ixp4xx: ixp4xx-qmgr: Convert to platform remove callback returning void
  soc/ixp4xx: ixp4xx-npe: Convert to platform remove callback returning void
  soc/hisilicon: kunpeng_hccs: Convert to platform remove callback returning void
  ...
2023-11-01 14:46:51 -10:00
Linus Torvalds
3c86a44d62 - Move Kconfig files into the pmdomain subsystem
- Drop use of genpd's redundant ->opp_to_performance_state() callback
  - amlogic: Add support for the T7 power-domains controller
  - amlogic: Fix mask for the second NNA mem power-domain
  - bcm: Fixup ASB register read and comparison for bcm2835-power
  - imx: Fix device link problem for consumers of the pgc power-domain
  - mediatek: Add support for the MT8365 power domains
  - qcom: Add support for the rpmhpds for SC8380XP power-domains
  - qcom: Add support for the rpmhpds for SM8650 power-domains
  - qcom: Add support for the rpmhpd clocks for SM7150
  - qcom: Add support for the rpmpds for MSM8917 (families) power-domains
  - starfive: Add support for the JH7110 AON PMU
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Merge tag 'pmdomain-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

Pull pmdomain updates from Ulf Hansson:

 - Move Kconfig files into the pmdomain subsystem

 - Drop use of genpd's redundant ->opp_to_performance_state() callback

 - amlogic:
    - Add support for the T7 power-domains controller
    - Fix mask for the second NNA mem power-domain

 - bcm: Fixup ASB register read and comparison for bcm2835-power

 - imx: Fix device link problem for consumers of the pgc power-domain

 - mediatek: Add support for the MT8365 power domains

 - qcom:
    - Add support for the rpmhpds for SC8380XP power-domains
    - Add support for the rpmhpds for SM8650 power-domains
    - Add support for the rpmhpd clocks for SM7150
    - Add support for the rpmpds for MSM8917 (families) power-domains

 - starfive: Add support for the JH7110 AON PMU

* tag 'pmdomain-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (56 commits)
  pmdomain: amlogic: Fix mask for the second NNA mem PD domain
  pmdomain: qcom: rpmhpd: Add SC8380XP power domains
  pmdomain: qcom: rpmhpd: Add SM8650 RPMh Power Domains
  dt-bindings: power: rpmpd: Add SC8380XP support
  dt-bindings: power: qcom,rpmhpd: Add GMXC PD index
  dt-bindings: power: qcom,rpmpd: document the SM8650 RPMh Power Domains
  pmdomain: imx: Make imx pgc power domain also set the fwnode
  pmdomain: qcom: rpmpd: Add QM215 power domains
  pmdomain: qcom: rpmpd: Add MSM8917 power domains
  dt-bindings: power: rpmpd: Add MSM8917, MSM8937 and QM215
  pmdomain: bcm: bcm2835-power: check if the ASB register is equal to enable
  pmdomain: qcom: rpmhpd: Drop the ->opp_to_performance_state() callback
  pmdomain: qcom: rpmpd: Drop the ->opp_to_performance_state() callback
  pmdomain: qcom: cpr: Drop the ->opp_to_performance_state() callback
  pmdomain: Use device_get_match_data()
  pmdomain: ti: add missing of_node_put
  pmdomain: mediatek: Add support for MT8365
  pmdomain: mediatek: Add support for MTK_SCPD_STRICT_BUS_PROTECTION cap
  pmdomain: mediatek: Add support for WAY_EN operations
  pmdomain: mediatek: Unify configuration for infracfg and smi
  ...
2023-11-01 13:09:46 -10:00
Linus Torvalds
fe4ae2fab0 Herein lies a smallish collection of clk driver updates and some core
clk framework changes for the merge window. The core framework changes
 are only improving the debugfs interface to allow phase adjustments and
 report which consumers of a clk there are. These are most likely only of
 interest to kernel developers.
 
 On the clk driver side, it's a ghastly amount of updates with only a
 handful of new clk drivers. We have a couple new clk drivers for
 Qualcomm, per usual, and a driver for Renesas, Amlogic, and TI
 respectively. The updates are spread throughout the clk drivers. Some
 highlights are fixing kunit tests for different configurations like
 lockdep and big-endian, avoiding integer overflow in rate settable clks,
 moving clk_hw_onecell_data to the end of allocations so that drivers
 don't corrupt their private data, and migrating clk drivers to the
 regmap maple tree. Otherwise it's the usual fixes to clk drivers that
 only come along with testing the drivers on real hardware.
 
 New Drivers:
  - Add clock driver for TWL6032
  - Initial support for the Qualcomm SM4450 Global Clock Controller and
    SM4450 RPMh clock controllers
  - Add Camera Clock Controller on Qualcomm SM8550
  - Add support for the Renesas RZ/G3S (R9A08G045) SoC
  - Add Amlogic s4 main clock controller support
 
 Updates:
  - Make clk kunit tests work with lockdep
  - Fix clk gate kunit test for big-endian
  - Convert more than a handful of clk drivers to use regmap maple tree
  - Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk
    implementation
  - Add consumer info to clk debugfs
  - Fix various clk drivers that have clk_hw_onecell_data not at the end
    of an allocation
  - Drop CLK_SET_RATE_PARENT for clocks with fixed-rate GPLLs across a
    variety of Qualcomm IPQ platforms
  - Add missing parent of APCS PLL on Qualcomm IPQ6018
  - Add I2C QUP6 clk on Qualcomm IPQ6018 but mark it critical to avoid
    problems with RPM
  - Implement safe source switching for a53pll and use on Qualcomm
    IPQ5332
  - Add support for Stromer Plus PLLs to Qualcomm clk driver
  - Switch Qualcomm SM8550 Video and GPU clock controllers to use OLE PLL
    configure method
  - Non critical fixes to halt bit checks in Qualcomm clk drivers
  - Add SMMU GDSC for Qualcomm MSM8998
  - Fix possible integer overflow in Qualcomm RCG frequency calculation
    code
  - Remove RPM managed clks from Qualcomm MSM8996 GCC driver
  - Add HFPLL configuration for the three HFPLLs in Qualcomm MSM8976
  - Switch Qualcomm MSM8996 CBF clock driver's remove function to return
    void
  - Fix missing dependency for s4 clock controllers
  - Select MXC_CLK when building in the CLK_IMX8QXP
  - Fixes for error handling paths in i.MX8 ACM driver
  - Move the clocks check in i.MX8 ACM driver in order to log any error
  - Drop the unused return value of clk_imx_acm_detach_pm_domains
  - Drop non-existant IMX8MP_CLK_AUDIOMIX_PDM_ROOT clock
  - Fix error handling in i.MX8MQ clock driver
  - Allow a different LCDIF1 clock parent if DT describes it for i.MX6SX
  - Keep the SCU resource table sorted in the i.MX8DXL rsrc driver
  - Move the elcdif PLL clock registration above lcd_clk, as it is its
    parent
  - Correct some ENET specific clocks for i.MX8DXL platform
  - Drop the VPU_UART and VPUCORE from i.MX8QM as latest HW revision
    doesn't have them
  - Remove "de-featured" MLB support from i.MX8QM/QXP/DXL platforms
  - Skip registering clocks owned by Cortex-A partition SCU-based
    platforms
  - Add CAN_1/2 to i.MX8QM and M4_0, PI_0_PWM_0 and PI_0_I2C_0 to
    i.MX8QXP resources
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk driver updates from Stephen Boyd:
 "Herein lies a smallish collection of clk driver updates and some core
  clk framework changes for the merge window. The core framework changes
  are only improving the debugfs interface to allow phase adjustments
  and report which consumers of a clk there are. These are most likely
  only of interest to kernel developers.

  On the clk driver side, it's a ghastly amount of updates with only a
  handful of new clk drivers. We have a couple new clk drivers for
  Qualcomm, per usual, and a driver for Renesas, Amlogic, and TI
  respectively. The updates are spread throughout the clk drivers.

  Some highlights are fixing kunit tests for different configurations
  like lockdep and big-endian, avoiding integer overflow in rate
  settable clks, moving clk_hw_onecell_data to the end of allocations so
  that drivers don't corrupt their private data, and migrating clk
  drivers to the regmap maple tree. Otherwise it's the usual fixes to
  clk drivers that only come along with testing the drivers on real
  hardware.

  New Drivers:
   - Add clock driver for TWL6032
   - Initial support for the Qualcomm SM4450 Global Clock Controller and
     SM4450 RPMh clock controllers
   - Add Camera Clock Controller on Qualcomm SM8550
   - Add support for the Renesas RZ/G3S (R9A08G045) SoC
   - Add Amlogic s4 main clock controller support

Updates:
   - Make clk kunit tests work with lockdep
   - Fix clk gate kunit test for big-endian
   - Convert more than a handful of clk drivers to use regmap maple tree
   - Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk
     implementation
   - Add consumer info to clk debugfs
   - Fix various clk drivers that have clk_hw_onecell_data not at the
     end of an allocation
   - Drop CLK_SET_RATE_PARENT for clocks with fixed-rate GPLLs across a
     variety of Qualcomm IPQ platforms
   - Add missing parent of APCS PLL on Qualcomm IPQ6018
   - Add I2C QUP6 clk on Qualcomm IPQ6018 but mark it critical to avoid
     problems with RPM
   - Implement safe source switching for a53pll and use on Qualcomm
     IPQ5332
   - Add support for Stromer Plus PLLs to Qualcomm clk driver
   - Switch Qualcomm SM8550 Video and GPU clock controllers to use OLE
     PLL configure method
   - Non critical fixes to halt bit checks in Qualcomm clk drivers
   - Add SMMU GDSC for Qualcomm MSM8998
   - Fix possible integer overflow in Qualcomm RCG frequency calculation
     code
   - Remove RPM managed clks from Qualcomm MSM8996 GCC driver
   - Add HFPLL configuration for the three HFPLLs in Qualcomm MSM8976
   - Switch Qualcomm MSM8996 CBF clock driver's remove function to
     return void
   - Fix missing dependency for s4 clock controllers
   - Select MXC_CLK when building in the CLK_IMX8QXP
   - Fixes for error handling paths in i.MX8 ACM driver
   - Move the clocks check in i.MX8 ACM driver in order to log any error
   - Drop the unused return value of clk_imx_acm_detach_pm_domains
   - Drop non-existant IMX8MP_CLK_AUDIOMIX_PDM_ROOT clock
   - Fix error handling in i.MX8MQ clock driver
   - Allow a different LCDIF1 clock parent if DT describes it for
     i.MX6SX
   - Keep the SCU resource table sorted in the i.MX8DXL rsrc driver
   - Move the elcdif PLL clock registration above lcd_clk, as it is its
     parent
   - Correct some ENET specific clocks for i.MX8DXL platform
   - Drop the VPU_UART and VPUCORE from i.MX8QM as latest HW revision
     doesn't have them
   - Remove "de-featured" MLB support from i.MX8QM/QXP/DXL platforms
   - Skip registering clocks owned by Cortex-A partition SCU-based
     platforms
   - Add CAN_1/2 to i.MX8QM and M4_0, PI_0_PWM_0 and PI_0_I2C_0 to
     i.MX8QXP resources"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits)
  clk: Fix clk gate kunit test on big-endian CPUs
  clk: si521xx: Increase stack based print buffer size in probe
  clk: mediatek: fix double free in mtk_clk_register_pllfh()
  clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data
  clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_data
  clk: sifive: Allow building the driver as a module
  clk: analogbits: Allow building the library as a module
  clk: sprd: Composite driver support offset config
  clk: Allow phase adjustment from debugfs
  clk: Show active consumers of clocks in debugfs
  clk: Use device_get_match_data()
  clk: visconti: Add bounds-checking coverage for struct visconti_pll_provider
  clk: visconti: Fix undefined behavior bug in struct visconti_pll_provider
  clk: cdce925: Extend match support for OF tables
  clk: si570: Simplify probe
  clk: si5351: Simplify probe
  clk: rs9: Use i2c_get_match_data() instead of device_get_match_data()
  clk: clk-si544: Simplify probe() and is_valid_frequency()
  clk: si521xx: Use i2c_get_match_data() instead of device_get_match_data()
  clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS
  ...
2023-10-31 18:42:56 -10:00
Stephen Boyd
720e4a4a68 Merge branches 'clk-renesas', 'clk-kunit', 'clk-regmap' and 'clk-frac-divider' into clk-next
- Make clk kunit tests work with lockdep
 - Fix clk gate kunit test for big-endian
 - Convert more than a handful of clk drivers to use regmap maple tree
 - Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk
   implementation

* clk-renesas: (23 commits)
  clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2
  clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R()
  clk: renesas: Add minimal boot support for RZ/G3S SoC
  clk: renesas: rzg2l: Add divider clock for RZ/G3S
  clk: renesas: rzg2l: Refactor SD mux driver
  clk: renesas: rzg2l: Remove CPG_SDHI_DSEL from generic header
  clk: renesas: rzg2l: Add struct clk_hw_data
  clk: renesas: rzg2l: Add support for RZ/G3S PLL
  clk: renesas: rzg2l: Remove critical area
  clk: renesas: rzg2l: Fix computation formula
  clk: renesas: rzg2l: Trust value returned by hardware
  clk: renesas: rzg2l: Lock around writes to mux register
  clk: renesas: rzg2l: Wait for status bit of SD mux before continuing
  clk: renesas: rcar-gen3: Extend SDnH divider table
  dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoC
  clk: renesas: r8a7795: Constify r8a7795_*_clks
  clk: renesas: r9a06g032: Name anonymous structs
  clk: renesas: r9a06g032: Fix kerneldoc warning
  clk: renesas: rzg2l: Use u32 for flag and mux_flags
  clk: renesas: rzg2l: Use FIELD_GET() for PLL register fields
  ...

* clk-kunit:
  clk: Fix clk gate kunit test on big-endian CPUs
  clk: Parameterize clk_leaf_mux_set_rate_parent
  clk: Drive clk_leaf_mux_set_rate_parent test from clk_ops

* clk-regmap:
  clk: versaclock7: Convert to use maple tree register cache
  clk: versaclock5: Convert to use maple tree register cache
  clk: versaclock3: Convert to use maple tree register cache
  clk: versaclock3: Remove redundant _is_writeable()
  clk: si570: Convert to use maple tree register cache
  clk: si544: Convert to use maple tree register cache
  clk: si5351: Convert to use maple tree register cache
  clk: si5341: Convert to use maple tree register cache
  clk: si514: Convert to use maple tree register cache
  clk: cdce925: Convert to use maple tree register cache

* clk-frac-divider:
  clk: fractional-divider: tests: Add test suite for edge cases
  clk: fractional-divider: Improve approximation when zero based and export
2023-10-30 14:12:20 -07:00
Stephen Boyd
d33050aec3 Merge branches 'clk-debugfs', 'clk-spreadtrum', 'clk-sifive', 'clk-counted' and 'clk-qcom' into clk-next
- Add consumer info to clk debugfs
 - Fix various clk drivers that have clk_hw_onecell_data not at the end
   of an allocation

* clk-debugfs:
  clk: Allow phase adjustment from debugfs
  clk: Show active consumers of clocks in debugfs

* clk-spreadtrum:
  clk: sprd: Composite driver support offset config

* clk-sifive:
  clk: sifive: Allow building the driver as a module
  clk: analogbits: Allow building the library as a module

* clk-counted:
  clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data
  clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_data
  clk: visconti: Add bounds-checking coverage for struct visconti_pll_provider
  clk: visconti: Fix undefined behavior bug in struct visconti_pll_provider

* clk-qcom: (36 commits)
  clk: qcom: apss-ipq6018: add the GPLL0 clock also as clock provider
  clk: qcom: ipq5332: drop the CLK_SET_RATE_PARENT flag from GPLL clocks
  clk: qcom: ipq9574: drop the CLK_SET_RATE_PARENT flag from GPLL clocks
  clk: qcom: ipq5018: drop the CLK_SET_RATE_PARENT flag from GPLL clocks
  clk: qcom: ipq6018: drop the CLK_SET_RATE_PARENT flag from PLL clocks
  clk: qcom: ipq8074: drop the CLK_SET_RATE_PARENT flag from PLL clocks
  clk: qcom: gcc-ipq6018: add QUP6 I2C clock
  clk: qcom: apss-ipq6018: ipq5332: add safe source switch for a53pll
  clk: qcom: apss-ipq-pll: Fix 'l' value for ipq5332_pll_config
  clk: qcom: apss-ipq-pll: Use stromer plus ops for stromer plus pll
  clk: qcom: clk-alpha-pll: introduce stromer plus ops
  clk: qcom: config IPQ_APSS_6018 should depend on QCOM_SMEM
  clk: qcom: videocc-sm8550: switch to clk_lucid_ole_pll_configure
  clk: qcom: gpucc-sm8550: switch to clk_lucid_ole_pll_configure
  clk: qcom: Replace of_device.h with explicit includes
  clk: qcom: smd-rpm: Move CPUSS_GNoC clock to interconnect
  clk: qcom: cbf-msm8996: Convert to platform remove callback returning void
  clk: qcom: gcc-sm8150: Fix gcc_sdcc2_apps_clk_src
  clk: qcom: Add GCC driver support for SM4450
  dt-bindings: clock: qcom: Add GCC clocks for SM4450
  ...
2023-10-30 14:10:51 -07:00
Stephen Boyd
702a582b5c Merge branches 'clk-doc', 'clk-amlogic', 'clk-mediatek', 'clk-twl' and 'clk-imx' into clk-next
- Add clock driver for TWL6032

* clk-doc:
  clk: linux/clk-provider.h: fix kernel-doc warnings and typos

* clk-amlogic:
  clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS
  clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller
  clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver
  dt-bindings: clock: document Amlogic S4 SoC peripherals clock controller
  dt-bindings: clock: document Amlogic S4 SoC PLL clock controller

* clk-mediatek:
  clk: mediatek: fix double free in mtk_clk_register_pllfh()
  clk: mediatek: clk-mt2701: Add check for mtk_alloc_clk_data
  clk: mediatek: clk-mt7629: Add check for mtk_alloc_clk_data
  clk: mediatek: clk-mt7629-eth: Add check for mtk_alloc_clk_data
  clk: mediatek: clk-mt6797: Add check for mtk_alloc_clk_data
  clk: mediatek: clk-mt6779: Add check for mtk_alloc_clk_data
  clk: mediatek: clk-mt6765: Add check for mtk_alloc_clk_data

* clk-twl:
  clk: twl: add clock driver for TWL6032

* clk-imx:
  clk: imx: imx8qm/qxp: add more resources to whitelist
  clk: imx: scu: ignore clks not owned by Cortex-A partition
  clk: imx8: remove MLB support
  clk: imx: imx8qm-rsrc: drop VPU_UART/VPUCORE
  clk: imx: imx8qxp: correct the enet clocks for i.MX8DXL
  clk: imx: imx8qxp: Fix elcdif_pll clock
  clk: imx: imx8dxl-rsrc: keep sorted in the ascending order
  clk: imx: imx6sx: Allow a different LCDIF1 clock parent
  clk: imx: imx8mq: correct error handling path
  clk: imx8mp: Remove non-existent IMX8MP_CLK_AUDIOMIX_PDM_ROOT
  clk: imx: imx8: Simplify clk_imx_acm_detach_pm_domains()
  clk: imx: imx8: Add a message in case of devm_clk_hw_register_mux_parent_data_table() error
  clk: imx: imx8: Fix an error handling path in imx8_acm_clk_probe()
  clk: imx: imx8: Fix an error handling path if devm_clk_hw_register_mux_parent_data_table() fails
  clk: imx: imx8: Fix an error handling path in clk_imx_acm_attach_pm_domains()
  clk: imx: Select MXC_CLK for CLK_IMX8QXP
2023-10-30 14:10:39 -07:00
Zev Weiss
9931be2cfc dt-bindings: watchdog: aspeed-wdt: Add aspeed,reset-mask property
This property configures the Aspeed watchdog timer's reset mask, which
controls which peripherals are reset when the watchdog timer expires.
Some platforms require that certain devices be left untouched across a
reboot; aspeed,reset-mask can now be used to express such constraints.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20230922104231.1434-5-zev@bewilderbeest.net
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2023-10-29 19:45:10 +01:00
Ulf Hansson
11cc498cf8 pmdomain: Merge branch genpd_dt into next
Merge the immutable branch genpd_dt into next, to allow the DT bindings to
be tested together with new pmdomain changes that are targeted for v6.7.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-10-26 16:21:46 +02:00