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5723879c14
The Allwinner A64 manual lists the following constraints for the PLL-MIPI clock: - M/N <= 3 - (PLL_VIDEO0)/M >= 24MHz The PLL-MIPI clock is implemented as ccu_nkm. Therefore, add support for these constraints. Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Frank Oltmanns <frank@oltmanns.dev> Link: https://lore.kernel.org/r/20240310-pinephone-pll-fixes-v4-3-46fc80c83637@oltmanns.dev Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
88 lines
2.1 KiB
C
88 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2016 Maxime Ripard. All rights reserved.
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*/
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#ifndef _CCU_NKM_H_
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#define _CCU_NKM_H_
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#include <linux/clk-provider.h>
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#include "ccu_common.h"
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#include "ccu_div.h"
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#include "ccu_mult.h"
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/*
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* struct ccu_nkm - Definition of an N-K-M clock
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*
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* Clocks based on the formula parent * N * K / M
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*/
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struct ccu_nkm {
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u32 enable;
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u32 lock;
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struct ccu_mult_internal n;
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struct ccu_mult_internal k;
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struct ccu_div_internal m;
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struct ccu_mux_internal mux;
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unsigned int fixed_post_div;
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unsigned long max_m_n_ratio;
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unsigned long min_parent_m_ratio;
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struct ccu_common common;
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};
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#define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \
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_nshift, _nwidth, \
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_kshift, _kwidth, \
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_mshift, _mwidth, \
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_muxshift, _muxwidth, \
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_gate, _lock, _flags) \
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struct ccu_nkm _struct = { \
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.enable = _gate, \
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.lock = _lock, \
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.k = _SUNXI_CCU_MULT(_kshift, _kwidth), \
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.n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
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.m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
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.mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
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.common = { \
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.reg = _reg, \
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.hw.init = CLK_HW_INIT_PARENTS(_name, \
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_parents, \
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&ccu_nkm_ops, \
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_flags), \
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}, \
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}
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#define SUNXI_CCU_NKM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
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_nshift, _nwidth, \
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_kshift, _kwidth, \
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_mshift, _mwidth, \
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_gate, _lock, _flags) \
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struct ccu_nkm _struct = { \
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.enable = _gate, \
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.lock = _lock, \
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.k = _SUNXI_CCU_MULT(_kshift, _kwidth), \
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.n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
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.m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
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.common = { \
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.reg = _reg, \
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.hw.init = CLK_HW_INIT(_name, \
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_parent, \
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&ccu_nkm_ops, \
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_flags), \
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}, \
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}
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static inline struct ccu_nkm *hw_to_ccu_nkm(struct clk_hw *hw)
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{
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struct ccu_common *common = hw_to_ccu_common(hw);
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return container_of(common, struct ccu_nkm, common);
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}
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extern const struct clk_ops ccu_nkm_ops;
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#endif /* _CCU_NKM_H_ */
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