mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
synced 2024-12-28 16:52:18 +00:00
7a04f015d4
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240202071927.41213-1-liubo03@inspur.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
596 lines
13 KiB
C
596 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/err.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/i2c.h>
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#include <linux/regmap.h>
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#include <linux/util_macros.h>
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#define REG_CR1 0x00
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#define CR1_HYST BIT(5)
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#define CR1_DRV GENMASK(4, 3)
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#define CR1_TEMP_SRC GENMASK(1, 0)
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#define REG_CR2 0x01
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#define CR2_STBY BIT(7)
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#define CR2_ALERTS BIT(6)
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#define CR2_DFC BIT(0)
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#define REG_CR3 0x02
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#define REG_PWMR 0x50
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#define REG_PWMV 0x51
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#define REG_STATUS 0x5A
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#define STATUS_ALARM_CRIT(ch) BIT(2 + 2 * (ch))
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#define STATUS_ALARM_MAX(ch) BIT(3 + 2 * (ch))
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#define STATUS_RDFA BIT(6)
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#define REG_TACH(ch) (0x52 + (ch) * 2)
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#define REG_TEMP_INPUT(ch) (0x56 + (ch) * 2)
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#define REG_TEMP_MAX(ch) (0x06 + (ch) * 2)
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#define REG_TEMP_CRIT(ch) (0x0A + (ch) * 2)
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#define TEMP11_FROM_REG(reg) ((reg) / 32 * 125)
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#define TEMP11_TO_REG(val) (DIV_ROUND_CLOSEST(clamp_val((val), -128000, \
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127875), 125) * 32)
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#define LUT_SIZE 48
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#define REG_LUT(index) (0x20 + (index))
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struct max31760_state {
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struct regmap *regmap;
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struct lut_attribute {
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char name[24];
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struct sensor_device_attribute sda;
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} lut[LUT_SIZE];
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struct attribute *attrs[LUT_SIZE + 2];
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struct attribute_group group;
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const struct attribute_group *groups[2];
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};
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static bool max31760_volatile_reg(struct device *dev, unsigned int reg)
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{
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return reg > 0x50;
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}
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static const struct regmap_config regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0x5B,
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.cache_type = REGCACHE_MAPLE,
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.volatile_reg = max31760_volatile_reg,
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};
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static const int max31760_pwm_freq[] = {33, 150, 1500, 25000};
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static int tach_to_rpm(u16 tach)
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{
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if (tach == 0)
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tach = 1;
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return 60 * 100000 / tach / 2;
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}
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static int max31760_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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struct max31760_state *state = dev_get_drvdata(dev);
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unsigned int regval;
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unsigned int reg_temp;
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s16 temp;
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u8 reg[2];
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int ret;
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switch (type) {
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_fault:
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ret = regmap_read(state->regmap, REG_STATUS, ®val);
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if (ret)
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return ret;
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*val = FIELD_GET(STATUS_RDFA, regval);
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return 0;
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case hwmon_temp_max_alarm:
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ret = regmap_read(state->regmap, REG_STATUS, ®val);
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if (ret)
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return ret;
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if (channel)
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*val = FIELD_GET(STATUS_ALARM_MAX(1), regval);
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else
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*val = FIELD_GET(STATUS_ALARM_MAX(0), regval);
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return 0;
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case hwmon_temp_crit_alarm:
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ret = regmap_read(state->regmap, REG_STATUS, ®val);
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if (ret)
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return ret;
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if (channel)
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*val = FIELD_GET(STATUS_ALARM_CRIT(1), regval);
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else
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*val = FIELD_GET(STATUS_ALARM_CRIT(0), regval);
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return 0;
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case hwmon_temp_input:
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reg_temp = REG_TEMP_INPUT(channel);
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break;
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case hwmon_temp_max:
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reg_temp = REG_TEMP_MAX(channel);
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break;
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case hwmon_temp_crit:
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reg_temp = REG_TEMP_CRIT(channel);
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break;
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default:
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return -EOPNOTSUPP;
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}
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ret = regmap_bulk_read(state->regmap, reg_temp, reg, 2);
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if (ret)
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return ret;
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temp = (reg[0] << 8) | reg[1];
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*val = TEMP11_FROM_REG(temp);
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return 0;
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case hwmon_fan:
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switch (attr) {
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case hwmon_fan_input:
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ret = regmap_bulk_read(state->regmap, REG_TACH(channel), reg, 2);
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if (ret)
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return ret;
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*val = tach_to_rpm(reg[0] * 256 + reg[1]);
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return 0;
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case hwmon_fan_fault:
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ret = regmap_read(state->regmap, REG_STATUS, ®val);
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if (ret)
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return ret;
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if (channel)
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*val = FIELD_GET(BIT(1), regval);
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else
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*val = FIELD_GET(BIT(0), regval);
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return 0;
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case hwmon_fan_enable:
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ret = regmap_read(state->regmap, REG_CR3, ®val);
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if (ret)
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return ret;
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if (channel)
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*val = FIELD_GET(BIT(1), regval);
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else
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*val = FIELD_GET(BIT(0), regval);
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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case hwmon_pwm:
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switch (attr) {
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case hwmon_pwm_input:
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ret = regmap_read(state->regmap, REG_PWMV, ®val);
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if (ret)
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return ret;
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*val = regval;
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return 0;
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case hwmon_pwm_freq:
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ret = regmap_read(state->regmap, REG_CR1, ®val);
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if (ret)
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return ret;
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regval = FIELD_GET(CR1_DRV, regval);
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if (regval >= ARRAY_SIZE(max31760_pwm_freq))
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return -EINVAL;
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*val = max31760_pwm_freq[regval];
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return 0;
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case hwmon_pwm_enable:
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ret = regmap_read(state->regmap, REG_CR2, ®val);
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if (ret)
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return ret;
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*val = 2 - FIELD_GET(CR2_DFC, regval);
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return 0;
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case hwmon_pwm_auto_channels_temp:
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ret = regmap_read(state->regmap, REG_CR1, ®val);
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if (ret)
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return ret;
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switch (FIELD_GET(CR1_TEMP_SRC, regval)) {
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case 0:
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*val = 2;
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break;
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case 1:
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*val = 1;
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break;
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case 2:
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case 3:
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*val = 3;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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default:
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return -EOPNOTSUPP;
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}
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}
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static int max31760_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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{
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struct max31760_state *state = dev_get_drvdata(dev);
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unsigned int pwm_index;
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unsigned int reg_temp;
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int temp;
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u8 reg_val[2];
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switch (type) {
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_max:
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reg_temp = REG_TEMP_MAX(channel);
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break;
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case hwmon_temp_crit:
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reg_temp = REG_TEMP_CRIT(channel);
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break;
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default:
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return -EOPNOTSUPP;
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}
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temp = TEMP11_TO_REG(val);
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reg_val[0] = temp >> 8;
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reg_val[1] = temp & 0xFF;
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return regmap_bulk_write(state->regmap, reg_temp, reg_val, 2);
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case hwmon_fan:
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switch (attr) {
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case hwmon_fan_enable:
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if (val == 0)
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return regmap_clear_bits(state->regmap, REG_CR3, BIT(channel));
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if (val == 1)
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return regmap_set_bits(state->regmap, REG_CR3, BIT(channel));
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return -EINVAL;
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default:
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return -EOPNOTSUPP;
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}
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case hwmon_pwm:
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switch (attr) {
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case hwmon_pwm_input:
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if (val < 0 || val > 255)
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return -EINVAL;
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return regmap_write(state->regmap, REG_PWMR, val);
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case hwmon_pwm_enable:
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if (val == 1)
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return regmap_set_bits(state->regmap, REG_CR2, CR2_DFC);
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if (val == 2)
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return regmap_clear_bits(state->regmap, REG_CR2, CR2_DFC);
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return -EINVAL;
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case hwmon_pwm_freq:
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pwm_index = find_closest(val, max31760_pwm_freq,
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ARRAY_SIZE(max31760_pwm_freq));
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return regmap_update_bits(state->regmap,
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REG_CR1, CR1_DRV,
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FIELD_PREP(CR1_DRV, pwm_index));
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case hwmon_pwm_auto_channels_temp:
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switch (val) {
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case 1:
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break;
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case 2:
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val = 0;
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break;
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case 3:
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val = 2;
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break;
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default:
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return -EINVAL;
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}
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return regmap_update_bits(state->regmap, REG_CR1, CR1_TEMP_SRC, val);
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default:
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return -EOPNOTSUPP;
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}
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default:
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return -EOPNOTSUPP;
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}
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}
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static const struct hwmon_channel_info * const max31760_info[] = {
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HWMON_CHANNEL_INFO(chip,
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HWMON_C_REGISTER_TZ),
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HWMON_CHANNEL_INFO(fan,
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HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_ENABLE,
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HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_ENABLE),
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HWMON_CHANNEL_INFO(temp,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT | HWMON_T_FAULT |
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HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
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HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_LABEL),
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HWMON_CHANNEL_INFO(pwm,
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HWMON_PWM_ENABLE | HWMON_PWM_FREQ | HWMON_PWM_INPUT |
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HWMON_PWM_AUTO_CHANNELS_TEMP),
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NULL
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};
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static umode_t max31760_is_visible(const void *data,
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enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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switch (type) {
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_input:
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case hwmon_temp_max_alarm:
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case hwmon_temp_crit_alarm:
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case hwmon_temp_fault:
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case hwmon_temp_label:
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return 0444;
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case hwmon_temp_max:
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case hwmon_temp_crit:
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return 0644;
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default:
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return 0;
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}
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case hwmon_fan:
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switch (attr) {
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case hwmon_fan_input:
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case hwmon_fan_fault:
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return 0444;
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case hwmon_fan_enable:
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return 0644;
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default:
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return 0;
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}
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case hwmon_pwm:
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switch (attr) {
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case hwmon_pwm_enable:
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case hwmon_pwm_input:
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case hwmon_pwm_freq:
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case hwmon_pwm_auto_channels_temp:
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return 0644;
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default:
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return 0;
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}
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default:
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return 0;
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}
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}
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static int max31760_read_string(struct device *dev,
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enum hwmon_sensor_types type,
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u32 attr, int channel, const char **str)
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{
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switch (type) {
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case hwmon_temp:
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if (attr != hwmon_temp_label)
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return -EOPNOTSUPP;
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*str = channel ? "local" : "remote";
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static const struct hwmon_ops max31760_hwmon_ops = {
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.is_visible = max31760_is_visible,
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.read = max31760_read,
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.write = max31760_write,
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.read_string = max31760_read_string
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};
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static const struct hwmon_chip_info max31760_chip_info = {
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.ops = &max31760_hwmon_ops,
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.info = max31760_info,
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};
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static ssize_t lut_show(struct device *dev,
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struct device_attribute *devattr, char *buf)
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{
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struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr);
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struct max31760_state *state = dev_get_drvdata(dev);
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int ret;
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unsigned int regval;
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ret = regmap_read(state->regmap, REG_LUT(sda->index), ®val);
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if (ret)
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return ret;
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return sysfs_emit(buf, "%d\n", regval);
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}
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static ssize_t lut_store(struct device *dev,
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struct device_attribute *devattr,
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const char *buf, size_t count)
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{
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struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr);
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struct max31760_state *state = dev_get_drvdata(dev);
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int ret;
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u8 pwm;
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ret = kstrtou8(buf, 10, &pwm);
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if (ret)
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return ret;
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ret = regmap_write(state->regmap, REG_LUT(sda->index), pwm);
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if (ret)
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return ret;
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return count;
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}
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static ssize_t pwm1_auto_point_temp_hyst_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct max31760_state *state = dev_get_drvdata(dev);
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unsigned int regval;
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int ret;
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ret = regmap_read(state->regmap, REG_CR1, ®val);
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if (ret)
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return ret;
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return sysfs_emit(buf, "%d\n", (1 + (int)FIELD_GET(CR1_HYST, regval)) * 2000);
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}
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static ssize_t pwm1_auto_point_temp_hyst_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t count)
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{
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struct max31760_state *state = dev_get_drvdata(dev);
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unsigned int hyst;
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int ret;
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ret = kstrtou32(buf, 10, &hyst);
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if (ret)
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return ret;
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if (hyst < 3000)
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ret = regmap_clear_bits(state->regmap, REG_CR1, CR1_HYST);
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else
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ret = regmap_set_bits(state->regmap, REG_CR1, CR1_HYST);
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if (ret)
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return ret;
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return count;
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}
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static DEVICE_ATTR_RW(pwm1_auto_point_temp_hyst);
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static void max31760_create_lut_nodes(struct max31760_state *state)
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{
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int i;
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struct sensor_device_attribute *sda;
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struct lut_attribute *lut;
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for (i = 0; i < LUT_SIZE; ++i) {
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lut = &state->lut[i];
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sda = &lut->sda;
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snprintf(lut->name, sizeof(lut->name),
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"pwm1_auto_point%d_pwm", i + 1);
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sda->dev_attr.attr.mode = 0644;
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sda->index = i;
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sda->dev_attr.show = lut_show;
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sda->dev_attr.store = lut_store;
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sda->dev_attr.attr.name = lut->name;
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sysfs_attr_init(&sda->dev_attr.attr);
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state->attrs[i] = &sda->dev_attr.attr;
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}
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state->attrs[i] = &dev_attr_pwm1_auto_point_temp_hyst.attr;
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state->group.attrs = state->attrs;
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state->groups[0] = &state->group;
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}
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static int max31760_probe(struct i2c_client *client)
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{
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struct device *dev = &client->dev;
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struct max31760_state *state;
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struct device *hwmon_dev;
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int ret;
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state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
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if (!state)
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return -ENOMEM;
|
|
|
|
state->regmap = devm_regmap_init_i2c(client, ®map_config);
|
|
if (IS_ERR(state->regmap))
|
|
return dev_err_probe(dev,
|
|
PTR_ERR(state->regmap),
|
|
"regmap initialization failed\n");
|
|
|
|
dev_set_drvdata(dev, state);
|
|
|
|
/* Set alert output to comparator mode */
|
|
ret = regmap_set_bits(state->regmap, REG_CR2, CR2_ALERTS);
|
|
if (ret)
|
|
return dev_err_probe(dev, ret, "cannot write register\n");
|
|
|
|
max31760_create_lut_nodes(state);
|
|
|
|
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
|
|
state,
|
|
&max31760_chip_info,
|
|
state->groups);
|
|
|
|
return PTR_ERR_OR_ZERO(hwmon_dev);
|
|
}
|
|
|
|
static const struct of_device_id max31760_of_match[] = {
|
|
{.compatible = "adi,max31760"},
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, max31760_of_match);
|
|
|
|
static const struct i2c_device_id max31760_id[] = {
|
|
{"max31760"},
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, max31760_id);
|
|
|
|
static int max31760_suspend(struct device *dev)
|
|
{
|
|
struct max31760_state *state = dev_get_drvdata(dev);
|
|
|
|
return regmap_set_bits(state->regmap, REG_CR2, CR2_STBY);
|
|
}
|
|
|
|
static int max31760_resume(struct device *dev)
|
|
{
|
|
struct max31760_state *state = dev_get_drvdata(dev);
|
|
|
|
return regmap_clear_bits(state->regmap, REG_CR2, CR2_STBY);
|
|
}
|
|
|
|
static DEFINE_SIMPLE_DEV_PM_OPS(max31760_pm_ops, max31760_suspend,
|
|
max31760_resume);
|
|
|
|
static struct i2c_driver max31760_driver = {
|
|
.driver = {
|
|
.name = "max31760",
|
|
.of_match_table = max31760_of_match,
|
|
.pm = pm_ptr(&max31760_pm_ops)
|
|
},
|
|
.probe = max31760_probe,
|
|
.id_table = max31760_id
|
|
};
|
|
module_i2c_driver(max31760_driver);
|
|
|
|
MODULE_AUTHOR("Ibrahim Tilki <Ibrahim.Tilki@analog.com>");
|
|
MODULE_DESCRIPTION("Analog Devices MAX31760 Fan Speed Controller");
|
|
MODULE_SOFTDEP("pre: regmap_i2c");
|
|
MODULE_VERSION("1.0");
|
|
MODULE_LICENSE("GPL");
|