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46b94c485e
The NCT7363Y is a fan controller which provides up to 16 independent FAN input monitors. It can report each FAN input count values. The NCT7363Y also provides up to 16 independent PWM outputs. Each PWM can output specific PWM signal by manual mode to control the FAN duty outside. Signed-off-by: Ban Feng <kcfeng0@nuvoton.com> Message-ID: <20241022052905.4062682-3-kcfeng0@nuvoton.com> [groeck: Dropped unnecessary variable initialization, and , after { }] Signed-off-by: Guenter Roeck <linux@roeck-us.net>
448 lines
10 KiB
C
448 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (c) 2023 Nuvoton Technology corporation.
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*/
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/err.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#define NCT7363_REG_FUNC_CFG_BASE(x) (0x20 + (x))
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#define NCT7363_REG_LSRS(x) (0x34 + ((x) / 8))
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#define NCT7363_REG_PWMEN_BASE(x) (0x38 + (x))
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#define NCT7363_REG_FANINEN_BASE(x) (0x41 + (x))
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#define NCT7363_REG_FANINX_HVAL(x) (0x48 + ((x) * 2))
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#define NCT7363_REG_FANINX_LVAL(x) (0x49 + ((x) * 2))
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#define NCT7363_REG_FANINX_HL(x) (0x6C + ((x) * 2))
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#define NCT7363_REG_FANINX_LL(x) (0x6D + ((x) * 2))
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#define NCT7363_REG_FSCPXDUTY(x) (0x90 + ((x) * 2))
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#define NCT7363_REG_FSCPXDIV(x) (0x91 + ((x) * 2))
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#define PWM_SEL(x) (BIT(0) << ((x) * 2))
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#define FANIN_SEL(_x) ({typeof(_x) (x) = (_x); \
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BIT(1) << (((x) < 8) ? \
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(((x) + 8) * 2) : \
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(((x) % 8) * 2)); })
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#define ALARM_SEL(x, y) ((x) & (BIT((y) % 8)))
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#define VALUE_TO_REG(x, y) (((x) >> ((y) * 8)) & 0xFF)
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#define NCT7363_FANINX_LVAL_MASK GENMASK(4, 0)
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#define NCT7363_FANIN_MASK GENMASK(12, 0)
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#define NCT7363_PWM_COUNT 16
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static inline unsigned int fan_from_reg(u16 val)
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{
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if (val == NCT7363_FANIN_MASK || val == 0)
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return 0;
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return (1350000UL / val);
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}
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static const struct of_device_id nct7363_of_match[] = {
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{ .compatible = "nuvoton,nct7363", },
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{ .compatible = "nuvoton,nct7362", },
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{ }
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};
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MODULE_DEVICE_TABLE(of, nct7363_of_match);
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struct nct7363_data {
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struct regmap *regmap;
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u16 fanin_mask;
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u16 pwm_mask;
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};
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static int nct7363_read_fan(struct device *dev, u32 attr, int channel,
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long *val)
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{
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struct nct7363_data *data = dev_get_drvdata(dev);
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unsigned int reg;
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u8 regval[2];
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int ret;
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u16 cnt;
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switch (attr) {
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case hwmon_fan_input:
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/*
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* High-byte register should be read first to latch
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* synchronous low-byte value
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*/
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ret = regmap_bulk_read(data->regmap,
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NCT7363_REG_FANINX_HVAL(channel),
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®val, 2);
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if (ret)
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return ret;
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cnt = (regval[0] << 5) | (regval[1] & NCT7363_FANINX_LVAL_MASK);
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*val = fan_from_reg(cnt);
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return 0;
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case hwmon_fan_min:
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ret = regmap_bulk_read(data->regmap,
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NCT7363_REG_FANINX_HL(channel),
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®val, 2);
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if (ret)
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return ret;
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cnt = (regval[0] << 5) | (regval[1] & NCT7363_FANINX_LVAL_MASK);
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*val = fan_from_reg(cnt);
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return 0;
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case hwmon_fan_alarm:
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ret = regmap_read(data->regmap,
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NCT7363_REG_LSRS(channel), ®);
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if (ret)
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return ret;
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*val = (long)ALARM_SEL(reg, channel) > 0 ? 1 : 0;
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static int nct7363_write_fan(struct device *dev, u32 attr, int channel,
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long val)
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{
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struct nct7363_data *data = dev_get_drvdata(dev);
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u8 regval[2];
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int ret;
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if (val <= 0)
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return -EINVAL;
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switch (attr) {
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case hwmon_fan_min:
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val = clamp_val(DIV_ROUND_CLOSEST(1350000, val),
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1, NCT7363_FANIN_MASK);
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regval[0] = val >> 5;
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regval[1] = val & NCT7363_FANINX_LVAL_MASK;
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ret = regmap_bulk_write(data->regmap,
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NCT7363_REG_FANINX_HL(channel),
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regval, 2);
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return ret;
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t nct7363_fan_is_visible(const void *_data, u32 attr, int channel)
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{
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const struct nct7363_data *data = _data;
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switch (attr) {
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case hwmon_fan_input:
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case hwmon_fan_alarm:
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if (data->fanin_mask & BIT(channel))
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return 0444;
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break;
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case hwmon_fan_min:
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if (data->fanin_mask & BIT(channel))
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return 0644;
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break;
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default:
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break;
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}
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return 0;
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}
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static int nct7363_read_pwm(struct device *dev, u32 attr, int channel,
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long *val)
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{
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struct nct7363_data *data = dev_get_drvdata(dev);
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unsigned int regval;
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int ret;
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switch (attr) {
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case hwmon_pwm_input:
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ret = regmap_read(data->regmap,
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NCT7363_REG_FSCPXDUTY(channel), ®val);
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if (ret)
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return ret;
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*val = (long)regval;
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static int nct7363_write_pwm(struct device *dev, u32 attr, int channel,
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long val)
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{
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struct nct7363_data *data = dev_get_drvdata(dev);
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int ret;
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switch (attr) {
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case hwmon_pwm_input:
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if (val < 0 || val > 255)
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return -EINVAL;
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ret = regmap_write(data->regmap,
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NCT7363_REG_FSCPXDUTY(channel), val);
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return ret;
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t nct7363_pwm_is_visible(const void *_data, u32 attr, int channel)
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{
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const struct nct7363_data *data = _data;
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switch (attr) {
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case hwmon_pwm_input:
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if (data->pwm_mask & BIT(channel))
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return 0644;
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break;
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default:
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break;
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}
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return 0;
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}
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static int nct7363_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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switch (type) {
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case hwmon_fan:
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return nct7363_read_fan(dev, attr, channel, val);
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case hwmon_pwm:
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return nct7363_read_pwm(dev, attr, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int nct7363_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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{
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switch (type) {
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case hwmon_fan:
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return nct7363_write_fan(dev, attr, channel, val);
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case hwmon_pwm:
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return nct7363_write_pwm(dev, attr, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t nct7363_is_visible(const void *data,
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enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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switch (type) {
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case hwmon_fan:
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return nct7363_fan_is_visible(data, attr, channel);
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case hwmon_pwm:
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return nct7363_pwm_is_visible(data, attr, channel);
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default:
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return 0;
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}
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}
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static const struct hwmon_channel_info *nct7363_info[] = {
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HWMON_CHANNEL_INFO(fan,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
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HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM),
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HWMON_CHANNEL_INFO(pwm,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT),
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NULL
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};
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static const struct hwmon_ops nct7363_hwmon_ops = {
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.is_visible = nct7363_is_visible,
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.read = nct7363_read,
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.write = nct7363_write,
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};
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static const struct hwmon_chip_info nct7363_chip_info = {
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.ops = &nct7363_hwmon_ops,
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.info = nct7363_info,
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};
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static int nct7363_init_chip(struct nct7363_data *data)
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{
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u32 func_config = 0;
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int i, ret;
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/* Pin Function Configuration */
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for (i = 0; i < NCT7363_PWM_COUNT; i++) {
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if (data->pwm_mask & BIT(i))
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func_config |= PWM_SEL(i);
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if (data->fanin_mask & BIT(i))
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func_config |= FANIN_SEL(i);
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}
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for (i = 0; i < 4; i++) {
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ret = regmap_write(data->regmap, NCT7363_REG_FUNC_CFG_BASE(i),
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VALUE_TO_REG(func_config, i));
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if (ret < 0)
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return ret;
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}
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/* PWM and FANIN Monitoring Enable */
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for (i = 0; i < 2; i++) {
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ret = regmap_write(data->regmap, NCT7363_REG_PWMEN_BASE(i),
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VALUE_TO_REG(data->pwm_mask, i));
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if (ret < 0)
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return ret;
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ret = regmap_write(data->regmap, NCT7363_REG_FANINEN_BASE(i),
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VALUE_TO_REG(data->fanin_mask, i));
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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static int nct7363_present_pwm_fanin(struct device *dev,
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struct device_node *child,
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struct nct7363_data *data)
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{
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u8 fanin_ch[NCT7363_PWM_COUNT];
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struct of_phandle_args args;
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int ret, fanin_cnt;
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u8 ch, index;
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ret = of_parse_phandle_with_args(child, "pwms", "#pwm-cells",
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0, &args);
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if (ret)
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return ret;
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if (args.args[0] >= NCT7363_PWM_COUNT)
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return -EINVAL;
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data->pwm_mask |= BIT(args.args[0]);
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fanin_cnt = of_property_count_u8_elems(child, "tach-ch");
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if (fanin_cnt < 1 || fanin_cnt > NCT7363_PWM_COUNT)
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return -EINVAL;
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ret = of_property_read_u8_array(child, "tach-ch", fanin_ch, fanin_cnt);
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if (ret)
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return ret;
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for (ch = 0; ch < fanin_cnt; ch++) {
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index = fanin_ch[ch];
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if (index >= NCT7363_PWM_COUNT)
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return -EINVAL;
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data->fanin_mask |= BIT(index);
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}
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return 0;
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}
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static bool nct7363_regmap_is_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case NCT7363_REG_LSRS(0) ... NCT7363_REG_LSRS(15):
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case NCT7363_REG_FANINX_HVAL(0) ... NCT7363_REG_FANINX_LVAL(15):
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case NCT7363_REG_FANINX_HL(0) ... NCT7363_REG_FANINX_LL(15):
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case NCT7363_REG_FSCPXDUTY(0) ... NCT7363_REG_FSCPXDIV(15):
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config nct7363_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.use_single_read = true,
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.use_single_write = true,
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.cache_type = REGCACHE_RBTREE,
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.volatile_reg = nct7363_regmap_is_volatile,
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};
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static int nct7363_probe(struct i2c_client *client)
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{
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struct device *dev = &client->dev;
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struct device_node *child;
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struct nct7363_data *data;
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struct device *hwmon_dev;
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int ret;
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data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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data->regmap = devm_regmap_init_i2c(client, &nct7363_regmap_config);
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if (IS_ERR(data->regmap))
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return PTR_ERR(data->regmap);
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for_each_child_of_node(dev->of_node, child) {
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ret = nct7363_present_pwm_fanin(dev, child, data);
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if (ret) {
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of_node_put(child);
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return ret;
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}
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}
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/* Initialize the chip */
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ret = nct7363_init_chip(data);
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if (ret)
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return ret;
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hwmon_dev =
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devm_hwmon_device_register_with_info(dev, client->name, data,
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&nct7363_chip_info, NULL);
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return PTR_ERR_OR_ZERO(hwmon_dev);
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}
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static struct i2c_driver nct7363_driver = {
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.class = I2C_CLASS_HWMON,
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.driver = {
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.name = "nct7363",
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.of_match_table = nct7363_of_match,
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},
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.probe = nct7363_probe,
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};
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module_i2c_driver(nct7363_driver);
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MODULE_AUTHOR("CW Ho <cwho@nuvoton.com>");
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MODULE_AUTHOR("Ban Feng <kcfeng0@nuvoton.com>");
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MODULE_DESCRIPTION("NCT7363 Hardware Monitoring Driver");
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MODULE_LICENSE("GPL");
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