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fb4c31587a
Add support for the reset controller present in the audio clock controller of the g12 and sm1 SoC families, using the auxiliary bus. This is expected to replace the driver currently present directly within the related clock driver. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20240910-meson-rst-aux-v5-9-60be62635d3e@baylibre.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
29 lines
737 B
C
29 lines
737 B
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* Copyright (c) 2024 BayLibre, SAS.
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* Author: Jerome Brunet <jbrunet@baylibre.com>
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*/
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#ifndef __MESON_RESET_H
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#define __MESON_RESET_H
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/reset-controller.h>
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struct meson_reset_param {
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const struct reset_control_ops *reset_ops;
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unsigned int reset_num;
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unsigned int reset_offset;
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unsigned int level_offset;
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bool level_low_reset;
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};
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int meson_reset_controller_register(struct device *dev, struct regmap *map,
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const struct meson_reset_param *param);
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extern const struct reset_control_ops meson_reset_ops;
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extern const struct reset_control_ops meson_reset_toggle_ops;
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#endif /* __MESON_RESET_H */
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