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7738a7ab9d
Add a quirk similar to eeprom_93xx46 to add an extra clock cycle before reading data from the EEPROM. The 93Cx6 family of EEPROMs output a "dummy 0 bit" between the writing of the op-code/address from the host to the EEPROM and the reading of the actual data from the EEPROM. More info can be found on page 6 of the AT93C46 datasheet (linked below). Similar notes are found in other 93xx6 datasheets. In summary the read operation for a 93Cx6 EEPROM is: Write to EEPROM: 110[A5-A0] (9 bits) Read from EEPROM: 0[D15-D0] (17 bits) Where: 110 is the start bit and READ OpCode [A5-A0] is the address to read from 0 is a "dummy bit" preceding the actual data [D15-D0] is the actual data. Looking at the READ timing diagrams in the 93Cx6 datasheets the dummy bit should be clocked out on the last address bit clock cycle meaning it should be discarded naturally. However, depending on the hardware configuration sometimes this dummy bit is not discarded. This is the case with Exar PCI UARTs which require an extra clock cycle between sending the address and reading the data. Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-5193-SEEPROM-AT93C46D-Datasheet.pdf Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Parker Newman <pnewman@connecttech.com> Link: https://lore.kernel.org/r/0f23973efefccd2544705a0480b4ad4c2353e407.1727880931.git.pnewman@connecttech.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
85 lines
2.6 KiB
C
85 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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Copyright (C) 2004 - 2006 rt2x00 SourceForge Project
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<http://rt2x00.serialmonkey.com>
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*/
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/*
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Module: eeprom_93cx6
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Abstract: EEPROM reader datastructures for 93cx6 chipsets.
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Supported chipsets: 93c46, 93c56 and 93c66.
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*/
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#include <linux/bits.h>
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/*
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* EEPROM operation defines.
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*/
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#define PCI_EEPROM_WIDTH_93C46 6
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#define PCI_EEPROM_WIDTH_93C56 8
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#define PCI_EEPROM_WIDTH_93C66 8
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#define PCI_EEPROM_WIDTH_93C86 8
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#define PCI_EEPROM_WIDTH_OPCODE 3
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#define PCI_EEPROM_WRITE_OPCODE 0x05
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#define PCI_EEPROM_ERASE_OPCODE 0x07
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#define PCI_EEPROM_READ_OPCODE 0x06
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#define PCI_EEPROM_EWDS_OPCODE 0x10
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#define PCI_EEPROM_EWEN_OPCODE 0x13
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/**
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* struct eeprom_93cx6 - control structure for setting the commands
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* for reading the eeprom data.
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* @data: private pointer for the driver.
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* @register_read(struct eeprom_93cx6 *eeprom): handler to
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* read the eeprom register, this function should set all reg_* fields.
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* @register_write(struct eeprom_93cx6 *eeprom): handler to
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* write to the eeprom register by using all reg_* fields.
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* @width: eeprom width, should be one of the PCI_EEPROM_WIDTH_* defines
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* @quirks: eeprom or controller quirks
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* @drive_data: Set if we're driving the data line.
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* @reg_data_in: register field to indicate data input
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* @reg_data_out: register field to indicate data output
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* @reg_data_clock: register field to set the data clock
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* @reg_chip_select: register field to set the chip select
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*
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* This structure is used for the communication between the driver
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* and the eeprom_93cx6 handlers for reading the eeprom.
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*/
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struct eeprom_93cx6 {
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void *data;
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void (*register_read)(struct eeprom_93cx6 *eeprom);
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void (*register_write)(struct eeprom_93cx6 *eeprom);
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int width;
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unsigned int quirks;
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/* Some EEPROMs require an extra clock cycle before reading */
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#define PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE BIT(0)
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char drive_data;
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char reg_data_in;
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char reg_data_out;
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char reg_data_clock;
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char reg_chip_select;
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};
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extern void eeprom_93cx6_read(struct eeprom_93cx6 *eeprom,
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const u8 word, u16 *data);
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extern void eeprom_93cx6_multiread(struct eeprom_93cx6 *eeprom,
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const u8 word, __le16 *data, const u16 words);
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extern void eeprom_93cx6_readb(struct eeprom_93cx6 *eeprom,
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const u8 byte, u8 *data);
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extern void eeprom_93cx6_multireadb(struct eeprom_93cx6 *eeprom,
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const u8 byte, u8 *data, const u16 bytes);
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extern void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable);
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extern void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom,
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u8 addr, u16 data);
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static inline bool has_quirk_extra_read_cycle(struct eeprom_93cx6 *eeprom)
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{
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return eeprom->quirks & PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE;
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}
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