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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details [based] [from] [clk] [highbank] [c] you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 355 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154041.837383322@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
73 lines
2.6 KiB
C
73 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2015 Microchip Technology
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*/
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#ifndef _MICROCHIPPHY_H
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#define _MICROCHIPPHY_H
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#define LAN88XX_INT_MASK (0x19)
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#define LAN88XX_INT_MASK_MDINTPIN_EN_ (0x8000)
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#define LAN88XX_INT_MASK_SPEED_CHANGE_ (0x4000)
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#define LAN88XX_INT_MASK_LINK_CHANGE_ (0x2000)
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#define LAN88XX_INT_MASK_FDX_CHANGE_ (0x1000)
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#define LAN88XX_INT_MASK_AUTONEG_ERR_ (0x0800)
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#define LAN88XX_INT_MASK_AUTONEG_DONE_ (0x0400)
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#define LAN88XX_INT_MASK_POE_DETECT_ (0x0200)
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#define LAN88XX_INT_MASK_SYMBOL_ERR_ (0x0100)
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#define LAN88XX_INT_MASK_FAST_LINK_FAIL_ (0x0080)
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#define LAN88XX_INT_MASK_WOL_EVENT_ (0x0040)
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#define LAN88XX_INT_MASK_EXTENDED_INT_ (0x0020)
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#define LAN88XX_INT_MASK_RESERVED_ (0x0010)
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#define LAN88XX_INT_MASK_FALSE_CARRIER_ (0x0008)
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#define LAN88XX_INT_MASK_LINK_SPEED_DS_ (0x0004)
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#define LAN88XX_INT_MASK_MASTER_SLAVE_DONE_ (0x0002)
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#define LAN88XX_INT_MASK_RX__ER_ (0x0001)
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#define LAN88XX_INT_STS (0x1A)
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#define LAN88XX_INT_STS_INT_ACTIVE_ (0x8000)
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#define LAN88XX_INT_STS_SPEED_CHANGE_ (0x4000)
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#define LAN88XX_INT_STS_LINK_CHANGE_ (0x2000)
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#define LAN88XX_INT_STS_FDX_CHANGE_ (0x1000)
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#define LAN88XX_INT_STS_AUTONEG_ERR_ (0x0800)
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#define LAN88XX_INT_STS_AUTONEG_DONE_ (0x0400)
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#define LAN88XX_INT_STS_POE_DETECT_ (0x0200)
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#define LAN88XX_INT_STS_SYMBOL_ERR_ (0x0100)
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#define LAN88XX_INT_STS_FAST_LINK_FAIL_ (0x0080)
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#define LAN88XX_INT_STS_WOL_EVENT_ (0x0040)
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#define LAN88XX_INT_STS_EXTENDED_INT_ (0x0020)
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#define LAN88XX_INT_STS_RESERVED_ (0x0010)
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#define LAN88XX_INT_STS_FALSE_CARRIER_ (0x0008)
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#define LAN88XX_INT_STS_LINK_SPEED_DS_ (0x0004)
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#define LAN88XX_INT_STS_MASTER_SLAVE_DONE_ (0x0002)
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#define LAN88XX_INT_STS_RX_ER_ (0x0001)
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#define LAN88XX_EXT_PAGE_ACCESS (0x1F)
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#define LAN88XX_EXT_PAGE_SPACE_0 (0x0000)
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#define LAN88XX_EXT_PAGE_SPACE_1 (0x0001)
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#define LAN88XX_EXT_PAGE_SPACE_2 (0x0002)
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/* Extended Register Page 1 space */
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#define LAN88XX_EXT_MODE_CTRL (0x13)
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#define LAN88XX_EXT_MODE_CTRL_MDIX_MASK_ (0x000C)
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#define LAN88XX_EXT_MODE_CTRL_AUTO_MDIX_ (0x0000)
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#define LAN88XX_EXT_MODE_CTRL_MDI_ (0x0008)
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#define LAN88XX_EXT_MODE_CTRL_MDI_X_ (0x000C)
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/* MMD 3 Registers */
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#define LAN88XX_MMD3_CHIP_ID (32877)
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#define LAN88XX_MMD3_CHIP_REV (32878)
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/* Registers specific to the LAN7800/LAN7850 embedded phy */
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#define LAN78XX_PHY_LED_MODE_SELECT (0x1D)
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/* DSP registers */
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#define PHY_ARDENNES_MMD_DEV_3_PHY_CFG (0x806A)
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#define PHY_ARDENNES_MMD_DEV_3_PHY_CFG_ZD_DLY_EN_ (0x2000)
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#define LAN88XX_EXT_PAGE_ACCESS_TR (0x52B5)
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#define LAN88XX_EXT_PAGE_TR_CR 16
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#define LAN88XX_EXT_PAGE_TR_LOW_DATA 17
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#define LAN88XX_EXT_PAGE_TR_HIGH_DATA 18
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#endif /* _MICROCHIPPHY_H */
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