linux-next/tools/testing/cxl
Dan Williams 0619337856 cxl/rch: Prepare for caching the MMIO mapped PCIe AER capability
Prepare cxl_probe_rcrb() for retrieving more than just the component
register block. The RCH AER handling code wants to get back to the AER
capability that happens to be MMIO mapped rather then configuration
cycles.

Move RCRB specific downstream port data, like the RCRB base and the
AER capability offset, into its own data structure ('struct
cxl_rcrb_info') for cxl_probe_rcrb() to fill. Extend 'struct
cxl_dport' to include a 'struct cxl_rcrb_info' attribute.

This centralizes all RCRB scanning in one routine.

Co-developed-by: Robert Richter <rrichter@amd.com>
Signed-off-by: Robert Richter <rrichter@amd.com>
Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230622205523.85375-4-terry.bowman@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2023-06-25 11:35:26 -07:00
..
test cxl/rch: Prepare for caching the MMIO mapped PCIe AER capability 2023-06-25 11:35:26 -07:00
config_check.c tools/testing/cxl: Require CONFIG_DEBUG_FS 2023-04-23 12:08:39 -07:00
cxl_acpi_test.c tools/testing/cxl: Prevent cxl_test from confusing production modules 2023-01-05 15:01:45 -08:00
cxl_core_test.c tools/testing/cxl: Prevent cxl_test from confusing production modules 2023-01-05 15:01:45 -08:00
cxl_mem_test.c tools/testing/cxl: Prevent cxl_test from confusing production modules 2023-01-05 15:01:45 -08:00
cxl_pmem_test.c tools/testing/cxl: Prevent cxl_test from confusing production modules 2023-01-05 15:01:45 -08:00
cxl_port_test.c tools/testing/cxl: Prevent cxl_test from confusing production modules 2023-01-05 15:01:45 -08:00
Kbuild cxl/acpi: Probe RCRB later during RCH downstream port creation 2023-06-25 11:35:20 -07:00
mock_acpi.c cxl/core: Generalize dport enumeration in the core 2022-02-08 22:57:30 -08:00
watermark.h tools/testing/cxl: Prevent cxl_test from confusing production modules 2023-01-05 15:01:45 -08:00