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fde7dc63b1
- mhu: trim included headers - omap: add support for K3 SoCs - imx: Irq disable fix - bcm: tidy up extracting driver data - tegra: make resume 'noirq' - api: fix error handling -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAl0qaioACgkQf9lkf8eY P5VT2Q//WJPFy/aB12RGN4hOrF2dLmk92AEWVDQDifbEbvKXOSJo9Qk8ebUgfPiG U3bjnYjvFm9b64yaFCw3PRvu52jPa/oMCUHgyi/cbqzbKQmTonmCaU/E60RCHukR 3A3aQR59cLxxt+WM7Gb36USPZkF6E4x7WJx7xPGLclkeXlcuqCDYZ77K+R3WGUPI gldCwF6cNxmimLHm9WGwkA9hw4aE/h4U4Nu2MJn5VPNSKU93GfAJ7X59SMzn93tO dbUODDYYwvUSn6voXbrvICe1Z+a9xCTLj9bS0NIM8ND3zlfZeuvogCIlwt5fLmOb 365rMMr0xyVLBokBBJVFvqqv8rX5z+XHbGzrWYB6hErmQH3rnzWIuauiN7ic5Pn8 ml8gLYpeJzUt2fRiW8mNR/AMjpLOsQOrVOrUfT7I2MKNTv4t0aiEXhIxaqesZjot NAifa9jUZ4OMgdt+Q53aoJCvuZwEN+9lOCKRQ/UmKArQVJkAdoX2yoVwMYfSMkr1 X8rPX5VJ1HrP8yQtXO4LK4y+D7l7TERatG5XYBXWJV6Sv7u6Xq1XX2LGv/O5NWBy YGRwzBkIlxK6WnVhg/xwoZnoRmXpTnQlG86d6H2XkzQJrt0VxvFz8QXulH665lNe dfEBSMEVnk7FBj3zpgW+kvpUfsdpUkEjeK3W4iIOlQAYjYuIQ24= =ZkSQ -----END PGP SIGNATURE----- Merge tag 'mailbox-v5.3' of git://git.linaro.org/landing-teams/working/fujitsu/integration Pull mailbox updates from Jassi Brar: - stm32: race fix by adding a spinlock - mhu: trim included headers - omap: add support for K3 SoCs - imx: Irq disable fix - bcm: tidy up extracting driver data - tegra: make resume 'noirq' - api: fix error handling * tag 'mailbox-v5.3' of git://git.linaro.org/landing-teams/working/fujitsu/integration: mailbox: handle failed named mailbox channel request mailbox: tegra: avoid resume NULL mailboxes mailbox: tegra: hsp: add noirq resume mailbox: bcm-flexrm-mailbox: using dev_get_drvdata directly mailbox: imx: Clear GIEn bit at shutdown mailbox: omap: Add support for TI K3 SoCs dt-bindings: mailbox: omap: Update bindings for TI K3 SoCs mailbox: arm_mhu: reorder header inclusion and drop unneeded ones mailbox: stm32_ipcc: add spinlock to fix channels concurrent access