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e3ea01f418
As the QMP HDMI PHY is a clock provider, add constant #clock-cells property. For the compatibility with older DTs the property is not marked as required. Also add the XO clock to the list of the clocks used by the driver. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/492316/ Link: https://lore.kernel.org/r/20220704161148.814510-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
95 lines
1.8 KiB
YAML
95 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/qcom,hdmi-phy-qmp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Adreno/Snapdragon QMP HDMI phy
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maintainers:
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- Rob Clark <robdclark@gmail.com>
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properties:
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compatible:
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enum:
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- qcom,hdmi-phy-8996
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reg:
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maxItems: 6
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reg-names:
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items:
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- const: hdmi_pll
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- const: hdmi_tx_l0
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- const: hdmi_tx_l1
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- const: hdmi_tx_l2
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- const: hdmi_tx_l3
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- const: hdmi_phy
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clocks:
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minItems: 2
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maxItems: 3
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clock-names:
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minItems: 2
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items:
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- const: iface
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- const: ref
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- const: xo
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power-domains:
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maxItems: 1
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vcca-supply:
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description: phandle to VCCA supply regulator
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vddio-supply:
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description: phandle to VDD I/O supply regulator
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'#clock-cells':
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const: 0
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'#phy-cells':
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const: 0
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required:
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- compatible
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- clocks
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- clock-names
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- reg
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- reg-names
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- '#phy-cells'
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additionalProperties: false
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examples:
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- |
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hdmi-phy@9a0600 {
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compatible = "qcom,hdmi-phy-8996";
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reg = <0x009a0600 0x1c4>,
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<0x009a0a00 0x124>,
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<0x009a0c00 0x124>,
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<0x009a0e00 0x124>,
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<0x009a1000 0x124>,
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<0x009a1200 0x0c8>;
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reg-names = "hdmi_pll",
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"hdmi_tx_l0",
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"hdmi_tx_l1",
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"hdmi_tx_l2",
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"hdmi_tx_l3",
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"hdmi_phy";
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clocks = <&mmcc 116>,
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<&gcc 214>,
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<&xo_board>;
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clock-names = "iface",
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"ref",
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"xo";
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#clock-cells = <0>;
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#phy-cells = <0>;
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vddio-supply = <&vreg_l12a_1p8>;
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vcca-supply = <&vreg_l28a_0p925>;
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};
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