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6f2b033cb8
Due to some SoCs have a bit shift issue that will drop a bit for usb3 phy or pcie phy, fix it by adding software efuse reading and setting, but only support it optionally for version 2/3. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/20211218082802.5256-2-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org> |
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.. | ||
Kconfig | ||
Makefile | ||
phy-mtk-hdmi-mt2701.c | ||
phy-mtk-hdmi-mt8173.c | ||
phy-mtk-hdmi.c | ||
phy-mtk-hdmi.h | ||
phy-mtk-mipi-dsi-mt8173.c | ||
phy-mtk-mipi-dsi-mt8183.c | ||
phy-mtk-mipi-dsi.c | ||
phy-mtk-mipi-dsi.h | ||
phy-mtk-tphy.c | ||
phy-mtk-ufs.c | ||
phy-mtk-xsphy.c |