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https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
synced 2024-12-29 17:22:07 +00:00
1c10941e34
The following BUG was triggered:
=============================
[ BUG: Invalid wait context ]
6.12.0-rc2-XXX #406 Not tainted
-----------------------------
kworker/1:1/62 is trying to lock:
ffffff8801593030 (&cpc_ptr->rmw_lock){+.+.}-{3:3}, at: cpc_write+0xcc/0x370
other info that might help us debug this:
context-{5:5}
2 locks held by kworker/1:1/62:
#0: ffffff897ef5ec98 (&rq->__lock){-.-.}-{2:2}, at: raw_spin_rq_lock_nested+0x2c/0x50
#1: ffffff880154e238 (&sg_policy->update_lock){....}-{2:2}, at: sugov_update_shared+0x3c/0x280
stack backtrace:
CPU: 1 UID: 0 PID: 62 Comm: kworker/1:1 Not tainted 6.12.0-rc2-g9654bd3e8806 #406
Workqueue: 0x0 (events)
Call trace:
dump_backtrace+0xa4/0x130
show_stack+0x20/0x38
dump_stack_lvl+0x90/0xd0
dump_stack+0x18/0x28
__lock_acquire+0x480/0x1ad8
lock_acquire+0x114/0x310
_raw_spin_lock+0x50/0x70
cpc_write+0xcc/0x370
cppc_set_perf+0xa0/0x3a8
cppc_cpufreq_fast_switch+0x40/0xc0
cpufreq_driver_fast_switch+0x4c/0x218
sugov_update_shared+0x234/0x280
update_load_avg+0x6ec/0x7b8
dequeue_entities+0x108/0x830
dequeue_task_fair+0x58/0x408
__schedule+0x4f0/0x1070
schedule+0x54/0x130
worker_thread+0xc0/0x2e8
kthread+0x130/0x148
ret_from_fork+0x10/0x20
sugov_update_shared() locks a raw_spinlock while cpc_write() locks a
spinlock.
To have a correct wait-type order, update rmw_lock to a raw spinlock and
ensure that interrupts will be disabled on the CPU holding it.
Fixes: 60949b7b80 ("ACPI: CPPC: Fix MASK_VAL() usage")
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Link: https://patch.msgid.link/20241028125657.1271512-1-pierre.gondois@arm.com
[ rjw: Changelog edits ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
255 lines
6.2 KiB
C
255 lines
6.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* CPPC (Collaborative Processor Performance Control) methods used
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* by CPUfreq drivers.
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*
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* (C) Copyright 2014, 2015 Linaro Ltd.
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* Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
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*/
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#ifndef _CPPC_ACPI_H
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#define _CPPC_ACPI_H
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#include <linux/acpi.h>
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#include <linux/cpufreq.h>
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#include <linux/types.h>
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#include <acpi/pcc.h>
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#include <acpi/processor.h>
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/* CPPCv2 and CPPCv3 support */
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#define CPPC_V2_REV 2
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#define CPPC_V3_REV 3
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#define CPPC_V2_NUM_ENT 21
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#define CPPC_V3_NUM_ENT 23
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#define PCC_CMD_COMPLETE_MASK (1 << 0)
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#define PCC_ERROR_MASK (1 << 2)
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#define MAX_CPC_REG_ENT 21
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/* CPPC specific PCC commands. */
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#define CMD_READ 0
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#define CMD_WRITE 1
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/* Each register has the folowing format. */
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struct cpc_reg {
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u8 descriptor;
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u16 length;
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u8 space_id;
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u8 bit_width;
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u8 bit_offset;
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u8 access_width;
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u64 address;
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} __packed;
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/*
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* Each entry in the CPC table is either
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* of type ACPI_TYPE_BUFFER or
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* ACPI_TYPE_INTEGER.
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*/
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struct cpc_register_resource {
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acpi_object_type type;
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u64 __iomem *sys_mem_vaddr;
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union {
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struct cpc_reg reg;
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u64 int_value;
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} cpc_entry;
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};
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/* Container to hold the CPC details for each CPU */
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struct cpc_desc {
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int num_entries;
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int version;
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int cpu_id;
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int write_cmd_status;
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int write_cmd_id;
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/* Lock used for RMW operations in cpc_write() */
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raw_spinlock_t rmw_lock;
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struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT];
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struct acpi_psd_package domain_info;
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struct kobject kobj;
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};
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/* These are indexes into the per-cpu cpc_regs[]. Order is important. */
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enum cppc_regs {
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HIGHEST_PERF,
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NOMINAL_PERF,
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LOW_NON_LINEAR_PERF,
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LOWEST_PERF,
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GUARANTEED_PERF,
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DESIRED_PERF,
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MIN_PERF,
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MAX_PERF,
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PERF_REDUC_TOLERANCE,
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TIME_WINDOW,
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CTR_WRAP_TIME,
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REFERENCE_CTR,
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DELIVERED_CTR,
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PERF_LIMITED,
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ENABLE,
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AUTO_SEL_ENABLE,
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AUTO_ACT_WINDOW,
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ENERGY_PERF,
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REFERENCE_PERF,
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LOWEST_FREQ,
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NOMINAL_FREQ,
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};
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/*
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* Categorization of registers as described
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* in the ACPI v.5.1 spec.
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* XXX: Only filling up ones which are used by governors
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* today.
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*/
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struct cppc_perf_caps {
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u32 guaranteed_perf;
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u32 highest_perf;
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u32 nominal_perf;
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u32 lowest_perf;
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u32 lowest_nonlinear_perf;
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u32 lowest_freq;
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u32 nominal_freq;
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u32 energy_perf;
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bool auto_sel;
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};
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struct cppc_perf_ctrls {
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u32 max_perf;
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u32 min_perf;
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u32 desired_perf;
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u32 energy_perf;
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};
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struct cppc_perf_fb_ctrs {
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u64 reference;
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u64 delivered;
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u64 reference_perf;
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u64 wraparound_time;
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};
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/* Per CPU container for runtime CPPC management. */
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struct cppc_cpudata {
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struct list_head node;
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struct cppc_perf_caps perf_caps;
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struct cppc_perf_ctrls perf_ctrls;
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struct cppc_perf_fb_ctrs perf_fb_ctrs;
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unsigned int shared_type;
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cpumask_var_t shared_cpu_map;
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};
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#ifdef CONFIG_ACPI_CPPC_LIB
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extern int cppc_get_desired_perf(int cpunum, u64 *desired_perf);
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extern int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf);
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extern int cppc_get_highest_perf(int cpunum, u64 *highest_perf);
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extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
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extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
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extern int cppc_set_enable(int cpu, bool enable);
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extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
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extern bool cppc_perf_ctrs_in_pcc(void);
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extern unsigned int cppc_perf_to_khz(struct cppc_perf_caps *caps, unsigned int perf);
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extern unsigned int cppc_khz_to_perf(struct cppc_perf_caps *caps, unsigned int freq);
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extern bool acpi_cpc_valid(void);
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extern bool cppc_allow_fast_switch(void);
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extern int acpi_get_psd_map(unsigned int cpu, struct cppc_cpudata *cpu_data);
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extern unsigned int cppc_get_transition_latency(int cpu);
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extern bool cpc_ffh_supported(void);
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extern bool cpc_supported_by_cpu(void);
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extern int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val);
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extern int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val);
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extern int cppc_get_epp_perf(int cpunum, u64 *epp_perf);
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extern int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable);
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extern int cppc_get_auto_sel_caps(int cpunum, struct cppc_perf_caps *perf_caps);
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extern int cppc_set_auto_sel(int cpu, bool enable);
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extern int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf);
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extern int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator);
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extern int amd_detect_prefcore(bool *detected);
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#else /* !CONFIG_ACPI_CPPC_LIB */
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static inline int cppc_get_desired_perf(int cpunum, u64 *desired_perf)
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{
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return -EOPNOTSUPP;
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}
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static inline int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf)
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{
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return -EOPNOTSUPP;
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}
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static inline int cppc_get_highest_perf(int cpunum, u64 *highest_perf)
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{
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return -EOPNOTSUPP;
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}
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static inline int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
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{
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return -EOPNOTSUPP;
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}
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static inline int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
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{
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return -EOPNOTSUPP;
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}
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static inline int cppc_set_enable(int cpu, bool enable)
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{
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return -EOPNOTSUPP;
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}
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static inline int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps)
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{
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return -EOPNOTSUPP;
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}
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static inline bool cppc_perf_ctrs_in_pcc(void)
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{
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return false;
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}
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static inline bool acpi_cpc_valid(void)
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{
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return false;
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}
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static inline bool cppc_allow_fast_switch(void)
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{
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return false;
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}
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static inline unsigned int cppc_get_transition_latency(int cpu)
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{
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return CPUFREQ_ETERNAL;
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}
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static inline bool cpc_ffh_supported(void)
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{
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return false;
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}
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static inline int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)
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{
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return -EOPNOTSUPP;
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}
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static inline int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
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{
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return -EOPNOTSUPP;
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}
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static inline int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)
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{
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return -EOPNOTSUPP;
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}
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static inline int cppc_get_epp_perf(int cpunum, u64 *epp_perf)
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{
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return -EOPNOTSUPP;
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}
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static inline int cppc_set_auto_sel(int cpu, bool enable)
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{
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return -EOPNOTSUPP;
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}
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static inline int cppc_get_auto_sel_caps(int cpunum, struct cppc_perf_caps *perf_caps)
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{
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return -EOPNOTSUPP;
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}
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static inline int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf)
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{
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return -ENODEV;
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}
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static inline int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator)
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{
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return -EOPNOTSUPP;
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}
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static inline int amd_detect_prefcore(bool *detected)
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{
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return -ENODEV;
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}
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#endif /* !CONFIG_ACPI_CPPC_LIB */
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#endif /* _CPPC_ACPI_H*/
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