Joerg Roedel 3c677d2062 iommu/amd: Set exclusion range correctly
The exlcusion range limit register needs to contain the
base-address of the last page that is part of the range, as
bits 0-11 of this register are treated as 0xfff by the
hardware for comparisons.

So correctly set the exclusion range in the hardware to the
last page which is _in_ the range.

Fixes: b2026aa2dce44 ('x86, AMD IOMMU: add functions for programming IOMMU MMIO space')
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-04-12 12:59:45 +02:00
..
2019-01-24 15:14:35 +01:00
2017-08-23 16:28:09 +02:00
2019-01-11 12:28:24 +01:00