Charles Keepax ae1ea48c5c ASoC: arizona: Add gating for source clocks of the FLLs
Whilst ultimately we would like to move all the clocking over to the
clock framework, as an intermediate step to get people going for now
enable the source clocks for FLLs as they are powered up.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-10-24 17:42:43 +01:00
..
2016-09-12 20:04:09 +01:00
2015-06-08 20:47:53 +02:00