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https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
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ef97001f3d
Change the size of APICIDs from u8 to u16. This partially supports the new x2apic mode that will be present on future processor chips. (Chips actually support 32-bit APICIDs, but that change is more intrusive. Supporting 16-bit is sufficient for now). Signed-off-by: Jack Steiner <steiner@sgi.com> I've included just the partial change from u8 to u16 apicids. The remaining x2apic changes will be in a separate patch. In addition, the fake_node_to_pxm_map[] and fake_apicid_to_node[] tables have been moved from local data to the __initdata section reducing stack pressure when MAX_NUMNODES and MAX_LOCAL_APIC are increased in size. Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
100 lines
2.4 KiB
C
100 lines
2.4 KiB
C
#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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#include <linux/cpumask.h>
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#include <linux/init.h>
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/*
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* We need the APIC definitions automatically as part of 'smp.h'
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*/
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#include <asm/apic.h>
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#include <asm/io_apic.h>
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#include <asm/mpspec.h>
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#include <asm/pda.h>
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#include <asm/thread_info.h>
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extern cpumask_t cpu_callout_map;
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extern cpumask_t cpu_initialized;
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extern int smp_num_siblings;
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extern unsigned int num_processors;
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extern void smp_alloc_memory(void);
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extern void lock_ipi_call_lock(void);
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extern void unlock_ipi_call_lock(void);
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extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
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void *info, int wait);
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extern u16 __initdata x86_cpu_to_apicid_init[];
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extern void *x86_cpu_to_apicid_ptr;
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extern u16 bios_cpu_apicid[];
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DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
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DECLARE_PER_CPU(cpumask_t, cpu_core_map);
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DECLARE_PER_CPU(u16, cpu_llc_id);
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DECLARE_PER_CPU(u16, x86_cpu_to_apicid);
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static inline int cpu_present_to_apicid(int mps_cpu)
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{
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if (mps_cpu < NR_CPUS)
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return (int)bios_cpu_apicid[mps_cpu];
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else
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return BAD_APICID;
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}
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#ifdef CONFIG_SMP
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#define SMP_TRAMPOLINE_BASE 0x6000
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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extern void prefill_possible_map(void);
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extern unsigned __cpuinitdata disabled_cpus;
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#define raw_smp_processor_id() read_pda(cpunumber)
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#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
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#define stack_smp_processor_id() \
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({ \
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struct thread_info *ti; \
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__asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
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ti->cpu; \
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})
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/*
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* On x86 all CPUs are mapped 1:1 to the APIC space. This simplifies
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* scheduling and IPI sending and compresses data structures.
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*/
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static inline int num_booting_cpus(void)
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{
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return cpus_weight(cpu_callout_map);
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}
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extern void smp_send_reschedule(int cpu);
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#else /* CONFIG_SMP */
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extern unsigned int boot_cpu_id;
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#define cpu_physical_id(cpu) boot_cpu_id
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#define stack_smp_processor_id() 0
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#endif /* !CONFIG_SMP */
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#define safe_smp_processor_id() smp_processor_id()
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static __inline int logical_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
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}
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static inline int hard_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_ID(*(u32 *)(APIC_BASE + APIC_ID));
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}
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#endif
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